WriteReg

© nemo 2002-2020

WriteReg is a debugging module that displays the contents of any register, or the processor flags.

The current version is 1.08 (18 May 2020) [32bit] Note! Two new SWIs

This version is not compatible with RISC OS 6.

This module provides a number of SWIs for displaying the contents of any register without side-effects. As well as the usual parameter registers it can display R10-R15, plus the flags, CPSR and SPSR. It will even display the SWI’s X Flag... because it can.

SWIs

Write_R0 - Write_R15

Displays the contents of the caller’s register. In the case of R14 and R15 in 26bit modes, this will include flags. The value is displayed as an 8 digit hexadecimal number followed by a space.

Write_PC

Displays the caller’s PC in hex. This never includes flags.

Write_All

Displays all of the caller’s registers in a 4×4 grid.

Write_Many

Displays registers selected by R8, in up to a 4×4 grid. R8b0 set displays R0, b1 displays R1, and so on.

Write_Flags

Displays the flags and mode in hex.

Write_NZCV

Displays the flags as four characters followed by a space.

Write_CPSR, Write_SPSR

Displays the CPSR and SPSR in hex on those processors that support them.

Write_X

Tells you in hex whether you called Write_X or XWrite_X. This is more clever than useful.

RISC OS 6

RO6 contains a significant change to stack handling which severely complicates low-level things like WriteReg and VectorExtend. I have chosen to not support it because of this. However, I am open to persuasion if there’s anyone out there running Six. I suspect that the vast majority of users have RO5 on new hardware or RO4 on an emulator.