My research interests are in semiconductor devices & materials, broadly speaking at the intersection of electrical engineering, applied physics and material science.
More specifically, I seek to understand and exploit the interplay between material growth - device processing - device design to engineer enhanced device performance in wide band gap semiconductors. This involves a thorough understanding of epitaxial growth methods, fundamental material and electronic properties, device fabrication steps, electrical characterization techniques and device design using modeling and TCAD simulations. Having worked first-hand on the full spectrum of activities listed above over the past decade has given me an appreciation for end-to-end semiconductor device development from materials to systems.
Gallium Nitride (GaN), in view of its favorable electronic and opto-electronic properties for applications ranging from blue LEDs and lasers to high-power RF amplifiers for 5G and highly efficient power converters, has been the device and material platform of choice for most of my research activities. More recently, I have been interested in Oxide Electronics using high-mobility perovskite oxides for next-generation multi-functional electronics. In the past I have also worked on studying the fundamental properties of 2D materials for traditional switching applications.
Please see below for a full list of research projects I am/have been involved in.
While GaN-on-SiC is fast becoming the high-power RF technology of choice, cost-sensitive consumer applications such as 5G wireless broadband networks are the major pull for GaN-on-Si RF devices. I have been exploring various challenges of GaN-on-Si RF devices and have made original contributions to the study of parasitic channel formation at epitaxy-substrate interface, efficient buffer designs to suppress current collapse and temperature-dependent RF loss mechanisms due to the semiconducting nature of the Silicon substrate. A comprehensive summary of this work can be found here or here.
Substrate Effects in GaN-on-Silicon RF Device Technology, Hareesh Chandrasekar, in Wide Bandgap Semiconductor Electronics and Devices (Selected Topics in Electronics and Systems: Volume 63) edited by Uttam Singisetti, Towhidur Razzak and Yuewei Zhang, https://doi.org/10.1142/11719, ISBN:978-981-121-647-3, February 2020.
Thickness dependent parasitic channel formation at AlN/Si interfaces, Hareesh Chandrasekar, KN Bhat, Muralidharan Rangarajan, Srinivasan Raghavan, Navakanta Bhat, Scientific Reports 7, 1-10 (2017), DOI:10.1038/s41598-017-16114-w.
Buffer-induced current collapse in GaN HEMTs on highly resistive Si substrates, Hareesh Chandrasekar, Michael J Uren, Abdalla Eblabla, Hassan Hirshy, Michael A Casbon, Paul J Tasker, Khaled Elgaid, Martin Kuball, IEEE Electron Device Letters 39, 1556-1559 (2018), DOI:10.1109/LED.2018.2864562.
Quantifying Temperature-Dependent Substrate Loss in GaN-on-Si RF Technology, Hareesh Chandrasekar, Michael J Uren, Michael A Casbon, Hassan Hirshy, Abdalla Eblabla, Khaled Elgaid, James W Pomeroy, Paul J Tasker, Martin Kuball, IEEE Transactions on Electron Devices 66, 1681-1687 (2019), DOI:10.1109/TED.2019.2896156.
Materials with high dielectric permittivites allow for extracting better performance from existing device architectures as well as enabling novel functionalities. The use of high-k dielectrics in Si CMOS is the most well-known example. However, high-k dielectrics, in addition to the gate-leakage vs capacitance trade-off are also well-suited for electric field management and therefore in modulating very high charge densities required for lower ON-resistance for power devices and higher saturation current densities for RF devices. This is particularly important for wide-bandgap semiconductors with high critical electric fields since practical devices made from these materials seldom reach their theoretical breakdown fields. The average electric fields realized in such devices are more limited by other constraints such as Schottky breakdown of the gate diodes or the existence of peak fields in certain device regions. Extreme permittivity materials offer an additional knob of control for "permittivity engineering" to enhance the performance of wide-bandgap semiconductor devices through simple yet effective field-management strategies in these devices. I have worked on the device design and integration of such high-k materials with GaN, AlGaN and Gallium Oxide for better managing the electric fields in these devices. Furthermore, the presence of additional properties such as ferroelectricity in these perovskite oxides offers yet another fundamental "knob" to engineer novel devices such as negative capacitance high electron mobility transistors (NC-HEMTs) on a wide bandgap material platforms.
1. Metal/BaTiO3/β-Ga2O3 dielectric heterojunction diode with 5.7 MV/cm breakdown field, Zhanbo Xia, Hareesh Chandrasekar, Wyatt Moore, Caiyu Wang, Aidan J Lee, Joe McGlone, Nidhin Kurian Kalarickal, Aaron Arehart, Steven Ringel, Fengyuan Yang, Siddharth Rajan, Applied Physics Letters 115, 252104 (2019), DOI:10.1063/1.5130669.
2. BaTiO3/Al0.58Ga0.42N lateral heterojunction diodes with breakdown field exceeding 8 MV/cm, Towhidur Razzak, Hareesh Chandrasekar, Kamal Hussain, Choong Hee Lee, Abdullah Mamun, Hao Xue, Zhanbo Xia, Shahadat H Sohel, Mohammad Wahidur Rahman, Sanyam Bajaj, Caiyu Wang, Wu Lu, Asif Khan, Siddharth Rajan, Applied Physics Letters 116, 023507 (2020), DOI:10.1063/1.5130590.
3. Demonstration of Wide Bandgap AlGaN/GaN Negative‐Capacitance High‐Electron‐Mobility Transistors (NC‐HEMTs) Using Barium Titanate Ferroelectric Gates, Hareesh Chandrasekar, Towhidur Razzak, Caiyu Wang, Zeltzin Reyes, Kausik Majumdar, Siddharth Rajan, Advanced Electronic Materials (2020), DOI:10.1002/aelm.202000074.
Gallium nitride is emerging as the first commercially viable replacement to Silicon based power electronic devices and its cost-competitiveness is in large part enabled by the MOCVD growth of GaN on large-area silicon substrates. I have worked on the epitaxy of MOCVD GaN device stacks on Silicon for both power and RF applications, with an special interest in stress & defect management in these layers as studied by in-situ optical stress measurement techniques.
I also have an abiding interest in alternative GaN growth platforms and have developed bottom-up approaches to grow reduced defect density, large-area GaN flat crystals for novel device applications.
1. An early in-situ stress signature of the AlN-Si pre-growth interface for successful integration of nitrides with (111) Si, Hareesh Chandrasekar, Nagaboopathy Mohan, Abheek Bardhan, KN Bhat, Navakanta Bhat, N Ravishankar, Srinivasan Raghavan, Applied Physics Letters 103, 211902 (2013), DOI:10.1063/1.4831968.
2. Estimation of background carrier concentration in fully depleted GaN films, Hareesh Chandrasekar, Manikant Singh, Srinivasan Raghavan, Navakanta Bhat, Semiconductor Science and Technology 30, 115018 (2015), DOI:10.1088/0268-1242/30/11/115018.
3. Dislocation bending and stress evolution in Mg-doped GaN films on Si substrates, Rohith Soman, Nagaboopathy Mohan, Hareesh Chandrasekar, Navakanta Bhat, Srinivasan Raghavan, Journal of Applied Physics 124, 245104 (2018), DOI:10.1063/1.5063420.
Perovskites Oxides exhibit a plethora of electronic properties such as ferro-electricity, magnetism and a variety of phase-transition phenomena which make them interesting for functional integration of next generation & novel oxide devices. My work has focused on high-mobility perovskite oxides such as Barium Stannate (BaSnO3) as channel materials for all-oxide electronic devices.
The other major thread of my work on perovskite oxides is on developing phase-transition switches at the interfaces between rare-earth titanates such as SmTiO3/SrTiO3. The possibility of realizing an electronically-tunable electronic phase transition is promising for next-generation steep-subthreshold switches for ultra-low power logic devices.
1. Velocity saturation in La-doped BaSnO3 thin films, Hareesh Chandrasekar, Junao Cheng, Tianshi Wang, Zhanbo Xia, Nicholas G Combs, Christopher R Freeze, Patrick B Marshall, Joe McGlone, Aaron Arehart, Steven Ringel, Anderson Janotti, Susanne Stemmer, Wu Lu, Siddharth Rajan, Applied Physics Letters 115, 092102 (2019), DOI:10.1063/1.5097791.
2. Nanoscale etching of perovskite oxides for field effect transistor applications, Junao Cheng, Hao Yang, Caiyu Wang, Nick Combs, Chris Freeze, Omor Shoron, Wangzhou Wu, Nidhin Kurian Kalarickal, Hareesh Chandrasekar, Susanne Stemmer, Siddharth Rajan, Wu Lu, Journal of Vacuum Science & Technology B 38, 012201 (2020), DOI:10.1116/1.5122667@jvb.2020.EIPBN2019.issue-1.
3. High-Current Density SmTiO3/SrTiO3 Field-effect Transistors, Hareesh Chandrasekar, Kaveh Ahadi, Towhidur Razzak, Susanne Stemmer, Siddharth Rajan, ACS Applied Electronic Materials (2020), DOI:10.1021/acsaelm.9b00738.
Heterogeneous integration of 2D layered materials with 3D semiconductors offer an additional design space for novel electronic and opto-electronic devices. In my research I have explored III-Nitride materials as promising large-area substrates for 2D layered devices in terms of their material integration & device processing challenges, and physics-based simulations of carrier transport in such devices.
1. Optical-Phonon-Limited High-Field Transport in Layered Materials, Hareesh Chandrasekar, Kolla Lakshmi Ganapathi, Shubhadeep Bhattacharjee, Navakanta Bhat, Digbijoy N Nath, IEEE Transactions on Electron Devices 63, 767-772 (2015), DOI:10.1109/TED.2015.2508036.
2. Carrier Transport in Graphene Field Effect Transistors on Gated Polar Nitride Substrates, Krishna Balasubramanian,* Hareesh Chandrasekar,* Srinivasan Raghavan, physica status solidi (a) (2020), DOI:10.1002/pssa.201900949 (*equal contribution)
3. Spotting 2D atomic layers on aluminum nitride thin films, Hareesh Chandrasekar, Kranthi Kumar Vaidyuala, Swathi Suran, Navakanta Bhat, Manoj Varma, Srinivasan Raghavan, Nanotechnology 26, 425202 (2015), DOI:10.1088/0957-4484/26/42/425202.
4. Nitride Dielectric Environments to Suppress Surface Optical Phonon Dominated Scattering in High‐Performance Multilayer MoS2 FETs, Shubhadeep Bhattacharjee, Kolla Lakshmi Ganapathi, Hareesh Chandrasekar, Tathagata Paul, Sangeneni Mohan, Arindam Ghosh, Srinivasan Raghavan, Navakanta Bhat, Advanced Electronic Materials 3, 1600358 (2017), DOI:10.1002/aelm.201600358.