SRR

Definitions/Meaning

The Latch board purpose is to get the logical signal from the IMD/ AMS/ AS/ BSPD

identify when it turn from 0 to 1, and then shut down the SDC and when the signal is return from 1 to 0 due to glitch the SDC stays open until a restart will occur. Its importance lies in the fact that those parts of the vehicle output 1 locig signal when everything is maintain well and when they identify leakage the signal turns to 0 but when it will stop the signal will return to 1 which is no good situation due to the fact it enables re-closing of the SDC, which is forbidden by the rules

Electrical design/components

The latch board can be implemented by electromechanical components (eg. Latching relay) or by digital electronical components (eg. D flip-flops and logical gates).

Genral Requirements

In addition, for the IMD and AMS we need to design a light (one for each) that is on the dashboard that illuminate when the SDC opens due to one of these components. This light should also light up for a few seconds each time the vehicle is turned on in order to check that it is indeed working. The designing of the light can also be done through the latch board circuit.

PDR

Last year 22:

logic:

we used the design which appears down for the latch board.
The upper side of the board is responsible for operating the lights which indicates the situation while the lower part of the board is responsiple on the relay.

First we will explain the SDC-Latch function for the AS is implemented by using a unit called “SDC Latching Board”, which is a general-purpose board designed to fit every part of the SDC which requires a latching functionality. A “Close_SDC_Signal” coming from the “SDC_AS_Logic” board activates an optocoupler which sends a signal equal to the “Close_SDC_Signal” to two Positive-Edge-Triggered D-Type Flip-Flops. The U2A Flip-Flop is triggered and sends an output of a HIGH signal when the “Close_SDC_Signal” has a rising edge. A XOR gate (U3A) is acting as an inverter and inverts the “Close_SDC_Signal” entering the second Flip-Flop (U2B) so it is triggered and sends an output of a HIGH signal when the “Close_SDC_Signal” has a falling edge. Once the “Close_SDC_Signal” had a rising edge followed by a falling edge, both Flip-Flops outputs are HIGH indefinitely and can be reset only by cutting the board power supply by power cycling the LVMS. Those two latched output signals enter a XOR gate (U3B) and its output activate/deactivate the relay, thus closing and opening the SDC.

The SDC-Latch function for the RES is implemented by using the same “SDC Latching Board” used for latching the AS. The only difference between the two is the usage of an additional connection (J1) parallel to the optocoupler which is connected to the internal relay inside the RES.