Fetch/Execute – Memory Read

• • • MAR (Memory Address Register) sets up the address bus with the relevant memory location to be read from

    • The control unit read line is activated

    • The contents of the address held on the address bus are placed on the data bus

    • The data bus transfers the data from memory to the MDR (Memory Data Register)

Fetch/Execute – Memory Write

• • • MAR (Memory Address Register) sets up the address bus with the relevant memory location to be written to

    • MDR (Memory Data Register) passes the data to be written to the data bus

    • The control unit write line is activated

    • Data bus transfers the data to the memory location specified on the address bus

Role of data bus and address bus

• • Bus is defined as a system that transfers data between hardware components

  • data bus and address bus enable a processor to communicate with the primary memory;

  • When the computer processor needs to fetch an instruction from the memory it uses the address bus to specify the (physical) address (of the memory block it needs to access);

  • It will get the data from (the specific) memory (block) (after checking the address bus to get the read address);

  • And then it will place this data on to the data bus/data bus carries the data;

  • When the processor wants to store results of execution to the memory it will set the write address on the address bus;

  • And put the data/results/to be written to memory on to the data bus (to carry this data);

Summary of the Machine Instruction Cycle

Fetch

• • The Control Unit reads the memory address of the next instruction

  • CPU sends the address of an instruction to the  primary memory through the MAR.

  • Instruction in that address is loaded onto the CU through the data bus

  • This instruction is then read from and stored in one of the registers

  • The Control Unit then points to the next instruction

Decode

• • The instruction that was moved to the register is then decoded by the Control Unit, so it understands what needs to be executed

  • The CPU is made aware of any additional data that are necessary for the execution of the instruction

  • Other data the Control Unit needs in order to execute this instruction are stored in the register at this stage

  • Data addresses are placed into the address bus and the data at these addresses are received by the CPU through the data bus

Execute

• • The instruction that has been decoded is then executed

  • Instruction could involved 

    • • fetching data from memory and loading/adding it into the register

      • Writing data to memory

      • Requesting the ALU to perform calculation

      • Changing the address of data

      • Stopping the program

  • The program code is copied from secondary storage (disk) into the main memory (RAM).

Store

• • CPU may store the result in the primary memory

  • The memory address is specified where the  result will be stored in the primary memory via  the address bus then the data at that that address is sent to memory via data bus

  • Program counter is incremented

  • Checks for next instruction

The Operation of Memory

• The MAR and MDR registers act as an interface between the CPU and memory  

• MAR

  • • MAR is a register in the CPU; 

    • Loaded with the address of the next instruction/data; 

    • To be taken from the RAM; 

    • It holds the address in memory which is to be opened for data access;

    • Connected to address decoder that resolves the memory address to be accessed;

• Address decoder

  • • Interprets the address passed from MAR to identify the address to be accessed

    • Activates the appropriate address line in memory for access

• MDR

  • • MDR is a register in the CPU;

    • Holding the data which is most recently;

    • Taken from RAM;

    • MDR is data holding register during memory access;

    • It stores the content of memory that is currently addressed by MAR in case of read

    • Stores the data to be stored into memory in case of write

    • The word size that can be retrieved or stored into memory in a single operation is determined by the size of MDR

There are 3 control lines that control memory access

• • • Address line

      • • There is 1 address line for every memory cell

        • An address line for a particular cell is turned only when addressing data within that cell

    • Read/write line

      • • Determines whether the memory access is a read or a write operation

        • Turned on in case of read and off in case of write

    • Activation line

      • • Used to control the memory access operation

        • Turned on to start a memory access operation (i.e. read or write)

Steps taken to load data from a particular memory location (read operation)

1.        CPU copies the address of memory to be accessed into MAR

2.        CPU sets the Read/Write switch on to indicate a read operation

3.        CPU sets Activation line on to start the data transfer

4.        Data transfer takes place retrieving data from the specified memory location and store it into the MDR register

5.        Data is copied from the MDR into another register depending on the type of read data

Steps taken to store data into a particular memory location (write operation)

1.        CPU copies the address of memory to be accessed into MAR

2.        CPU copies data into MDR

3.        CPU sets the Read/Write switch off to indicate a write operation

4.        CPU sets Activation line on to start the data transfer

5.        Data transfer takes place to store data into the specified memory location

 Note: Only one memory location is addressed at any given time to prevent conflict