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Faculty Development Program on Full-Custom VLSI Design Faculty-Development-Program (FDP) on Mentor-Graphics (HEP-I & HEP-II)
Organized by
Faculty Development Program
on
Full-Custom VLSI Design Faculty-Development-Program (FDP) on Mentor-Graphics (HEP-I & HEP-II)
from
15th -17th, 2019
The Department started its journey with 60 seats in the year 2000. The Department offers Bachelor and Master of Engineering courses. B.Tech intake increased to 90 in 2008. The intake is increased to 120 in 2010. ECE department was accredited by NBA for three years on July 19; 2008.Apart from B.Tech undergraduate course the department has M.Tech in Modern Communication Engineering &M.Tech in Microelectronics Engineering.
ABOUT THE COREEL TECHNOLOGY (I) PVT. LTD:
ABOUT THE XILINX UNIVERSITY PROGRAM:
As the worldwide leader for field programmable gate array (FPGA) solutions, Xilinx is uniquely positioned to partner with educators and advance programs that contribute to a healthy and growing technology industry. The Xilinx University Program helps educators affordably introduce relevant technology courses, and create environments for relevant and engaging learning experiences.
Xilinx University Program (XUP) FDP comprises of presentations combined with hands-on lab exercises. The consist with in areas of FPGA design flow, embedded system design, digital signal processing, high-level synthesis, partial reconfiguration, and embedded linux.
ABOUT THE DEPARTMENT:
Chief Patron
Mr. Tarun Bhattacharya, Treasurer,
Dr. B.C. Roy Engineering College, Durgapur
Patron
Prof. (Dr.) P.Pal.Ray, Director, BCREC
Prof.(Dr.) Narendra Nath Pathak, HoD, ECE, BCREC.
Prof.(Dr.) Sarit Pal, ECE,BCREC
Prof.(Dr.) Chandan Kumar Ghosh, ECE, BCREC.
Technical Advisory Committee:
Prof.(Dr.)Tapas Mondal, ECE,BCREC.
Prof.(Dr.) Mrinmoy Chakraborty, ECE,BCREC.
Prof.(Dr.) Rajib Banerjee, ECE, BCREC.
Prof. Rajdeep Roy, ECE, BCREC.
Prof. Abhijt Banerjee, ECE, BCREC.
Prof. Moutusi Mondal, ECE, BCREC.
Prof. Debipriya Dutta, ECE , BCREC.
Prof. Keka Hajra, ECE, BCREC
Prof. Dipta Chatterjee, ECE,BCREC
Prof. Anirban Chattopadhyay, ECE,BCREC
Prof Ramkrishna Rakshit, ECE,BCREC
Resource Person:
Ankur Sangal, CoreEl Technologies (I) Pvt.Ltd, Banglore
Convener:
Dr. Tribeni Prasad Banerjee,
Electronics and Communication Engineering,
Assistant Professor.
Dr.B.C.Roy Engineering College,Durgapur-713206
Email: tribeniprasad.banerjee@bcrec.ac.in
Joint Convener:
Dr. Aloke Saha,
Electronics and Communication Engineering,
Assistant Professor.
Dr.B.C.Roy Engineering College,Durgapur-713206
Email:aloke.saha@bcrec.ac.in
Electronics and Communication Engineering Department
Dr.B.C.Roy Engineering College,Durgapur-713206
Under
Xilinx University Program
&
Technical Association with
CoreEL Technology, Xilinx,USA
TOPICS TO BE COVERED:
Day-1: ASIC Design:
Basic of ASIC design, full custom design flow, spice net list , spice models &
analysis , layer map file , DRC & LVS rule layout design
Hands-on Practice Session
Day-2: Full coustom design Flow (Demonstration )
schematic design ,
spice simulation using Eldo tool , layout design Layout design
using SDL , caliber DRC ,
Caliber LVS , Caliber PEX ,
post layout simulation
Hands-on Practice Session
Day-3: Hand-on Practice and implementation
Hands on experience with RTL Code writing , simulation , synthesis.
Hands on experience with layout design ( Floor Planning, Placement , routing, DRC, LVS with XRC.
WHO CAN ATTEND:
AICTE approved faculty of ECE/CSE/IT/AEIE/EE department, Research scholars from Engineering Institutes/Engineers from Industries with VLSI Engineering background.
Mentor Graphics
VENUE:
Advance VLSI Design & Xilinx Lab, Ground Floor, ECE Department, Dr. B.C.Roy Engineering College, Durgapur-713206.
Address for correspondence:
Prof.(Dr.) Narendra Nath Pathak, HoD
Electronics and Communication Engineering, Assistant Professor.
Dr.B.C.Roy Engineering College, Jemua Road, Fuljhore, Durgapur: 713206
West Bengal, India
Email: narendra.pathak@bcrec.ac.in
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