VLSI Design Lab
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Dr. B.C.Roy Engineering College, Durgapur
Department of Electronics and Communication Engineering
VLSI Design Lab
EC792
Contacts: 3 Credits: 2
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Laboratory 1: Familiarity with Spice simulation tool (3 Hrs.)
Laboratory 2: Spice Simulation of Inverter, NAND, NOR Gates. ( 3 Hrs.)
Laboratory 3: Familiarity with EDA tools for VLSI design/FPGA based system design (6 Hrs.)
Laboratory 4: Layouts, Transistors and tools,. ( 3 Hrs.)
Laboratory 5: Standars cell Design (3 Hrs.)
Laboratory 6: Design of CMOS XOR/XNOR Gates. (3 Hrs.)
Laboratory 7: Design of CMOS Full adder (3 Hrs.)
Laboratory 8: Design of CMOS Flip flops ( R-S ,D , J-K) (3 Hr.s)
Laboratory 9: Design of 8 bit synchronous Counter (3 Hrs.)
Laboratory 10: Design of 8 bit bi-directional register with tri-stated input/output bus (3 Hrs.)
Laboratory 11: Design of a 12 bit CPU with few instructions and implementation and validation on FPGA (15 Hrs.)
References:
1. M. J. S Smith, Application Specific Integrated circuits, Pearson.
2. P. J Anderson, The designer’s guide to VHDL, Morgan Kaufman, 2nd edition , 2002.
3. W. Wolf , Modern VLSI Design: Systems on silicon , Pearson
4. G. Hatchel and F. Somenzi, logic Synthesis and verification Algorithms, Kluwer,199.
5. J.Bhasker, A VHDL Primer , BS Publications/Pearson Education
References link:
1. http://www.ee.eng.hawaii.edu/~msmith/ASIC/HTML/ASIC.htm#anchor935203
2. http://denethor.wlu.ca/ltspice/#DRAWING
3. http://alan.ece.gatech.edu/index_files/ECE3040index.htm
4. https://nptel.ac.in/content/storage2/courses/117106030/nptel-aic/analogicdesign-intro.pdf
5. BSIM developed by by the Device Group, University of California, Berkeley.
6.http://www.smohanty.org/Teaching.html
8. http://web02.gonzaga.edu/faculty/talarico/ee406/20162017/Cad/LTspiceQuickStart.pdf
Digital Design:
9. Vivado design Guide by Xilinx.
10.Verilog HDL Tutorial ebooks
11.An excellent tutorial on Verilog HDL
Other DE1 & Cyclone V Resources
Quartus Prime Software free web-edition (Download page)
Quartus & DE1-SoC Tutorial Page (containing MANY tutorials, probably too many. Be selective!)
Useful links
Verilog HDL Quick Reference Card
A very good tutorial on IEEE Logic Symbols
Altera's free tutorial on Verilog HDL (interactive video class lasting 45 minutes)
On-line Verilog HDL Quick Reference Guide (free)