Digital Electronics
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Subject Code : IT-304: Digital Electronics
Aim:Â To understand basic concepts of digital logic, its operations, principles and applications.
Objectives: The course is designed to make students:
•  Understand number systems and codes, and Boolean Algebra
•  Understand TTL and CMOS circuit characteristics, followed by logic devices such as flip-flops, code converters, counters, multiplexers, and registers.
Go to class , PPT-1
UNIT I: Binary Systems and logic circuits.
Number Systems: Decimal, Binary, Octal, Hexadecimal numbers and their interconversions.
Binary Arithmetic: Binary addition and subtraction.
Numeric Information Representation: Unsigned Binary numbers, Signed binary numbers. 2’s complement representation and its arithmetic.
Codes (Numeric and Alpha Numeric ): ASCII, Gray, Excess-3, 8-4-2-1, BCD codes.
Error detection and correction Codes: Parity bits, Hamming Codes, CRC codes.
Logic Gates: Basic Gates, Additional Gates: Ex-OR and Ex-NOR Gates, Universal Gates
UNIT II: Boolean Algebra for Circuit analysis and design.
Boolean Algebra: Boolean laws and Demorgon’s theorems
The sum of Product and Product of Sum representation schemes
Simplification of Boolean functions: Two, three, and four variable karnaugh map.
NAND, NOR, and other two-level implementations, Don’t care about conditions.
UNIT III : Combinational circuits.
Design procedure of Various logic circuits: Half adder, full adder, adder-subtractor circuit
Binary parallel adder, parallel subtractor look ahead carry generator
Multiplexers, demultiplexers, decoders and encodersÂ
UNIT IV: Sequential circuit-I (Basic building block)
Simplest circuits with feedback, Memory with cross-coupled gates, R-S latch
Concept of Clocks, J-K flip flop, D-FF, T-FF, Master-slave FF
Concept of Racing, Edge triggering V/S level triggering
Logic Families:
TTL(Transistor Transistor Logic)
CMOS (Complementary MOS)
ECL (Emitter Coupled Logic)
Fan-in, Fan-Out
UNIT V: Sequential Circuit-II (Registers and Counters)
Registers: Buffer Register, Shift register, Controlled Buffer Register with parallel load, Bidirectional shift register
Counters: Binary counter (Ripple counters, Ring): Asynchronous counter, Preset/Offset counters, UP/Down counter, , synchronous counters, Mod-Counter, Non-sequential Counter
ROM , RAM, SRAM , DRAM, and other memories
Case Studies: SAP-1 and SAP-2.
Books
Taub H. and Schilling D, "Digital Integrated Electronics", McGraw Hill .
M. Morris Mano, Charles R. Kime, "Logic and Computer Design Fundamentals", Pearson Prentice Hall, 2008.
Bali,"2000 Solved Problems in Digital Electronics",Tata McGraw-Hill Education,2006.
Malvino and Brown, "Digital Computer Electronics", Tata Mc Graw Hill Publications, 2006.
D.P. Leach & A.P. Malvino, Digital Principles and Application,TMH,6e, 2006.
Ronald J. Tocci, Digital System: Principles and application, Pearson Education, 2007.
T.C. Bartee, Digital Computer Fundamentals, 6th Edition, Tata McGraw Hill, 1991.
Tutorials
Shraddha B./ Anju. -Algorithms for Binary Multiplications (3/8/2017) Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â [Algorithm, Flowchart, Link, PDF] [ Github link ]
Shraddha B./ Anju. -Booth's Algorithm (3/8/2017) Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â [Algorithm, Flowchart, Link, PDF][ Github link ]
Shraddha B./ Anju : Algorithms for Floating point arithmetic, concept of overflow and underflow (Addition, Subtraction, Multiplications, Division) (3/8/2017) Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â [Algorithm, Flowchart, Link, PDF][ Github link ]
Master-Link-Internal Test
Projects
Number System Converter- from Any base to any other base (Web based , App ) [Algorithm, Flowchart, Link, PDF]
Numeric Code Converter -from BCD to Gray ,BCD to Excess-3 (Vice Versa)Â Â Â Â Â Â [Algorithm, Flowchart, Link, PDF]
Simulator Tool Links
K-Map
Web based K-map solver (Output K-map, Grouping, Boolean function,Circuit, Truth Table )Â
http://www.mathematik.uni-marburg.de/~thormae/lectures/ti1/code/karnaughmap/