Development of methods to improve the inference throughput/accuracy of CNNs on SoC (as Research Associate in ENEAC project – University of Bristol)
Targeting a floating-point CNN on CPU and its binarized implementation on FPGA and their integration on a SoC could help improve the total throughput and accuracy of an inference application. Implementation of the multi-precision solutions and introduction of a method to integrate them for one application was the main purpose of this work.