7. Tiantao Lu, Zhiyuan Yang, and Ankur Srivastava, Electromigration-aware Placement for 3D-ICs, in the Proceedings of International Symposium on Quality Electronic Design (ISQED), 2016. [PDF][Bib]
8. Tiantao Lu, Zhiyuan Yang, and Ankur Srivastava, Post-Placement Optimization for Thermal-induced Mechanical Stress Reduction, in the Proceedings of 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2016). [PDF][Bib]
9. Tiantao Lu, Caleb Serafy, Zhiyuan Yang, and Ankur Srivastava, Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs, in the Proceedings of 2016 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2016). [PDF][Bib]
6. Caleb Serafy, Tiantao Lu, and Ankur Srivastava, Thermal-Reliability Physical Co-Optimization during Architectural Design Space Exploration of 3D-CPUs, accepted, GOMACTech, 2016.
Journal & Book chapter
1. Tiantao Lu and Ankur Srivastava, Modeling and Layout Optimization for Tapered TSVs, in IEEE Trans. on Very Large Scale Integration Systems (TVLSI), 2015 [PDF] [Bib]
2. Tiantao Lu and Ankur Srivastava, Detailed electrical and reliability study of tapered TSVs, in Physical Design for 3D Integrated Circuits [link]
3. Yang Xie, Chongxi Bao, Caleb Serafy, Tiantao Lu, Ankur Srivastava, and Mark Tehranipoor, Security and Vulnerability Implications of 3D ICs, in IEEE Transactions on Multi-Scale Computing Systems (TMSCS). [PDF][Bib]
4. Tiantao Lu, and Ankur Srivastava, Low-Power Clock Tree Synthesis for 3D-ICs, in ACM Transactions on Design Automation of Electronic Systems (TODAES). [PDF][Bib]
5. Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sung Kyu Lim, and Ankur Srivastava, 3D ICs: Design Methods and Tools, Keynote paper, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). [PDF][Bib]
6. Tiantao Lu and Ankur Srivastava, Physical Design for High-Performance, Low-Power, and Reliable 3D Integrated Circuit, to appear in Semiconductor Manufacturing Handbook, 2017
Conference
1. Tiantao Lu and Ankur Srivastava, Detailed electrical and reliability study of tapered TSVs, IEEE 3D System Integration Conference (3DIC), 2013 [PDF] [Bib]
2. Tiantao Lu and Ankur Srivastava, Gated Low-power Clock Tree Synthesis for 3D-ICs, International Symposium on Low Power Electronics and Design (ISLPED), 2014 [PDF][Bib]
3. Tiantao Lu and Ankur Srivastava, Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs, to appear in Proceedings of the 25th ACM International Conference on Great lakes Symposium on VLSI (GLSVLSI'15). ACM, 2015 [PDF] [Bib].
4. Tiantao Lu, Zhiyuan Yang, and Ankur Srivastava, Electromigration-aware Placement for 3D-ICs, accepted as poster in IEEE/ACM Design Automation Conference (DAC'15).
5. Tiantao Lu and Ankur Srivastava, Electrical-Thermal-Reliability Co-Design for TSV-based 3D-ICs, in Proceedings of the 13th International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems (InterPACK'15). [PDF][Bib]