Conference

International

[591] Hyeongsu Kim, Inseok Lee, Woo Young Choi, Byung-Gook Park, Jong-Ho Lee, "Variation-robust Binary Matrix-vector Multiplication Method," International Conference on Solid State Devices and Materials (SSDM), Sep. 2022

[590] Jangsaeng Kim, Woo Young Choi, Byung-Gook Park, Jong-Ho Lee, "Implementation of Homeostasis Functionality in Hardware-Based Spiking Neural Networks Using an STDP Learning Rule," International Conference on Solid State Devices and Materials (SSDM), Sep. 2022

[589] Munhyeon Kim, Sihyun Kim, Kitae Lee, Hyun-Min Kim, Changha Kim, Dong-Oh Kim, Byung-Gook Park, and Daewoong Kwon, "Analysis on Endurance Characteristics of Ferroelectric Memory Device," Internation Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jul. 2022

[588] Donghyun Ryu, Yeonwoo Kim, Taejin Jang, seunghwan Song, Bosung Jeon, and Byung-Gook Park, "Investigation of Poly-Si TFT Base U-shaped Channel Synaptic Device," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2022

[587] Yeonwoo Kim, Bosung Jeon, Kyungchul Park, and Byung-Gook Park, "Analog-Digital Hybrid Neuron With Up/Down Counter for Neuromorphic System," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2022

[586] Junsu Yu, Sungmin Hwang, Hyungjin Kim, and Byung-Gook Park, "Investigation of Coupling Effect on Capacitor-based Neural Network," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2022

[585] Sungjoon Kim, Tae-Hyeon Kim, Kyungho Hong, Hyungjin Kim, and Byung-Gook Park, "Forming, Compliance Free Operation in Al2O3/TiOx Based RRAM Array Using Naturally Generated AlOx Interlayer," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2022

[584] Seunghwan Song, Bosung Jeon, Taejin Jang, Donghyun Ryu, and Byung-Gook Park, "Accurate and Stable SNN Inference Management System with Pulse Synchronization and Transfer Control Modules," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2022

[583] Young Suh Song, Shubham Tayal, Shiromani Balmukund Rahi, Jang Hyun Kim, Abhishek Kumar Upadhyay, and Byung-Gook Park, "Thermal-Aware IC Chip design by Combining High Thermal Conductivity Materials and GAA MOSFET," International Conference on Circuits, Systems and Simulations (ICCSS), May. 2022

[582] Kyungchul Park, Sungmin Hwang, Jeesoo Chang, Kyungkyu Min, Taejin Jang, Bosung Jeon, Youngsan Cha, Jong-Ho Lee, and Byung-Gook Park, "Neuron Circuit Using Current Mirror to Ensure High Output Linearity in SNNs," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2021

[581] Junsu Yu, Kyung Kyu Min, Yeonwoo Kim, Daewoong Kwon, Byung-Gook Park, "Guideline of optimum interfacial layers in metal-ferroelectric-insulator-semiconductor structure for gate stack and ferroelectric tunnel junction," IEEE Silicon Nanoelectronics workshop (SNW), Jun, 2021

[580] Md. Hasan Raza Ansari, Daehwan Kim, Seongjae Cho, Jong-Ho Lee, and Byung-Gook Park, "Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity," 2021 IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Apr. 2021

[579] Yujeong Jeong, Wonjun Shin, Seongbin Hong, Gyuweon Jung, Jinwoo Park, Dongkyu Jang, Donghee Kim, Dongseok Kwon, Byung-Gook Park, and Jong-Ho Lee "Highly Sensitive Amplifier Circuit Consisting of Complementary pFET-type and Resistor-type Gas Sensors," 2020 IEEE International Electron Devices Meeting, Dec. 2020

[578] Wonjun Shin, Seongbin Hong, Yujeong Jeong, Gyuweon Jung, Jinwoo Park, Dongseok Kwon, Dongkyu Jang, Donghee Kim, Byung-Gook Park, and Jong-Ho Lee "Efficient Improvement of Sensing Performance Using Charge Storage Engineering in Low Noise FET-type Gas Sensors," 2020 IEEE International Electron Devices Meeting, Dec. 2020

[577] Young Suh Song, Jang Hyun Kim, Sangwan Kim, Garam Kim, Hyun-Min Kim, Hyunwoo Kim, Junsu Yu, and Byung-Gook Park, "Improvement of Self-heating Effect in Ge Vertically Stacked Gate-all-around pMOSFET by utilizing Al2O3 and its scaling behaviors," International Microprocesses and Nanotechnology Conference (MNC), Nov. 2020

[576] Wonjun Shin, Seongbin Hong, Yujeong Jeong, Gyuweon Jung, Jinwoo Park, Donghee Kim, Byung-Gook Park, and Jong-Ho Lee, "Effect of Post-Deposition Annealing Temperature on H2S Sensing and Low-Frequency Noise Characteristics of In2O3 Gas Sensor," Solid State Devices and Materials (SSDM), Sep. 2020

[575] Kitae Lee, Sihyun Kim, and Byung-Gook Park, "Influence of Gate to Drain Underlap on Negative Differentiala href="http://smdl.s Resistance in Ferroelectric FET," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2020

[574] Sihyun Kim, Kitae Lee, and Byung-Gook Park, "Study on Etch Slope in Fin and Source Drain Etch Process of Vertically-Stacked Nanosheet Gate-All-Around MOSFET," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2020

[573] Kyungkyu Min, Sungmin Hwang, Jong-Ho Lee, and Byung-Gook Park, "Highly scalable 4F2 cell transistor for future DRAM," IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2020

[572] Won-Mook Kang, Soochang Lee, Jangsaeng Kim, Byung-Gook Park, and Jong-Ho Lee, "Unsupervised Learning Architecture Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices." IEEE Silicon Nanoelectronics Workshop (SNW), Jun 2020

[571] Nagyong Choi, Ho-Jung Kang, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, "Effect of Nitrogen Content in Tunneling Dielectric on Cell Properties of 3-D NANA Flash Cells," IEEE Electron Device Letters, Vol. 40, no. 5, pp. 702-705, May 2020 [SCI]

[570] Yunho Choi, Hyun-Min Kim, Junil Lee, Sangwan Kim, Jong-Ho Lee and Byung-Gook Park, "Simulation of the Effect of Grain Size and Grain Boundary Position on Tunneling Thin Film Transistors," International Conference on Electronics, Information, and Communication (ICEIC), pp 137-140, Jan. 2020

[569] Suhyun Bang, Min-Hye Oh, Min-Hwi Kim, Tae-Hyeon Kim, Dong Keun Lee, Yeon-Joon Choi, Chae Soo Kim, Kyungho Hong, Seongjae Cho, Sungjun Kim, and Byung-Gook Park, "Validation of Spiking Neural Networks Using Resistive-Switching Synaptic Device with Spike-Rate-Dependent Plasticity," International Conference on Electronics, Information, and Communication (ICEIC), pp 373-376, Jan. 2020

[568] Soyoun Kim, Kitae Lee, Sihyun Kim, Munhyeon Kim, Junil Lee, Ryoongbin Lee, Sangwan Kim and Byung-Gook Park, "Comparative Study on Device Performance for the Shape of Tapered FinFETs and Gate-All-Around FETs in Sub- 7 nm CMOS Technology," International Conference on Electronics, Information, and Communication (ICEIC), pp 137-140, Jan. 2020

[567] Sung-Tae Lee, Hyeongsu Kim, Jong-Ho Bae, Honam Yoo, Nag Yong Choi, Dongseok Kwon, Suhwan Lim, Byung-Gook Park and Jong-Ho Lee, "High-Density and Highly-Reliable Binary Neural Networks Using NAND Flash Memory Cells as Synaptic Devices," IEEE International Electron Devices Meeting (IEDM), Dec. 2019

[566] Dongkyu Jang, Gyuweon Jung, Yujeong Jeong, Yoonki Hong, Seongbin Hong, Wonjun Shin, Ki Soo Chang, Chan Bae Jeong, Byung-Gook Park and Jong-Ho Lee, "Efficient Integration of Si FET-type Gas Sensors and Barometric Pressure Sensors on the Same Substrate," IEEE International Electron Devices Meeting (IEDM), Dec. 2019

[565] Young Suh Song, Taejin Jang, Kyung Kyu Min, Myung-Hyun Baek, Junsu Yu, and Byung-Gook Park, “Improving Retention in Nonvolatile Charge-Trapping Memory Cell by Incorporating TFET TAHOAOS (TaN/Al2O3/HfO2/SiO2/Al2O3/SiO2/Si) Structure,” International Microprocesses and Nanotechnology Conference (MNC), Oct. 2019

[564] Myung-Hyun Baek, Taejin Jang, Sungmin Hwang, Suhyeon Kim, and Byung-Gook Park, “Weight Update / Inhibition Method for NOR Flash Based Polysilicon Synapse Array,” International Conference on Solid State Devices and Materials (SSDM), Sep. 2019

[563] Suhyeon Kim, Min-Woo Kwon, Kyungchul Park, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, Junil Lee, and Byung-Gook Park, “Synapse Device for Low Voltage Operation and High Conductance Linearity Using Positive Feedback Field Effect Transistor,” International Conference on Solid State Devices and Materials (SSDM), Sep. 2019

[562] Seongbin Oh, Soochang Lee, Jang-Saeng Kim, Byung-Gook Park and Jong-Ho Lee, “Analyzation of pruning in spiking neural networks trained by STDP and Back propagation,” International Conference on Solid State Devices and Materials (SSDM), Sep. 2019

[561] Kyoung Yeon Kim and Byung-Gook Park, “Transient Simulation of Field-Effect Biosensors: How to Avoid Charge Screening,” International conference on simulation of semiconductor process and devices (SISPAD), Sep. 2019

[560] Nagyong Choi, Byung-Gook Park and Jong-Ho Lee, “Analysis on Erase Characteristics of Diode-Type NAND Flash Memory Cell Strings,” Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2019

[559] Won-Mook Kang, Chul-Heung Kim, Soochang Lee, Sung Yun Woo, Jong-Ho Bae, Byung-Gook Park, Jong-Ho Lee, “A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices,” International Joint Conference on Neural Networks (IJCNN), Jul. 2019

[558] Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, “Improved Gradual Reset Phenomenon in SiNx-based RRAM by Diode-Connected Structure,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2019

[557] Dong Keun Lee, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Yeon-Joon Choi, Sungjun Kim, Seongjae Cho and Byung-Gook Park, “Comparison of switching characteristics of HfOx RRAM device with different switching layer thickness,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2019

[556] Ryoongbin Lee, Junil Lee, Sangwan Kim, Kitae Lee, Sihyun Kim, Soyoun Kim, Yunho Choi, and Byung-Gook Park, “Ge Condensation Process for High ON/OFF Ratio of SiGe Gate-All-Around Nanowire Tunnel Field-Effect Transistor,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2019

[555] Jeesoo Chang, Min-Hye Oh, and Byung-Gook Park, “A systematic model parameter extraction using differential evolution searching,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2019

[554] Soyoun Kim, Seungkwon Kim, Jaechul Kim, Byungha Choi, Y.Yasuda Masuoka, Sangduk Kwon, and Byung-Gook Park, “Sub-10 nm Advanced FinFET Design for Different Applications in Various Vdd and Temperature Ranges,” IEEE Symposia on VLSI Technology and Circuits, Jun. 2019

[553] Dong Keun Lee, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Yeon-Joon Choi, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, “Effect of tunneling barrier layer insertion on HfO2-based RRAM,” International Techninal Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jun. 2019

[552] Yoohyun Noh, Yungtak Seo, Byung-Gook Park, and Jong-Ho Lee, “Synaptic Devices Based on 3-D AND Flash Memory Architecture for Neuromorphic Computing,” International Memory Workshop (IMW), May. 2019

[551] Sung-Tae Lee, Suhwan Lim, Jong-Ho Bae, Dongseok Kwon, Hyeong-Su Kim, Byung-Gook Park, and Jong-Ho Lee, “Dot Product Engine Using Gated Schottky Diode with Quantized Weight,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2019

[550] Min-Hye Oh, Suhyun Bang, Min-Woo Kwon, and Byung-Gook Park, “A new device characteristic model generation by machine learning,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2019

[549] Soyoun Kim, Sihyun Kim, Kitae Lee, Munhyeon Kim, Ryoongbin Lee, Sangwan Kim, and Byung-Gook Park, “Accurate Effective Width Extraction Methods for Sub-10nm Multi-Gate MOSFETs through Capacitance Measurement,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2019

[548] Munhyeon Kim, Kitae Lee, Sihyun Kim, Soyoun Kim, Sangwan Kim, and Byung-Gook Park, “Novel Stacked Floating Fin Structure Gate-All-Around Field-Effect Transistor for Design and Power Optimization,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2019

[547] Kitae Lee, Junil Lee, Sihyun Kim, Soyoun Kim, Munhyeon Kim, Sangwan Kim, and Byung-Gook Park, “Analysis on Fully Depleted Negative Capacitance Field-Effect Transistor (NCFET) Based on Electrostatic Potential Difference,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2019

[546] Sung-Tae Lee, Suhwan Lim, Nagyong Choi, Jong-Ho Bae, Dongseok Kwon, Hyeog-Su Kim, Byung-Gook Park, and Jong-Ho Lee, “Input Voltage Scheme For Dot Product Engine Using NAND Flash Cells,” China Semiconductor Technology International Conference (CSTIC), Mar. 2019

[545] Kyoung Yeon Kim, and Byung-Gook Park, "Sensitivity enhancement of the bio-FET using transient measurement," International Conference on Electronics, Information, and Communication (ICEIC), pp 470-471, Jan. 2019

[544] Yeon-Joon Choi, Min-Hwi Kim, Tae-Hyeon Kim, Dong Keun Lee, Suhyun Bang, Kyungho Hong,Chaesoo Kim, Sungjun Kim, and Byung-Gook Park, "Trap and Electron Occupancy Analysis in Si3N4 Resistive Switching Layer," International Conference on Electronics, Information, and Communication (ICEIC), pp 173-175, Jan. 2019

[543] Yoonki Hong, Seongbin Hong, Dongkyu Jang, Yujeong Jeong, Meile Wu, Gyuweon Jung, Jong-Ho Bae, Jun Shik Kim, Ki Soo Chang, Chan Bae Jeong, Cheol Seong Hwang, Byung-Gook Park, and Jong-Ho Lee, "A Si FET-type Gas Sensor with Pulse-driven Localized Micro-heater for Low Power Consumption," 2018 IEEE International Electron Devices Meeting, pp. 12.6.1-12.6.4, Dec. 2018

[542] Soyoun Kim, Sihyun Kim, Kitae Lee, Munhyeon Kim, Suhyeon Kim, Junil Lee, Ryoongbin Lee, Sangwan Kim, Y. Yasuda-Masuoka, and Byung-Gook Park, "Ultra-low Leakage Technology for sub 10nm FinFET and GAAFET by Optimized Anti Punch-through Implantation," 31th International Microprocesses and Nanotechnology Conference, Nov. 2018

[541] Eunseon Yu, Seongjae Cho, and Byung-Gook Park, "A stand-alone synaptic transistor embedding SiGe quantum well and charge-trap layer with capabilities of short- and long-term potentiation in the biological system," 31th International Microprocesses and Nanotechnology Conference, Nov. 2018

[540] Min-Hwi Kim, Sungmin Hwang, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, "Sophisticated Conductivity Control of Gradual RRAM Cross-point Array for Reinforcement Learning," 31th International Microprocesses and Nanotechnology Conference, Nov. 2018

[539] Dong Keun Lee, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Yeon-Joon Choi, Kyungho Hong, Chaesoo Kim, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, "Scaling Effect of Ti/HfO2/Si-p+ Stacked Resistive Switching device for Neuromorphic Application," 31th International Microprocesses and Nanotechnology Conference, Nov. 2018

[538] Sihyun Kim, Kitae Lee, Munhyeon Kim, Soyoun Kim1, Suhyeon Kim, Sangwan Kim, and Byung-Gook Park, "Channel Thickness and Interfacial Trap Variation Induced by Selective-Channel-Etching in Stacked Gate-All-Around MOSFET shaving Multi-Channel-Width," 31th International Microprocesses and Nanotechnology Conference, Nov. 2018

[537] Yongbeom Cho, Myung-Hyun Baek, Seongjae Cho, and Byung-Gook Park, “Semi-Floating-Gate Synaptic Transistor (SFGST) and Its Array Architecture for Hardware-Driven Artificial Spike Neural Network (SNN),” International Conference on Solid State Devices and Materials (SSDM), Sep. 2018

[536] Min-Woo Kwon, Kyungchul Park, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, Taehyung Kim, Junil Lee, and Byung-Gook Park, “Capacitor-less Leaky Integrate and Fire Neuron Circuit Using Positive Feedback Field Effect Transistor for Low Energy Consumption,” International Conference on Solid State Devices and Materials (SSDM), Sep. 2018

[535] Yeon-Joon Choi, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Seongjae Choi, and Byung-Gook Park, "Reliability Prediction of a Wedge-Structured CBRAM through Monte Carlo Simulation," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2018

[534] Kyungchul Park, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, and Byung-Gook Park, "Reconfigurable Positive Feedback Field-Effect Transistor with Dual Gate Structure for Low Power System," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2018

[533] Min-Woo Kwon, Kyungchul Park, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, Junil Lee, Sungmin Hwang, Seongjae Cho, and Byung-Gook Park, "Fabrication of dual gate positive feedback field effect transistor co-integrated with CMOS," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2018

[532] Jeesoo Chang, Sungmin Hwang, and Byung-Gook Park, “Global Weight Quantization for Simplified Model Transfer on Hardware-based Neural Network,” 2018 International Techninal Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp.82-85, Jul. 2018

[531] Ryoongbin Lee, Junil Lee, Sangwan Kim, Sihyun Kim, Euyhwan Park, and Byung-Gook Park, “Variation Effect of Ge Concentration in SiGe Channel of Vertically stacked Tunnel Field-effect Transistor (TFET),” 2018 International Techninal Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp.82-85, Jul. 2018

[530] Jae Yoon Lee, Min Hwi Kim, Yeon-Joon Choi, Jae Yeon Lee, Soo Gil Kim, Seongjae Cho, and Byung-Gook Park, “Compact modeling of fully Si-compatible forming-free Ni/GeOx/p+ Si resistive-switching random-access memory (ReRAM),” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[529] Yongbeom Cho, Eunseon Yu, Myung-Hyun Baek, Seongjae Cho, and Byung-Gook Park, “Semi-floating-gate (SFG) synaptic transistor capable of short- and long-term memory operations towards the hardware-driven neuromorphic system,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[528] Jong-Ho Bae, Suhwan Lim, Dongseok Kwon, Sungtae Lee, Byung-Gook Park, and Jong-Ho Lee, “Investigation of Current Saturation and Short Channel Effect in Gated Schottky Diode-type Synaptic Device under Reverse Bias Condition,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[527] Nagyong Choi, Ho-Jung Kang, Byung-Gook Park, and Jong-Ho Lee, “3-D NAND Flash Memory with Elliptical Poly-Si Tube,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[526] Young-Tak Seo, Kyung Do Kim, Ho-Jung Kang, Byung-Gook Park, and Jong-Ho Lee, “Characterization of the Effect of Copper Diffusion from Through Silicon Via(TSV) with Annealing Temperature,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[525] Junil Lee, Ryoongbin Lee, Euyhwan park, Sihyun Kim, Hyun-Min Kim, Kitae Lee, Soyoun Kim, Sangwan Kim, Jong-Ho Lee, and Byung-Gook Park, “Drive Current Boosting Method of Fin-structure Tunnel Field-effect Transistor with Locally Concentrated Silicon-Germanium Channel,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[524] Dong Keun Lee, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Yeon-Joon Choi, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, “Improvement of HfO2-based ReRAM's Nonlinearity and Reset Current Level by Tunneling Barrier Layer Thickness Modulation,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[523] Sungmin Hwang, Min-Woo Kwon, Myung-Hyun Baek, Suhyeon Kim, Jeesoo Chang, Hyungjin Kim, and Byung-Gook Park, “Reducing Backflow Currents in Flash-Based Synapse Array for Neuromorphic Systems,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[522] Myung-Hyun Baek, Sungmin Hwang, Taejin Jang, Min-Woo Kwon, and Byung-Gook Park, “Analysis of Long-term Memory Property at Asymmetric Dual gate Synaptic Transistor,” IEEE Silicon Nanoelectronics Workshop (SNW), Jun. 2018

[521] Sung-Tae Lee, Suhwan Lim, Nagyong Choi, Jong-Ho Bae, Chul-Heung Kim, Soochang Lee, Dong Hwan Lee, Tackhwi Lee, Sungyong Chung, Byung-Gook Park, and Jong-Ho Lee, “Neuromorphic Technology Based on Charge Storage Memory Devices,” IEEE Symposia on VLSI Technology and Circuits, Jun. 2018

[520] Ho-Jung Kang, Nagyong Choi, Dong Hwan Lee, Tackhwi Lee, Sungyong Chung, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, “Space Program Scheme for 3-D NAND Flash Memory Specialized for the TLC Design,” IEEE Symposia on VLSI Technology and Circuits, Jun. 2018

[519] Nagyong Choi, Ho-Jung Kang, Sung-Min Joe, Byung-Gook Park, and Jong-Ho Lee, “Reconfigurable Cell String Having FET and Super-Steep Switching Diode Operation in 3D NAND Flash Memory,” Electron Devices Technology Manufacturing (EDTM) conference, Mar. 2018

[518] Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, “Analysis of back-bias effect of multi-channel nanowire Tunnel Field-Effect Transistors (TFETs),” International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2018

[517] Min-Woo Kwon, Myung-Hyun Baek, Kyungchul Park, and Byung-Gook Park, “ Capacitor-less Integrated-and-Fire neuron circuit with positive feedback field effect transistor,” International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2018

[516] Seunghyun Kim, Youngmin Kim, Do-Bin Kim, Sang-Ho Lee, Seongjae Cho, and Byung-Gook Park, “ Effects of charge centroid location on program characteristics in the charge-trap flash memory,” International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2018

[515] Sang-Ho Lee, Dae Woong Kwon, Do-Bin Kim, Seunghyun Kim, Myung-Hyun Baek, and Byung-Gook Park, “ Simulation Study of Transient Current Characteristics with Scaling-down of Body Thickness of Polysilicon Channel Devices,” International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2018

[514] Ryoongbin Lee, Suhyeon Kim, Sangwan Kim, Sihyun Kim, Junil Lee, Euyhwan Park, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, “Simulation Study on Influence of Interface Trap Positon in Si1-xGex Gate-All-Around (GAA) Field-Effect Transistor,” International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2018

[513] Hyungjin Kim, Myung-Hyun Baek, Sungmin Hwang, Taejin Jang, Hyun-Min Kim, and Byung-Gook Park, "Asymmetric dual-gate FinFETs for multiple applications and their fabrication method," International Conference on Advanced Materials and Devices, Dec. 2017

[512] Seongjae Cho, and Byung-Gook Park, "Si and novel group-IV materials and devices for advanced VLSI system," International Technical Conference on Circuits/Systems, Computers and Communications (invited), Jul. 2017

[511] Yongbeom Cho, Youngmin Kim, Junsoo Lee, Seongjae Cho, and Byung-Gook Park, "Nanowire TFET-Based Floating-Body Synaptic Transistor," Europe-Korea Conference on Science and Technology, Jul. 2017

[510] Dong Keun Lee, Min-Hwi Kim, Tae-Hyeon Kim, Suhyun Bang, Yeon-Joon Choi and Byung-Gook Park, "Multi-Level Switching Characteristics of SiNx-Based Nano-Wedge Resistive Switching Memory," 2017 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 333-335, Jul. 2017

[509] Tae-Hyung Kim, Sungmin Hwang and Byung-Gook Park, "Evaluation on Endurance of Various STDP Algorithms Applied on Leaky Integrate-and-Fire(LIF) Spiking Neural Network(SNN) Model," 2017 International Techninal Conference on Circuits/Systems, Computers and Communications, Jul. 2017

[508] Suhyun Bang, Sungjun kim, Min-Hwi Kim, Tae-Hyeon Kim, Dong-Keun Lee, and Byung-Gook Park, "Investigation on the RRAM Overshoot Current Suppression with Circuit Simulation," Silicon Nanoelectronics Workshop 2017, pp. 81-82, Jun. 2017

[507] Dong Keun Lee, Sungjun Kim, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim and Byung-Gook Park, "Fabrication of Nano-Wedge Resistive Switching Memory and Analysis on Its Switching Characteristics," Silicon Nanoelectronics Workshop 2017, pp. 55-56, Jun. 2017

[506] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Suhyun Bang, Dong kuen Lee, Yao-Feng Chang, and Byung-Gook Park, "Characterization of Resistive Switching Memory Devices with Tunnel Barrier," Silicon Nanoelectronics Workshop 2017, pp. 87-88, Jun. 2017

[505] Min-Woo Kwon , Sungmin Hwang, Myung-Hyun Baek, Seongjae Cho, and Byung-Gook Park, "Dual Gate Positive Feedback Field-Effect Transistor for Low Power Analog Circuit," Silicon Nanoelectronics Workshop 2017, pp. 115-116, Jun. 2017

[504] Do-Bin Kim, Dae Woong Kwon, Seunghyun Kim, Sang-Ho Lee, and Byung-Gook Park, "A Boosted Common Source Line Program Scheme in Channel Stacked NAND Flash Memory with Layer Selection by Multilevel-Operation," Silicon Nanoelectronics Workshop 2017, pp. 77-78, Jun. 2017

[503] Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Simulation Study on Temperature Dependence of MOSFET and TFET-based pH-sensitive ISFET," Silicon Nanoelectronics Workshop 2017, pp. 93-94, Jun. 2017

[502] Min-Hwi Kim, Sungjun Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Seongjae Cho, Jong-Ho Lee, and Byung-Gook Park, "Uniformity Improvement of SiNx based Resistive Switching Memory by Suppressed Internal Overshoot Current," Silicon Nanoelectronics Workshop 2017, pp. 19-20, Jun. 2017

[501] Jeong-Jun Lee, Min-Woo Kwon, Hyungjin Kim, Sungmin Hwang, and Byung-Gook Park, "Implementation of Inhibitory operation in Neuromorphic System," Silicon Nanoelectronics Workshop 2017, pp. 113-114, Jun. 2017

[500] Hyungjin Kim, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Sihyun Kim, Taejin jang, Jeong-Jun Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, "Gated-Thyristor DRAM Cell with Pillar Channel Structure," Silicon Nanoelectronics Workshop 2017, pp. 71-72, Jun. 2017

[499] Seunghyun Kim, Do-Bin Kim, Eunseon Yu, Sang-Ho Lee, Seongjae Cho, and Byung-Gook Park, "Effects of nitrdie trap layer properties on location of charge centroid in charge-trap flash memory," Silicon Nanoelectronics Workshop 2017, pp. 79-80, Jun. 2017

[498] Tae-Hyeon Kim, Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Suhyun Bang, Dong Keun Lee, and Byung-Gook Park, "Fabrication of Nano-cone RRAM and Analysis of its Electrical Concentration Effect," ChinaRRAM International Workshop, Jun. 2017

[497] Sungjun Kim, Yao-Feng Chang, Ying-Chen Chen, Byung-Gook Park, and Jack C. Lee, "Resistive Switching Characteristics and Mechanisms in Silicon Oxide and Silicon Nitride Memristors," ChinaRRAM International Workshop, Jun. 2017

[496] Tae-Hyeon Kim, Sungjun Kim, Min-Hwi Kim, Su-Hyun Bang, Dong Keun Lee, and Byung-Gook Park, "Reset Current Reduction for RRAM with Si Bottom Electrode," 2017 International Conference on Electronics, Information, and Communication, pp. 97-98, Jan. 2017

[495] Seunghyun Kim, Do-Bin Kim, Sang-Ho Lee, Sang-Ku Park, Youngmin Kim, Seongjae Cho, and Byung-Gook Park, "Circuit-level macro modeling of charge-trap flash memory array," 2017 International Conference on Electronics, Information, and Communication, pp. 99-100, Jan. 2017

[494] Sang-Ho Lee, Dae Woong Kwon, Seunghyun Kim, Sangku Park, Myung-Hyun Baek, and Byung-Gook Park, "Investigation of Drain Current Transient Behavior by Step Gate Bias in Polysilicon Channel Device," 2017 International Conference on Electronics, Information, and Communication, pp. 115-116, Jan. 2017

[493] Jongmin Shin, Yoonki Hong, Meile Wu, Younjin Jang, Jun Shik Kim, Byung-Gook Park, Cheol Seong Hwang, and Jong-Ho Lee, "Highly Improved Response and Recovery Characteristics of Si FET-type Gas Sensor Using Pre-bias," 2016 International Electron Devices Meeting, pp. 18.1.1-18.1.4, Dec. 2016

[492] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Tae-Hyeon Kim, Suhyun Bang, Seongjae Cho, and Byung-Gook Park, "Si 3 N 4 -Based RRAM with Flexibility of Physical Design," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[491] Min-Hwi Kim, Sunghun Jung and Byung-Gook Park, "Fabrication of Silicon Nano-wedge Structure by Anisotropic Chemical Etch Process using TMAH Solutions," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[490] Do-Bin Kim, Dae Woong Kwon, Bong-Su Jo, Gyu Seog Choi, Sung-Kye Park, and Byung-Gook Park, "Improving Read Disturbance in Channel Stacked NAND Flash Memory With Layer Selection by Multilevel Operation," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[489] Sihyun Kim, Dae Woong Kwon, Euyhwan Park, Junil Lee, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, "Investigation of Silicide-Induced Dopant Activation for Steep Tunnel Junction in Tunneling Field Effect Transistor (TFET)," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[488] Euyhwan Park, Dae Woong Kwon, Junil Lee, Sihyun Kim, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, "Back-gate effect on multi-channel nanowire Tunnel Field-Effect Transistors (TFETs) for Modulating Turn-on point," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[487] Ryoongbin Lee, Dae Woong Kwon, Junil Lee, Euyhwan Park, Sihyun Kim, and Byung-Gook Park, "Demonstration of Reconfigurable Field Effect Transistor (RFET) for 3D Stacked TFET Application," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[486] Dae Woong Kwon, Euyhwan Park, Junil Lee, Ryoongbin Lee, Sihyun Kim, Hyun Min Kim, and Byung-Gook Park, "Capacitor-less DRAM cell using thyristor vertically fabricated with polycrystalline silicon," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[485] Min-Woo Kwon, Jungjin Park, Myung-Hyun Baek, Sungmin Hwang, and Byung-Gook Park, "Spiking Neural Networks with Unsupervised Learning Based on STDP Using Resistive Synaptic Devices and Analog CMOS Neuron Circuit," 29th International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2016

[484] Hyungjin Kim, Jong-Ho Lee and Byung-Gook Park, "Combination of Volatile and Non-volatile Functions in A Single Memory Cell with Independent Asymmetric Dual-Gate Structure," 2016 International Conference on Solid State Devices and Materials, pp. 95-96, Sep. 2016

[483] Hyungjin Kim and Byung-Gook Park, "A combined volatile-nonvolatile memory cell with asymmetric dual-gate structure," The 20th International Vacuum Congress, p. 366, Aug. 2016

[482] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Su Hyun Bang, Min Ju Yun, Hee-Dong Kim, Seongjae Cho and Byung-Gook Park, "Dopant concentration dependent resistive switching characteristics in silicon nitride-based memory devices," The 20th International Vacuum Congress, p. 459, Aug. 2016

[481] Tae-Hyeon Kim, Sungjun Kim, Min-Hwi Kim, Su Hyun Bang, Dong Keun Lee and Byung-Gook Park, "Effect of si bottom electrode on resistive switching characteristics for Sicompatible 3D vertical memory," The 20th International Vacuum Congress, p. 461, Aug. 2016

[480] Su-Hyun Bang, Sungjun Kim, Hyungjin Kim, Tae-Hyeon Kim, and Byung-Gook Park, "Self-rectifying resistive switching Characteristics in Cu/IGZO/Si structure," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 323-326, Jul. 2016

[479] Jungjin Park, Hyungjin Kim, Min-Woo Kwon, Sungmin Hwang and Byung-Gook Park, "Autonomous Neuromorphic System with Four-Terminal Si-Based Synaptic Devices," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 331-334, Jul. 2016

[478] Byung-Gook Park, Hyungjin Kim, Jungjin Park, Min-Woo Kwon, Sunghun Jung, Min-Hwi Kim, "Devices and Circuits for Spiking Neural Networks," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 23-26, Jul. 2016

[477] Sungmin Hwang, Hyungjin Kim, Dae Woong Kwon, Jong-Ho Lee, and Byung-Gook Park, "Si 1-x Ge x Positive Feedback Field-Effect Transistor with Steep Subthreshold Swing for Low-Voltage Operation," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 121-122, Jul. 2016,

[476] Sungjoon Kim, Sungjun Kim, Seongjae Cho, and Byung-Gook Park, "Method for High Hole Injection into Light-Emitting Diodes by Trench Patterning and p -AlGaN Regrowth," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 146-148, Jul. 2016,

[475] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Su Hyun Bang, Dong Keun Lee, Seongjae Cho, and Byung-Gook Park, "Self-compliance bipolar resistive switching in Ni/Ti/SiO x /Si structure," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 163-164, Jul. 2016,

[474] Jungjin Park, Hyungjin Kim, Min-Woo Kwon, Sungmin Hwang and Byung-Gook Park, "Autonomous Neuromorphic System with Four-Terminal Si-Based Synaptic Devices," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 254-257, Jul. 2016,

[473] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Su Hyun Bang, Seongjae Cho, and Byung-Gook Park, "SiN-Based Resistive Random-Access Memory Inserting Tunnel Barrier," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 399-400, Jul. 2016,

[472] Seunghyun Kim, Myung-Hyun Baek, Dae Woong Kwon, Do-Bin Kim, Sang-Ho Lee, Sang-Ku Park, Youngmin Kim, Young Goan Kim, Seongjae Cho and Byung-Gook Park, "Characterization of the vertical position of the trapped charge in charge-trap flash memory," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 473-475, Jul. 2016,

[471] Min-Woo Kwon, Jungjin Park, Hyungjin Kim, Sungmin Hwang, Jong-Ho Lee, Byung-Gook Park, "CMOS analog integrate-and-fire neuron circuit for driving memristor based on RRAM," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 479-481, Jul. 2016,

[470] Myung-Hyun Baek, Do-Bin Kim, Seunghyun Kim, Sang-Ho Lee, and Byung-Gook Park, "Investigation on Channel-Alignment Effect on Arch-Structured Gate Stacked Array (GSTAR) 3-D NAND Flash Memory," 2016 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, pp. 485-486, Jul. 2016,

[469] Dae Woong Kwon, Sihyun Kim, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Circuit Modeling of Ion Sensitive Field Effect Transistors with Current Drift," The 16th International Meeting on Chemical Sensors, pp. -, Jul. 2016

[468] Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim and Byung-Gook Park, "Nanowire size dependency of silicon nanowire field-effect transistor based pH sensor," The 16th International Meeting on Chemical Sensors, pp. -, Jul. 2016

[467] Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Analysis of Dissimilarities in Current Drift on n-channel and p-channel pH-sensitive SiNW ISFET," The 16th International Meeting on Chemical Sensors, pp. -, Jul. 2016

[466] Ho Jung Kang, Min-Kyu Jeong, Nag Yong Choi, Byung-Gook Park, Jong-Ho Lee, “Analysis of AC- gm Dispersions due to Traps in Nitride Charge Trap Layer and Generated Interface Traps in 3-D NAND Flash Memory,” Silicon Nanoelectronics Workshop, pp. 80-81, Jun. 2016

[465] Sangku Park, Seunghyun Kim, Sang-ho Lee, Do-bin Kim, Myung-Hyun Baek, Byung-Gook Park, “Interface and Oxide Trap Analysis at Tunnel Oxide of NAND Flash Memory with Excluding the Effect of Floating Gate,” Silicon Nanoelectronics Workshop, pp. 90-91, Jun. 2016

[464] Jang Hyun Kim, Hee Sauk Jhon, Dae Woong Kwon, Sihyun Kim, Byung-Gook Park, “A Through Silicon Via for Suppressing Self-heating Effect in Tunnel Field Effect Transistor,” Silicon Nanoelectronics Workshop, pp. 112-113, Jun. 2016

[463] Sihyun Kim, Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, Taehyung Park, Ryoongbin Lee, Byung-Gook Park, “MOSFET-TFET Hybrid NAND/NOR Configuration for Improved AC Switching Performance,” Silicon Nanoelectronics Workshop, pp. 114-115, Jun. 2016

[462] Jang Hyun Kim, Dae Woong Kwon, Junil Lee, and Byung-Gook Park, "Analysis on Super-linear Onset of Tunnel Field-Effect Transistors with Hetero-junction Source," International Conference on Electronics, Information, and Communication, pp. -, Jan. 2016

[461] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Minju Yun, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Comparison of forming voltage in oxide-based resistive switching memories," International Conference on Electronics, Information, and Communication, pp. -, Jan. 2016

[460] Jun-Mo Park, In-Tak Cho, Won-Mook Kang, Byung-Gook Park, and Jong-Ho Lee, "Comparison of DC, Fast I-V, and Pulsed I-V measurement method in multi-layer WSe2 field effect transistors," International Conference on Electronics, Information, and Communication, pp. -, Jan. 2016

[459] Min Ju Yun, Sungho Kim, Sungjun Kim, Byung-Gook Park, and Hee-Dong Kim, "Transparent resistive random access memory using oxygen rich indium tin oxide films," International Conference on Advanced Materials and Devices, pp. 425-, Dec. 2015

[458] Min Ju Yun, Sungho Kim, Sungjun Kim, and Byung-Gook Park, "Resistive switching property with current limited region in silicon-based RRAM cells," International Conference on Advanced Materials and Devices, pp. -, Dec. 2015

[457] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Min Ju Yun, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Investigation on reliability of Ni/Si3N4/SiO2/Si RRAM device," International Conference on Advanced Materials and Devices, pp. 425-, Dec. 2015

[456] Sungjun Kim, Su Hyun Bang, Tae-Hyeon Kim, Min Ju Yun, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Conduction mechanism in resistive switching memory cells using HfO2 film," International Conference on Advanced Materials and Devices, pp. 425-, Dec. 2015

[455] Jungjin Park, Min-Woo Kwon, Hyungjin Kim, and Byung-Gook Park, "Autonomous neuromorphic system with four-terminal Si-based synaptic devices," International Conference on Advanced Materials and Devices, pp. 425-, Dec. 2015

[454] Hyungjin Kim and Byung-Gook Park, "1T DRAM using pillar type tunnel field-effect transistor," International Conference on Advanced Materials and Devices , pp. 425-, Dec. 2015

[453] Kyung-Do Kim, Kwi-Wook Kim, Min-Soo Yoo, Yong-Taik Kim, Sung-Kye Park, Sung-Joo Hong, Chan-Hyeong Park, Byung-Gook Park, and Jong-Ho Lee, "A Novel Method to Characterize the Effect from the Diffusion of Cu in Through Silicon Via (TSV)," IEEE International Electron Devices Meeting, pp. 7.2.1-7.2.4, Dec. 2015

[452] Min-Woo Kwon, Jungjin Park, Hyungjin Kim, and Byung-Gook Park, "Synaptic device and CMOS neuron circuit using floating body MOSFET with spike timing-dependent plasticity," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[451] Jang Hyun Kim, Dae Woong Kwon, Junil Lee, Euyhwan Park, TaeHyung Park, and Byung-Gook Park, "Study on the super-linear onset of tunneling field-effect transistors," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[450] Hee-Dong Kim, Minju Yun, Sungho Kim, Sungjun Kim, and Byung-Gook Park, "Stable nonpolar resistive switching characteristics of fully transparent resistive switching memory using only ITO films hee," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[449] Hee-Dong Kim, Minju Yun, Sungho Kim, Sungjun Kim, and Byung-Gook Park, "Self-rectifying resistive switching behavior observed in silicon nitride-based resistive switching memory using low pressure chemical vapor deposition," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[448] Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, "Reduction method of gate-to-drain capacitance by oxide spacer formation in tunnel field-effect transistor (TFET) with raised drain," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[447] Sungjoon Kim, Sungjun Kim, Seongjae Cho, Garam Kim, and Byung-Gook Park, "Optimization of current injection for high-power light-emitting diode (LED) by novel contact structuring," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[446] Sangku Park, Chiwoo Lee, Sang-Ho Lee, and Byung-Gook Park, "Negative bias temperature instability and channel hot carrier characteristics under different gate structure," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[445] Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim, and Byung-Gook Park, "Investigation of sensor performance in tunneling field effect transistor (TFET) as highly sensitive and multi-sensing biosensors," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[444] Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Investigation of drift effect on silicon nanowire field effect transistor based pH sensor," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[443] Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, "Effects of pillar thickness on DC/AC characteristics of tunnel field-effect transistor (TFET) with vertical structures," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[442] Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, Sihyun Kim, and Byung-Gook Park, "Drain doping dependence on switching characteristics of tunnel field-effect transistor (TFET) inverters," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[441] Junil Lee, Hyun Woo Kim, Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, TaeHyung Park, Sihyun Kim, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, "Analysis on temperature dependent current mechanism of tunneling field-effect transistors," International Microprocesses and Nanotechnology Conference, pp. -, Nov. 2015

[440] Hyungjin Kim, Jungjin Park, Min-Woo Kwon, Sungmin Hwang, and Byung-Gook Park, "Multi-Threshold voltages in ultra-thin-body devices by asymmetric dual-gate structure," International Conference on Solid State Devices and Materials, pp. 104-105, Sep. 2015

[439] Mina Yun, Seongjae Cho, Saekyoung Kang, Sunghun Jung, and Byung-Gook Park, "Ge-on-Si Photodetector with Novel Metallization Schemes for On-Chip Optical Interconnect," 2015 The 19th IEEE International Symposium on Consumer Electronics (ISCE), pp. 1-2, Jun. 2015

[438] Ho-Jung Kang, Sung-Min Joe, Nagyong Choi, Ji-Hyun Seo, Eunseok Choi, Sung-Kye Park, Byung-Gook Park, and Jong-Ho Lee, "Comprehensive analysis of retention characteristics in 3-D NAND flash memory cells with tube-type poly-Si channel structure," Symposia on VLSI Technology and Circuits, pp. -, Jun. 2015

[437] Min-Woo Kwon, Hyungjin Kim, Jungjin Park, and Byung-Gook Park, "Integrate-and-Fire neuron circuit and synaptic device using floating body MOSFET with spike timing-dependent plasticity," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 324-325, Jun. 2015

[436] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "Effects of bottom electrode on Ag-based electrochemical metallization memory devices," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 80-82, Jun. 2015

[435] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "Bias polarity dependent resistive switching behavior in silicon nitride- based memory cells," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 73-75, Jun. 2015

[434] Junil Lee, Jang Hyun Kim, Dae Woong Kwon, Euyhwan Park, Taehyung Park, and Byung-Gook Park, "Tunneling field-effect transistor with a grown Si epitaxial layer for boosting ON current," Silicon Nanoelectronics Workshop, pp. 55-56, Jun. 2015

[433] Min-Woo Kwon, Hyungjin Kim, Jungjin Park, and Byung-Gook Park, "Boolean logic circuit implementation using multi-input floating-body MOSFET," Silicon Nanoelectronics Workshop, pp. 65-66, Jun. 2015

[432] Kyung-Chang Ryoo, Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "Structural effects on unipolar resistive SwitchingBehaviors in oxide-based RRAM for high-density and low-power applications," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 235-236, Jun. 2015

[431] Joo Yun Seo, Sang-Ho Lee, Myung-Hyun Baek, and Byung-Gook Park, "Overview of channel-stacked NAND flash memory," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 237-238, Jun. 2015

[430] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Nitride-Based RRAM devices for various applications," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 240-241, Jun. 2015

[429] Do-Bin Kim, Dae Woong Kwon, and Byung-Gook Park, "Trapped electron retention depending on erase states in SONOS type NAND Flash memory," International Conference on Electronics, Information and Communication(ICEIC), pp. 395-396, Jan. 2015

[428] Hyungjin Kim, Jungjin Park, Min-Woo Kwon, and Byung-Gook Park, "Silicon-based synaptic transistor with nitride charge trapping layer," International Conference on Electronics, Information and Communication(ICEIC), pp. 441-442, Jan. 2015

[427] Il Hwan Cho, Seongjae Cho, Jong-Ho Lee, and Byung-Gook Park, "Low-frequency noise characteristics of Bi2Mg2/3Nb4/3O7 (BMN) temperature sensor with annealing temperature variation," International Conference on Electronics, Information and Communication(ICEIC), pp. 307-308, Jan. 2015

[426] Joo Yun Seo, Dae Woong Kwon, Sang-Ho Lee, and Byung-Gook Park, "Investigation of the effect of gate space length variation on the retention characteristics in NAND flash array," International Conference on Electronics, Information and Communication(ICEIC), pp. 234-235, Jan. 2015

[425] Sang Wan Kim, Seongjae Cho, Byung-Gook Park, and Woo Young Choi, "Improvement of On-off current ratio in vertical electron-hole bilayer tunnel field-effect transistors (V-EHBTFETs)," International Conference on Electronics, Information and Communication(ICEIC), pp. 376-377, Jan. 2015

[424] Xiaochi Chen, Seongjae Cho, Byung-Gook Park, and James S. Harris, Jr., "Ge/SiGe quantum-well diode modulator for On-chip optical interconnect," International Conference on Electronics, Information and Communication(ICEIC), pp. 386-387, Jan. 2015

[423] Dae Woong Kwon, Hyun Woo Kim, Jang Hyun Kim, and Byung-Gook Park, "Effects of miller capacitance on AC switching characteristics of tunnel fieldeffect transistor (TFET)," International Conference on Electronics, Information and Communication(ICEIC), pp. 425-426, Jan. 2015

[422] Seonghyun Paik, Seongjae Cho, Byung-Gook Park, and James S. Harris, Jr., "Design of electrically injected photonic crystal laser with oxide current guiding layers," International Conference on Electronics, Information and Communication(ICEIC), pp. 374-375, Jan. 2015

[421] Seongjae Cho, Sae-Kyoung Kang, Sunghun Jung, Jeongmin Lee, Il Hwan Cho, Dongsun Seo, James S. Harris, Jr, and Byung-Gook Park, "Enhancement of DC Optical Responsivity of Ge-on-Si Photodetector by Metallization with Contact Segmentation," International Symposium on Photonics and Electronics Convergence, pp. 34-34, Nov. 2014

[420] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "Resistive switching characteristics of silicon nitride-based RRAM depending on top electrode metals," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 128-130, Jul. 2014

[419] Seongjae Cho and Byung-Gook Park, "Advanced materials and devices for heterogeneous electronic and photonic integration," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 74-75, Jul. 2014

[418] Junil Lee, Jang Hyun Kim, Hyun Woo Kim, Sang Wan Kim, Euyhwan Park, Myung Hyun Baek, and Byung-Gook Park, "Study on electrical characteristics of HfO2/Al2O3 bilayer MOS capacitor using atomic layer deposition," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 207-208, Jul. 2014

[417] Myung-Hyun Baek, Do-Bin Kim, Se Hwan Park, and Byung-Gook Park, "Comparison of gate STacked ARray (GSTAR) with arch and ultra-thin body (UTB) structured single cell," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 121-123, Jul. 2014

[416] Ho-Jung Kang, Min-Kyu Jeong, Sung-Min Joe, Ji-Hyun Seo, Sung-Kye Park, Sung Hun Jin, Byung-Gook Park, and Jong-Ho Lee, "Effect of traps on transient bit-line current behavior in word-line stacked NAND flash memory with poly-Si body," Symposia on VLSI Technology and Circuits, pp. 28-29, Jun. 2014

[415] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, Jong-Ho Lee, and Byung-Gook Park, "Switching and conduction mechanism of Cu/Si3N4/Si RRAM with CMOS compatibility," Silicon Nanoelectronics Workshop, pp. 172-173, Jun. 2014

[414] Min-Hwi Kim, Sunghun Jung, Sungjun Kim, Seongjae Cho, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure," Silicon Nanoelectronics Workshop, pp. 176-177, Jun. 2014

[413] Min-Woo Kwon, Hyungjin Kim, Jungjin Park, Rajeev Ranjan, Jong-Ho Lee, and Byung-Gook Park, "Integrate-and-Fire neuron circuit and synaptic device with a floating body MOSFET," Silicon Nanoelectronics Workshop, pp. 95-96, Jun. 2014

[412] Xiaochi Chen, Yijie Huo, Seongjae Cho, James S. Harris, and Byung-Gook Park, "O2-Enhanced surface treatment of Ge epitaxially grown on Si for heterogeneous Ge technology," International Symposium on Consumer Electronics, pp. 522-523, Jun. 2014

[411] Jung Suk Kwac, Seung Wook Ryu, Gi Taek Oh, Eou-Sik Cho, Seongjae Cho, and Byung-Gook Park, "ZrO2-Doped HfO2 resistive switching memory," International Conference on Electronics, Information and Communication(ICEIC), pp. 185-186, Jan. 2014

[410] Sang-Ho Lee, Joo Yun Seo, Wandong Kim, Se Hwan Park, Do-Bin Kim, and Byung-Gook Park, "Investigation of SANOS memory device for suppressing gate injection current," International Conference on Electronics, Information and Communication(ICEIC), pp. 489-490, Jan. 2014

[409] Jungjin Park, Hyungjin Kim, Min-Woo Kwon, Rajeev Ranjan, and Byung-Gook Park, "Inhibitory synaptic transistor cell for neuromorphic application," International Conference on Electronics, Information and Communication(ICEIC), pp. 24-25, Jan. 2014

[408] Yijie Huo, Seongjae Cho, Jeongmin Lee, Min-Woo Kwon, James S. Harris, Jr., and Byung-Gook Park, "Heterojunction-Based germanium high-hole-mobility transistor for low-power operation and its high-frequency performances," International Conference on Electronics, Information and Communication(ICEIC), pp. 181-182, Jan. 2014

[407] Seongjae Cho, Hyungjin Kim, Byung-Gook Park, and James S. Harris, Jr., "Si/Ge/AlGaAs heterojunction high hole mobility transistor," International Conference on Advanced Materials and Devices, pp. 425-425, Dec. 2013

[406] Wandong Kim, Joo Yun Seo, Yoon Kim, Se Hwan Park, Sang-Ho Lee, Myung Hyun Baek, Jong-Ho Lee, and Byung-Gook Park, "Channel-Stacked NAND flash memory with layer selection by multi-level operation (LSM)," IEEE International Electron Devices Meeting, pp. 3.8.1-3.8.4, Dec. 2013

[405] Jieun Lee, Seonwook Hwang, Bongsik Choi, Jung Han Lee, Dong-Il Moon, Myeong-Lok Seol, Chang-Hoon Kim, In-Young Chung, Byung-Gook Park, Yang-Kyu Choi, Dong Myong Kim, Dae Hwan Kim, and Sung-Jin Choi, "A novel SiNW/CMOS hybrid biosensor for high Sensitivity/Low noise," IEEE International Electron Devices Meeting, pp. 14.5.1-14.5.4, Dec. 2013

[404] Hyun Woo Kim, Sang Wan Kim, Min-Chul Sun, Jang Hyun Kim, Euyhwan Park, and Byung-Gook Park, "Tunneling field-effect transistor with Si/SiGe material for high current drivability," International Microprocesses and Nanotechnology Conference, pp. 8P-11-37-, Nov. 2013

[403] Garam Kim, Jang Hyun Kim, Euyhwan Park, Donghoon Kang, and Byung-Gook Park, "Improved internal quantum efficiency of GaN-based light emitting diodes using p-AlGaN trench in multi-quantum well," International Microprocesses and Nanotechnology Conference, pp. 7B-4-6-, Nov. 2013

[402] Jang Hyun Kim, Garam Kim, Joong Kon Song, Dong Hoon kang, and Byung-Gook Park, "Effects of current spreading in GaN-based light-emitting diodes using ITO spreading pillar," International Microprocesses and Nanotechnology Conference, pp. 7P-7-46-, Nov. 2013

[401] Jieun Lee, Seonwook Hwang, Bongsik Choi, Sunwoong Choi, Jung Han Lee, Byung-Gook Park, Dong Myong Kim, Sung-Jin Choi, and Dae Hwan Kim, "NOISE-IMMUNE SILICON NANOWIRE/CMOS HYBRID BIOSENSOR USING TOP-DOWN APPROACH," microTAS(International Conference on Miniaturized Systems for Chemistry and Life Sciences), pp. 1517-1519, Oct. 2013

[400] Young Jun Yoon, Seongjae Cho, Jae Hwa Seo, Eou-Sik Cho, Shin-Won Kang, Jin-Hyuk Bae, Jung-Hee Lee, Byung-Gook Park, James S. Harris Jr., and In Man Kang, "Design of AlGaAs/InGaAs Heterojunction Tunneling Field-Effect Transistor for Low-Standby-Power and High-Performance Application," International Conference on Solid State Devices and Materials(SSDM), pp. 178-179, Sep. 2013

[399] Garam Kim, Euyhwan Park, Jang Hyun Kim, Jong-Ho Bae, Dong Hoon Kang, and Byung-Gook Park, "Trap analysis of InGaN-based blue light emitting diodes using current-transient methodology," International Conference on Solid State Devices and Materials(SSDM), pp. 1000-1001, Sep. 2013

[398] Byung-Gook Park, Min-Chul Sun, and Sang Wan Kim, "Silicon-based tunneling field effect transistors for ultra-low power applications," Asia Pacific Physics Conference, pp. A2-2-I2-, Jul. 2013

[397] Seongjae Cho, Hyungjin Kim, Byung-Gook Park, and James S. Harris, Jr., "Optical and electronic devices for monolithically integrated photonics circuits," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 139-141, Jul. 2013

[396] Rajeev Ranjan, Min-Chul Sun, Min-Woo Kwon, Hyungjin Kim, and Byung-Gook Park, "Neuron circuit using thyristor," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 149-150, Jul. 2013

[395] Sang-Ho Lee, Joo Yun Seo, Wandong Kim, Se Hwan Park, Do-Bin Kim, and Byung-Gook Park, "Investigation of programmed state threshold voltage variation caused by unequal cell size in gate-all-around NAND flash memory," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 330-331, Jul. 2013

[394] Hyungjin Kim, Min-Woo Kwon, Jungjin Park, Min-Chul Sun, Rajeev Ranjan, Do-Bin Kim, and Byung-Gook Park, "Study on input biasing effects of silicon-based floating-body synaptic transistor (SFST)," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 270-271, Jun. 2013

[393] Do-Bin Kim, Se Hwan Park, Wandong Kim, Eun-Seok Choi, Sung-Kye Park, and Byung-Gook Park, "Investigation of three dimensional NAND flash memory based on gate STacked ARray (GSTAR)," Silicon Nanoelectronics Workshop, pp. 5-6, Jun. 2013

[392] Min-Woo Kwon, Hyungjin Kim, Jungjin Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Integrate-and-Fire neuron CMOS circuit with a multi-input floating body MOSFET," Silicon Nanoelectronics Workshop, pp. 113-114, Jun. 2013

[391] Byeong-In Choe, Wandong Kim, Jung-Kyu Lee, Byung-Gook Park, and Jong-Ho Lee, "Analysis of data retention time-to-failure in charge trap NAND flash memories," Silicon Nanoelectronics Workshop, pp. 5-6, Jun. 2013

[390] Min-Kyu Jeong, Sung-Min Joe, Ho-Jung Kang, Kyoung-Rok Han, Gyuseok Cho, Sung-Kye Park, Byung-Gook Park, and Jong-Ho Lee, "A new read method suppressing effect of random telegraph noise in NAND flash memory by using hysteretic characteristic," International Symposium on VLSI Technology, Systems, and Applications, pp. T154-T155, Jun. 2013

[389] Seongjae Cho, Hyungjin Kim, S. J. Ben Yoo, Byung-Gook Park, and James S. Harris, Jr., "Design optimization of an optically drivable heterogeneous MOSFET with silicon compatibility," SPIE Photonics West, pp. 8619-56-, Feb. 2013

[388] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Threshold voltage adjustment method of tunneling field-effect transistors," International Conference on Electronics, Information and Communication(ICEIC), pp. 247-248, Feb. 2013

[387] Seongjae Cho, Sung Yun Woo, Hyungjin Kim, Jae Hwa Seo, Hwan Gi Lee, In Man Kang, Byung-Gook Park, and James S. Harris, Jr., "Low-standby power and high-performance InAs/InGaAs/InP heterojunction tunneling field-effect transistor," International Conference on Electronics, Information and Communication(ICEIC), pp. 284-285, Feb. 2013

[386] Sungjun Kim, Hyungjin Kim, Sunghun Jung, Kyung-Chang Ryoo, Jeong-Hoon Oh, and Byung-Gook Park, "Investigation of gradual set and reset in Si3N4-based RRAM for MLC and neuromorphic device application," International Conference on Electronics, Information and Communication(ICEIC), pp. 228-229, Feb. 2013

[385] Seongjae Cho, Pascale El Kallassi, Hyungjin Kim, Byung-Gook Park, and James S. Harris, Jr., "In vitro optical fiber biosensor for integrated optical system," International Conference on Electronics, Information and Communication(ICEIC), pp. 84-85, Feb. 2013

[384] Seongjae Cho, Hyungjin Kim, Seonghyun Paik, In Man Kang, Jung-Hee Lee, Byung-Gook Park, and James S. Harris, Jr., "Germanium waveguide for on-chip optical interconnect," International Conference on Electronics, Information and Communication(ICEIC), pp. 226-227, Feb. 2013

[383] Seonghyun Paik, Seongjae Cho, Ken Leedle, Hyungjin Kim, Byung-Gook Park, and James S. Harris, Jr., "Design of high-power low-noise 2-D distributed feedback laser," International Conference on Electronics, Information and Communication(ICEIC), pp. 288-289, Feb. 2013

[382] Euyhwan Park, Garam Kim, Jang Hyun Kim, Donghoon Kang, Joong-Kon Son, and Byung-Gook Park, "Various size images mapping technique to analyze trap-assisted non-radiative recombination mechanism using cathodo- and electro- luminescenes measurement in GaN-based LEDs," IEEE International NanoElectronics Conference, pp. 112-114, Jan. 2013

[381] Min-Chul Sun, Hyun Woo Kim, Sang Wan Kim, Jung Han Lee, Hyungjin Kim, and Byung-Gook Park, "Threshold voltage of nanoscale Si gate-all-around MOSFET: short-channel, quantum, and volume effects," IEEE International NanoElectronics Conference, pp. 27-29, Jan. 2013

[380] Sunghun Jung, Sungjun Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Investigation of conduction mechanism in Ti/Si3N4/p-Si stacked RRAM," IEEE International NanoElectronics Conference, pp. 97-99, Jan. 2013

[379] Hyun Woo Kim, Min-Chul Sun, Sang Wan Kim, and Byung-Gook Park, "Hump phenomenon in transfer characteristics of double-gated thin-body tunneling field-effect transistor (TFET) with Gate/Source overlap," IEEE International NanoElectronics Conference, pp. 386-388, Jan. 2013

[378] Sungjun Kim, Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, and Byung-Gook Park, "Bipolar resistive switching characteristics in Si3N4-based RRAM with MIS (Metal-insulator-metal) structure," IEEE International NanoElectronics Conference, pp. 325-327, Jan. 2013

[377] Joo Yun Seo, Sang-Ho Lee, Yoon Kim, Se Hwan Park, Wandong Kim, Do-Bin Kim, and Byung-Gook Park, "A study on gate-all-around (GAA) polycrystalline silicon channel SONOS flash memory," IEEE International NanoElectronics Conference, pp. 69-71, Jan. 2013

[376] Seongjae Cho, Stanley Cheung, Changjae Yang, Hyungjin Kim, Euijoon Yoon, S. J. Ben Yoo, Byung-Gook Park, and James S. Harris, Jr., "1550-nm germanium light-emitting diode by momentum conservation transport," The 2nd International Symposium on Photonics and Electronics Convergence, pp. 98-, Dec. 2012

[375] Min-Kyu Jeong, Sung-Min Joe, Bong-Su Jo, Ho-Jung Kang, Jong-Ho Bae, Kyoung-Rok Han, Eunseok Choi, Gyuseok Cho, Sung-Kye Park, Byung-Gook Park, and Jong-Ho Lee, "Characterization of traps in 3-D stacked NAND flash memory devices with tube-type poly-Si channel structure," IEEE International Electron Devices Meeting, pp. 9.3.1-9.3.4, Dec. 2012

[374] Euyhwan Park, Garam Kim, Wandong Kim, Jang Hyun Kim, Donghoon Kang, Joong-Kon Son, and Byung-Gook Park, "Radiative recombination enhancement by different indium composition multiple quantum barriers in GaN based LEDs," International Microprocesses and Nanotechnology Conference, pp. 11P-11-25-, Nov. 2012

[373] Hyun Woo Kim, Min-Chul Sun, Sang Wan Kim, Joo Yun Seo, Garam Kim, Jang Hyun Kim, and Byung-Gook Park, "Investigation on effects of changing body doping concentration in short-channel junctionless transistor," International Microprocesses and Nanotechnology Conference, pp. 1P-7-41-, Nov. 2012

[372] Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, Sungjun Kim, and Byung-Gook Park, "Differentiation of two reset operations in Pt/Cu/TiO2/Pt stacked RRAMs," International Microprocesses and Nanotechnology Conference, pp. 2P-11-20-, Nov. 2012

[371] Min-Chul Sun, Sang Wan Kim, Hyun Woo Kim, Hyungjin Kim, and Byung-Gook Park, "CMOS-compatible tunnel FETs with 14 nm gate, sigma-shape source, and recessed channel," International Microprocesses and Nanotechnology Conference, pp. 1P-7-34-, Nov. 2012

[370] Byeong-In Choe, Byung-Gook Park, and Jong-Ho Lee, "Body doping profile of select device to minimize program disturbance in 3-D stack NAND flash memory," International Microprocess and Nanotechnology Conference, pp. -, Nov. 2012

[369] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Design improvement of L-shaped tunneling field-effect transistors," IEEE International SOI Conference, pp. 4.1-, Oct. 2012

[368] Jisoo Chang, Jang Hyun Kim, Dae Woong Kwon, and Byung-Gook Park, "Temperature effect on electrical properties of HfInZnO amorphous oxide thin film transistor," International Conference on Solid State Devices and Materials, pp. 188-189, Sep. 2012

[367] Hyungjin Kim, Jung Han Lee, Garam Kim, Min-Chul Sun, and Byung-Gook Park, "Silicon-based floating-body synaptic transistor," International Conference on Solid State Devices and Materials, pp. 322-323, Sep. 2012

[366] Young Jun Yoon, Seongjae Cho, Jae Hwa Seo, In Man Kang, Byung-Gook Park, and Jung-Hee Lee, "Compound semiconductor tunneling field-effect transistor based on Ge/GaAs heterojunction with tunneling-boost layer for high-performance operation," International Conference on Solid State Devices and Materials, pp. 76-77, Sep. 2012

[365] Bong-Su Jo, Ho-Jung Kang, Sung-Min Joe, Min-Kyu Jeong, Sung-Kye Park, Kyung-Rok Han, Byung-Gook Park, and Jong-Ho Lee, "Characterization RTN(Random telegraph noise) generated by process and Cycling stress induced traps in 26 nm NAND flash memory," International Conference on Solid State Devices and Materials, pp. 594-595, Sep. 2012

[364] Min-Chul Sun, Garam Kim, Jung Han Lee, Hyungjin Kim, Sang Wan Kim, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Patterning of Si nanowire array with electron beam lithography for Sub-22nm Si Nanoelectronics Technology," International Conference on Micro- and Nano-Engineering, pp. 281-, Sep. 2012

[363] Sungjun Kim, Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, and Byung-Gook Park, "Experimental evidence of scaling effect by using novel crown shape RRAM structure," IEEE NANO, pp. 7733-, Aug. 2012

[362] Euyhwan Park, Garam Kim, Jang Hyun Kim, Donghoon Kang, Joong-Kon Son, and Byung-Gook Park, "Cathodo- and electro- luminescences image mapping technique to study traps in GaN-based LEDs," IEEE NANO, pp. 7577-, Aug. 2012

[361] Won Bo Shim, Seunghyun Kim, Yoon Kim, Se Hwan Park, Sungjun Kim, Euyhwan Park, and Byung-Gook Park, "Bitline separated gated multi-bit (BS-GMB) SONOS for high density flash memory," IEEE NANO, pp. 7927-, Aug. 2012

[360] Sang Wan Kim, Woo Young Choi, Won Bo Shim, Hyungjin Kim, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Study on the ambipolar behavior depending on the length of gate-drain overlap," International Technical Conference on Circuits/Systems, Computers and Communications, pp. P-T3-09-, Jul. 2012

[359] Won Bo Shim, Seunghyun Kim, Do-Bin Kim, and Byung-Gook Park, "Investigation of scaling issues in gated twin-bit (GTB) SONOS NAND flash memory array," International Technical Conference on Circuits/Systems, Computers and Communications, pp. B-W2-03-, Jul. 2012

[358] Do-Bin Kim, Yoon Kim, Seunghyun Kim, and Byung-Gook Park, "Investigation of read and program disturbance caused by programmed adjacent cell in NAND flash memory array," International Technical Conference on Circuits/Systems, Computers and Communications, pp. B-W2-01-, Jul. 2012

[357] Seunghyun Kim, Yoon Kim, and Byung-Gook Park, "Investigation of gate stacked array (GSTAR) for 3D NAND flash memory," International Technical Conference on Circuits/Systems, Computers and Communications, pp. B-W2-02-, Jul. 2012

[356] Kyung-Chang Ryoo, Sungjun Kim, Jeong-Hoon Oh, Sunghun Jung, and Byung-Gook Park, "Evidence of conductive filament (CF) scaling in highly scaled unipolar RRAM," International Technical Conference on Circuits/Systems, Computers and Communications, pp. P-T3-38-, Jul. 2012

[355] Min-Chul Sun, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Hyungjin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Novel tunneling field-effect transistor with sigma-shape embedded SiGe sources and recessed channel," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 281-282, Jun. 2012

[354] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Investigation and optimization of the n-channel and p-channel L-shaped tunneling field-effect transistors," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 36-37, Jun. 2012

[353] Do-Bin Kim, Yoon Kim, Se Hwan Park, Wandong Kim, Joo Yun Seo, Seunghyun Kim, and Byung-Gook Park, "Control effect of new optimized structure of planar thin floating gate (FG) NAND flash to fringing field," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devieces, pp. 50-51, Jun. 2012

[352] Seongjae Cho, Hyungjin Kim, Min-Chul Sun, Theodore I. Kamins, Byung-Gook Park, and James S. Harris, Jr., "Simulation study on process conditions for high-speed silicon photodetector and quantum-well structuring for increased number of wavelength discriminations," Silicon Nanoelectronics Workshop, pp. 125-126, Jun. 2012

[351] Sang Wan Kim, Woo Young Choi, Hyungjin Kim, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Investigation on hump effects of L-shaped tunneling field-effect transistors," Silicon Nanoelectronics Workshop, pp. 169-170, Jun. 2012

[350] Joo Yun Seo, Yoon Kim, Se Hwan Park, Wandong Kim, Do-Bin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Investigation into the effect of the variation of gate dimensions on program characteristics in 3D NAND flash array," Silicon Nanoelectronics Workshop, pp. 19-20, Jun. 2012

[349] Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, Sungjun Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Effect of Cu insertion layer between top electrode and switching layer on resistive switching characteristics," Silicon Nanoelectronics Workshop, pp. 95-96, Jun. 2012

[348] Jung Han Lee, Jieun Lee, Min-Chul Sun, Won Hee Lee, Mihee Uhm, Seonwook Hwang, In-Young Chung, Dong Myong Kim, Dae Hwan Kim, and Byung-Gook Park, "Analysis of hysteresis characteristics of fabricated SiNW biosensor in aqueous environment with reference electrode," Silicon Nanoelectronics Workshop, pp. 167-168, Jun. 2012

[347] Ju-Wan Lee, Min-Kyu Jeong, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "3-D stacked NAND flash memory having lateral bit-line layers and vertical gate," Silicon Nanoelectronics Workshop, pp. 93-94, Jun. 2012

[346] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, and Byung-Gook Park, "Variation of Threshold Voltage and ON Current Caused by Gate Length and Nanowire Diameter Fluctuation in Junctionless 3D NAND Flash Memory," International Conference on Electronics, Information and Communication, pp. 283-284, Feb. 2012

[345] Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, Sungjun Kim, and Byung-Gook Park, "Resistive Switching Characteristics of TiOx-based RRAMs Formed by Ti Oxidation and ALD Process," International Conference on Electronics, Information and Communication, pp. 271-272, Feb. 2012

[344] Joung-Eob Lee, Kyung Wan Kim, Jung Han Lee, Kwon-Chil Kang, Kanji Yoh, and Byung-Gook Park, "Modulation of Control Gate Capacitance of Single-Electron Transistor Using Side-Gate Voltage," International Conference on Electronics, Information and Communication, pp. 3-3, Feb. 2012

[343] Jung Han Lee, Kwon-Chil Kang, Kyung Wan Kim, Won Bo Shim, and Byung-Gook Park, "Investigation of Poly-Silicon Quantum Dot Single Electron Transistor with SONOS Structure," International Conference on Electronics, Information and Communication, pp. 273-274, Feb. 2012

[342] Joo Yun Seo, Yoon Kim, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Investigation of Poly Depletion Effect in 3D stacked NAND flash memory," International Conference on Electronics, Information and Communication, pp. 4-5, Feb. 2012

[341] Seongjae Cho, Hyungjin Kim, Byung-Gook Park, and James S. Harris, Jr., "Frequency Response of a Common-Source (CS) Amplifier Embedding Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor (TFET)," International Conference on Electronics, Information and Communication, pp. 1-2, Feb. 2012

[340] Hyungjin Kim, Sang Wan Kim, Min-Chul Sun, Hyun Woo Kim, Garam Kim, Jang Hyun Kim, Euyhwan Park, and Byung-Gook Park, "Enhanced Ambipolar Characteristic of Tunneling Field-Effect Transistors Using Doped Region," International Conference on Electronics, Information and Communication, pp. 279-280, Feb. 2012

[339] Seongjae Cho, Hyun Woo Kim, Byung-Gook Park, and James S. Harris, Jr., "Design Consideration for Heterojunction P-type Tunneling Field-Effect Transistor with Narrow-Bandgap Source Material," International Conference on Electronics, Information and Communication, pp. 168-169, Feb. 2012

[338] Sungjun Kim, Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, and Byung-Gook Park, "Conduction Mechanism of Al-inserted NiO-based Resistive Random Access Memory (RRAM) for High Density and Low Power Application," International Conference on Electronics, Information and Communication, pp. 275-276, Feb. 2012

[337] Euyhwan Park, Garam Kim, Jang Hyun Kim, Donghoon Kang, Joong-Kon Son, and Byung-Gook Park, "Analysis of Non-radiative Recombination Mechanism Using Cathodoluminescence Measurement in GaN-based Light Emitting Diodes," International Conference on Electronics, Information and Communication, pp. 460-461, Feb. 2012

[336] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Ambipolar Behavior of L-shaped Tunneling Field-Effect Transistors," International Conference on Electronics, Information and Communication, pp. 285-286, Feb. 2012

[335] Jang Hyun Kim, Hyun Woo Kim, and Byung-Gook Park, "Simulation of Hump Characteristics in Oxide Thin Film Transistors with a Trench Gate," International Conference on Electronics, Information and Communication, pp. 277-278, Jan. 2012

[334] Yoon Kim, Se Hwan Park, Wandong Kim, Joo Yun Seo, and Byung-Gook Park, "Vertical-Channel STacked ARray (VCSTAR) for 3D NAND flash memory," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[333] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Sungjun Kim, and Byung-Gook Park, "Uniformity Improvement by Optimization of Switching Interface in Bi-layer Unipolar RRAM Structure for Low Power New Memory Application," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[332] Seongjae Cho, Se Hwan Park, Byung-Gook Park, and James S. Harris, Jr., "Silicon-Compatible Bulk-Type Compound Junctionless Field-Effect Transistor," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[331] Garam Kim, Min-Chul Sun, Sang Wan Kim, Hyun Woo Kim, Jang Hyun Kim, Euyhwan Park, Hyungjin Kim, and Byung-Gook Park, "Novel MOSFET Structure using p-n Junction Gate for Ultra-low Subthreshold-Swing," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[330] Min-Chul Sun, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Hyungjin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Modulation of Transfer Characteristics of Si Nanowire Tunnel FET on Ultra-Thin-Body and BOX (UTBB) SOI Substrate Using Back-Gate Bias," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[329] Kyung Wan Kim, Jung Han Lee, Kwon-Chil Kang, Hyun Woo Kim, Joo Yun Seo, Wandong Kim, and Byung-Gook Park, "Investigation of Vertical Type Single-Electron Transistor with Sidewall Spacer Quantum Dot," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[328] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, Seunghyun Kim, and Byung-Gook Park, "Investigation of Self Boosting Disturbance Induced by Channel Coupling in 3D Stacked NAND Flash Memory," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[327] Hyun Woo Kim, Jung Han Lee, Wandong Kim, Min-Chul Sun, Jang Hyun Kim, Garam Kim, Kyung Wan Kim, Hyungjin Kim, Joo Yun Seo, and Byung-Gook Park, "A Tunneling Field-Effect Transistor using Side Metal Gate/High-k material for Low Power Application," International Semiconductor Device Research Symposium, pp. 1-2, Dec. 2011

[326] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Novel protruded-shape unipolar RRAM structure for improving switching uniformity through excellent conductive filament controllability," International Microprocesses and Nanotechnology Conference, pp. 26P-7-47-26P-7-47, Oct. 2011

[325] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "L-Shaped tunneling field-effect transistors (TFETs) for low subthreshold swing and high current drivability," International Microprocesses and Nanotechnology Conference, pp. 26C-4-5L-26C-4-5L, Oct. 2011

[324] Kyung-Chang Ryoo, Se Hwan Park, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Reset Current Reduction with Excellent Filament Controllability by using Area Minimized and Field Enhanced Unipolar RRAM structure," International Conference on Solid State Devices and Materials, pp. 1001-1002, Sep. 2011

[323] Jeong-Hoon Oh, Kyung-Chang Ryoo, Sunghun Jung, Yongjik Park, and Byung-Gook Park, "Effect of Oxidation Amount on Gradual Switching Behavior in Reset Transition of Al/TiO2 based Resistive Switching Memory and its Mechanism for MLC Operation," International Conference on Solid State Devices and Materials, pp. 154-155, Sep. 2011

[322] Min-Chul Sun, Sang Wan Kim, Hyun Woo Kim, Garam Kim, Hyungjin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Design of Thin-Body Double-Gated Vertical-Channel Tunneling Field-Effect Transistors for Ultra-Low Power Logic Circuits," International Conference on Solid State Devices and Materials, pp. 845-846, Sep. 2011

[321] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Gi-Tae Jeong, Hongsik Jeong, and Byung-Gook Park, "Areal and Structural Effect on Oxide based RRAM cell for Improving Resistive Switching Characteristics," International Conference on Solid State Devices and Materials, pp. 136-137, Sep. 2011

[320] Dong Hua Li, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Thickness Effects of the Blocking Oxide on the Memory Behaviors for the SONOS Flash Memory," International Symposium on the Physics of Semiconductors and Applications, pp. B8-O-02-B8-O-02, Jul. 2011

[319] Jungjin Park, Taewook Kang, Daeyoung Woo, Joong-Kon Son, Jong-Ho Lee, Byung-Gook Park, and Hyungcheol Shin, "Non-ideal characteristic analysis of GaN-based light-emitting diode using current-voltage (I-V) and low-frequency noise experiment," IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, pp. 408-411, Jul. 2011

[318] In-Tak Cho, Jun-Mo Park, W. S. Cheong, C. S. Hwang, H. I. Kwon, I. H. Cho, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "Effect of light illumination on the low-frequency noises in amorphous-IGZO TFTs," IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, pp. 418-421, Jul. 2011

[317] Seongjae Cho, , , Evan R. Pickett, Namkyoo Park, Theodore I. Kamins, Byung-Gook Park, and James S. Harris , "Surface roughness effect on Q-factor of Ge whispering gallery mode microdisk resonator," Access Networks and In-house Communications, pp. -, Jun. 2011

[316] Seongjae Cho, Robert Chen, Hai Lin, Yijie Huo, Gary Shambat, Jelena Vuckovic, Theodore Kamins, Byung-Gook Park, and James Harris, "Fabrication and Characterization of Whispering Gallery Mode (WGM) Microdisk Resonator Based on Epitaxially Grown GeSn," Electronic Materials Conference, pp. 85-85, Jun. 2011

[315] Seongjae Cho, Sukmo Koo, Kyungwan Yoo, Evan R. Pickett, Namkyoo Park, Theodore I. Kamins, Byung-Gook Park, and James S. Harris, "Surface Roughness Effect on Q-factor of Ge Whispering Gallery Mode Microdisk Resonator," Integrated Photonics Research, Silicon and Nano-Photonics (IPR), pp. 1-3, Jun. 2011

[314] Hyungjin Kim, Min-Chul Sun, Hyun Woo Kim, Sang Wan Kim, Garam Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Threshold Voltage Control of Tunnel Field-Effect Transistors Using VT-control Doping Region," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 90-92, Jun. 2011

[313] Se Hwan Park, Yoon Kim, Wandong Kim, Joo Yun Seo, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Novel Three Dimensional (3D) NAND Flash Memory Array Having Tied Bit-line and Ground Select Transistor (TiGer)," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 284-287, Jun. 2011

[312] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Effect on Conducting Defect in Unipolar RRAM for Improving Resistive Switching Characteristics," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 299-303, Jun. 2011

[311] Jeong-Hoon Oh, Kyung-Chang Ryoo, Sunghun Jung, Yongjik Park, and Byung-Gook Park, "Effect of Aluminum Inter-layer and Oxidation on Gradual Reset Switching Behavior of TiO2 based Resistive Random Access Memory," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 304-307, Jun. 2011

[310] Min-Chul Sun, Hyun Woo Kim, Sang Wan Kim, Garam Kim, Hyungjin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Comparative Study on Top- and Bottom-Source Vertical-Channel Tunnel Field-Effect Transistors," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 87-89, Jun. 2011

[309] Doo-Hyun Kim, Gil Sung Lee, Dong Hua Li, Yoon Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Retention Characteristics of 3D GAA(Gate-all-around) Charge Trap Flash Memory," Silicon Nanoelectronics Workshop, pp. 49-50, Jun. 2011

[308] Sunghun Jung, Kyung-Chang Ryoo, Jeong-Hoon Oh, and Byung-Gook Park, "Field Enhancement Resistive Random Access Memory (FERRAM) for Stable Switching Behaviors," Silicon Nanoelectronics Workshop, pp. 93-94, Jun. 2011

[307] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Conducting Defect Effect for High Density and Low Power Unipolar RRAM Application," Silicon Nanoelectronics Workshop, pp. 89-90, Jun. 2011

[306] Garam Kim, Sang Wan Kim, Min-Chul Sun, Hyun Woo Kim, Hyungjin Kim, and Byung-Gook Park, "Tunneling Field Effect Transistor with Sidewall Floating Gate for Ultra-Low Subthreshold Swing," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 306-307, Jun. 2011

[305] Seongjae Cho, Jae Sung Lee, In Man Kang, Byung-Gook Park, and James S. Harris, "Small-Signal Modeling of Gate-All-Around (GAA) Junctionless MOSFETs for Sub-millimeter Wave Applications," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 666-669, Jun. 2011

[304] Jung Han Lee, Yoon Kim, Kwon-Chil Kang, Joung-Eob Lee, Kyung Wan Kim, and Byung-Gook Park, "Single Electron Transistor with P-type Sidewall Spacer Gates and SONOS Structure," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 310-311, Jun. 2011

[303] Seongjae Cho, Min-Chul Sun, Garam Kim, Byung-Gook Park, and James S. Harris, "Design Optimization of Type-I Heterojunction Tunneling Field-Effect Transistor (I-HTFET) of Ge-AlxGa1-xAs System for High Performance Logic Technology," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 312-313, Jun. 2011

[302] Won Bo Shim, Jung Hoon Lee, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Joo Yun Seo, and Byung-Gook Park, "Design of Gated Twin-Bit (GTB) NAND Flash Memory Considering Gate Induced Drain Leakage (GIDL) Current," International Technical Conference on Circuits/Systems, Computers and Communications, pp. 308-309, Jun. 2011

[301] Jeong-Hoon Oh, Kyung-Chang Ryoo, Sunghun Jung, Byung-Gook Park, and Kyung Seok Oh, "An access-transistor-free resistive random access memory (RRAM) using a GST/TiO2 stack and its novel access mechanism," IEEE International Conference on Electron Devices and Solid-State Circuits, pp. 0-0, Dec. 2010

[300] Myounggon Kang, Wookghee Hahn, Il Han Park, Hocheol Lee, Juyoung Park, Youngsun Song, Changgyu Eun, Sanghyun Ju, Kihwan Choi, Youngho Lim, Jong-Ho Lee, Byung-Gook Park, and Hyungcheol Shin, "A Simple Compact Model for Hot Carrier Injection Phenomenon in 32 nm NAND Flash Memory Device," IEEE International Conference on Electron Devices and Solid-State Circuits, pp. 1-4, Dec. 2010

[299] Min-Chul Sun, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Scalable Embedded Ge-Junction Vertical-Channel Tunneling Field-Effect Transistor for Low-Voltage Operation," IEEE Nanotechnology Materials and Devices Conference, pp. 286-290, Oct. 2010

[298] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Resistive switching characteristics of novel Al-inserted resistive random access memory (RRAM)," IEEE Nanotechnology Materials and Devices Conference, pp. 356-359, Oct. 2010

[297] Joung-Eob Lee, Won Bo Shim, Jang-Gn Yun, Kwon-Chil Kang, Jung Han Lee, Hyungcheol Shin, and Byung-Gook Park, "Single electron transistors (SETs) for reducing Source/Drain resistance and MOS current," International Conference on Solid State Devices and Materials, pp. 788-789, Sep. 2010

[296] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Novel low power RRAM with a U-type cell structure for improving resistive switching characteristics," International Conference on Solid State Devices and Materials, pp. 1114-1115, Sep. 2010

[295] Wandong Kim, Dae Woong Kwon, Junghwan Ji, Jung Hoon Lee, and Byung-Gook Park, "Investigation of threshold voltage disturbance caused by programmed adjacent cell in virtual Source/Drain NAND flash memory device," International Conference on Solid State Devices and Materials, pp. 764-765, Sep. 2010

[294] Jisoo Chang, Sang Wan Kim, Dae Woong Kwon, Jang Hyun Kim, Jae Chul Park, Ihun Song, U-In Jung, Chang Jung Kim, and Byung-Gook Park, "Investigation of bias temperature instability in HfInZnO thin film transistor," International Conference on Solid State Devices and Materials, pp. 379-380, Sep. 2010

[293] Jang-Gn Yun, Dae Woong Kwon, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Bandgap Engineered Nanowire (BEN) SONOS NAND Flash Memory," International Conference on Solid State Devices and Materials, pp. 752-753, Sep. 2010

[292] Sunyoung Park, Sanghoon Lee, Yeonsung Kang, Byung-Gook Park, Jong-Ho Lee, Jooyoung Lee, Gyoyoung Jin, and Hyungcheol Shin, "Extracting Accurate Position and Energy Level of Oxide Trap Generating Random Telegraph Noise(RTN) in Recessed Channel MOSFET’s," European Solid-State Device Research Conference, pp. 337-340, Sep. 2010

[291] Min-Chul Sun, Wandong Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Sunghun Jung, Dae Woong Kwon, Jisoo Chang, Jang Hyun Kim, and Byung-Gook Park, "Influence of Sidewall Thickness Variation on Transfer Characteristics of L-shaped Impact-Ionization MOS Transistor," IEEE NANO, pp. 1009-1009, Aug. 2010

[290] Jong-Ho Lee, Hyuck-In Kwon, Hyungcheol Shin, Byung-Gook Park, and Young June Park, "Electrical Instabilities and Low-Frequency Noise in InGaZnO Thin Film Transistors(invited)," IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, pp. 0-0, Jul. 2010

[289] Sang Wan Kim, Garam Kim, Won Bo Shim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Simulation of Retention Characteristics in a Double-Gate and Recessed-Channel 1T DRAM cell with High Reliability," ITC-CSCC, pp. 905-906, Jul. 2010

[288] Seongjae Cho, Jung Hoon Lee, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Biasing and Process Conditions for Reducing Cell-to-Cell Interference in Highly Scalable 3-D NAND Flash Memory Array," ITC-CSCC, pp. 835-837, Jul. 2010

[287] Doo-Hyun Kim, Gil Sung Lee, Seongjae Cho, Jung Hoon Lee, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "Threshold Voltage Roll-off Mechanisms in SONOS Flash Memory in Retention Mode Including Trapped Charge Redistribution Effect," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 37-40, Jul. 2010

[286] Yoon Kim, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Se Hwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Independent Gate Twin-bit SONOS Flash Memory with Split-gate Effect," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 217-220, Jul. 2010

[285] Joung-eob Lee, Kwon-Chil Kang, Jung Han Lee, Kyung Wan Kim, and Byung-Gook Park, "Characteristic of Dual-Gate Single Electron Transistor (DG-SET) with extended channel using shallow doping and sidewall patterning for suppressing MOS current," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 315-318, Jul. 2010

[284] Gil Sung Lee, Doo-Hyun Kim, Jang-Gn Yun, Jung Hoon Lee, Yoon Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "A New Cone-Type 1T DRAM Cell," Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 23-25, Jul. 2010

[283] Seongjae Cho, Jung Hoon Lee, Kyung-Chang Ryoo, Sunghun Jung, Jong-Ho Lee, and Byung-Gook Park, "Vertically Stackable Novel One-Time Programmable Nonvolatile Memory Devices Based on Dielectric Breakdown Mechanism," International Conference on the Physics of Semiconductors, pp. 1058-1058, Jul. 2010

[282] Ju-Wan Lee, Hyungcheol Shin, Byung-Gook Park, and Jong-Ho Lee, "Comparison of low frequency noise characteristics between channel and gateinduced drain leakage currents in nMOSFETs," International Conference on the Physics of Semiconductors, pp. 1044-1044, Jul. 2010

[281] Dong Hua Li, Yoon Kim, Gil Sung Lee, Doo-Hyun Kim, Jung Hoon Lee, and Byung-Gook Park, "Charge Trapping and Memory Behaviors of the Ultra-thin SiN Layers," International Conference on the Physics of Semiconductors, pp. 1102-1102, Jul. 2010

[280] Kyung-Chang Ryoo, Jeong-Hoon Oh, Hongsik Jeong, and Byung-Gook Park, "Irregular Resistive Switching Characteristics and Its Mechanism based on NiO Unipolar Switching Resistive Random Access Memory (RRAM)," Silicon Nanoelectronics Workshop, pp. 49-50, Jun. 2010

[279] Sang Wan Kim, Garam Kim, Wonjoo Kim, Hyoungsoo Ko, and Byung-Gook Park, "Investigation of 1T DRAM Cell with Non-Overlap Structure and Recessed Channel," Silicon Nanoelectronics Workshop, pp. 139-140, Jun. 2010

[278] Kwon-Chil Kang, Jung Han Lee, Joung-eob Lee, and Byung-Gook Park, "Gate Self-alignment of Poly-silicon Quantum Dot Single Electron Transistors," Silicon Nanoelectronics Workshop, pp. 109-110, Jun. 2010

[277] Jeong-Hoon Oh, Kyung-Chang Ryoo, Sunghun Jung, Kyung Seok Oh, Hyungcheol Shin, and Byung-Gook Park, "Effects of Aluminum Layer and Oxidation on TIO2 based Bipolar Resistive Random Access Memory (RRAM)," Silicon Nanoelectronics Workshop, pp. 155-156, Jun. 2010

[276] Ju-Wan Lee, Min-Kyu Jeong, Hyuck-In Kwon, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "3-D stacked Active Layers and Vertical Gate NAND Flash String with Single-Crystal Si Channel by Adopting Si/SiGe Selective Etch Process," Silicon Nanoelectronics Workshop, pp. 141-142, Jun. 2010

[275] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Sang Wan Kim, Min-Chul Sun, Garam Kim, Hyun Woo Kim, Dae Woong Kwon, Jisoo Chang, Jang Hyun Kim, Hongsik Jeong, and Byung-Gook Park, "Relationships of Resistive Switching Parameters of Resistive Random Access Memory (RRAM) for High Density and Low Power Application," International Conference on Electronics, Information and Communication(ICEIC), pp. 11-13, Jun. 2010

[274] Jang-Gn Yun, Dae Woong Kwon, Sang Wan Kim, Jong-Ho Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Dumbbell-shaped Nanowire with Body Contact Region for Three Dimensional (3D) NAND Flash Memory Application," International Conference on Electronics, Information and Communication(ICEIC), pp. 5-7, Jun. 2010

[273] Seongjae Cho, Yoon Kim, Won Bo Shim, Dong Hua Li, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Highly Scalable Vertical Bandgap-Engineered NAND Flash Memory," Device Research Conference, pp. 265-266, Jun. 2010

[272] Min-Kyu Jeong, Ju-Wan Lee, Ilwhan Cho, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "Novel 3-D Stacked NAND Flash String without Body Cross-Talk Effect," IEEE International Memory Workshop, pp. 177-178, May. 2010

[271] Junghwan Ji, Byung-Gook Park, Jong-Ho Lee, and Hyungcheol Shin, "A Comparative Study of the Program Efficiency of Gate All around SONOS and TANOS Flash Memory," IEEE International Memory Workshop, pp. 171-172, May. 2010

[270] Dong Hua Li, Yoon Kim, and Byung-Gook Park, "Comparative Analysis of Trap-based Program/Erase Behaviors with Tunnel Dielectric for SONOS Flash Memory," IEEE International NanoElectronics Conference, pp. 3-8, Jan. 2010

[269] Seongjae Cho, Jung Hoon Lee, Shinichi O'uchi, Kazuhiko Endo, Meishoku Masahara, and Byung-Gook Park, "Design of SOI FinFET on 32nm Technology Node for Low Standby power (LSTP) Operation Considering Gate-Induced Drain Leakage (GIDL)", 2009 International Semiconductor Device Research Symposium, Baltimore, USA, Dec. 9-11, 2009.

[268] Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Min-Chul Sun, Garam Kim, Hyun Woo Kim, Jisoo Chang, Sunghun Jung, Hyungcheol Shin, and Byung-Gook Park, "Fabrication and Characterization of Buried-Gate Fin and Recess Channel MOSFET for High Performance and Low GIDL Current", 2009 International Semiconductor Device Research Symposium, Baltimore, USA, Dec. 9-11, 2009.

[267] Dong Hua Li, Wandong Kim, Jung Hoon Lee, and Byung-Gook Park, "Thickness-Dependent Trap-Based Erase Property of Oxide-Nitride-Oxide for SONOS Flash Memory", 2009 International Semiconductor Device Research Symposium, Baltimore, USA, Dec. 9-11, 2009.

[266] Wandong Kim, Il Han Park, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, and Byung-Gook Park, "Enhancement of Erase Speed Using Silicide Drain in Nanowire SONOS NAND Flash memory", 2009 International Semiconductor Device Research Symposium, Baltimore, USA, Dec. 9-11, 2009.

[265] Dong Hua Li, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, Seongjae Cho, and Byung-Gook Park, "Scaling Behaviors of Silicon Nitride Layer for Charge Trapping Memory", AVS 56th International Symposium and Exhibition, San Jose, USA, EM-TuP18, Nov. 8-13, 2009

[264] Dong Seup Lee, Kwon-Chil Kang, Joung-Eob Lee, Hong-Seon Yang, Jung Han Lee, and Byung-Gook Park, "Dual-Gate Single-Electron Transistors (DG-SETs) with Silicon Nano-Wire Channel and Surrounding Side Gates", Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials, Sendai, Japan, pp. 266-267, Oct. 7-9, 2009.

[263] Seongjae Cho, Sang Wan Kim, Kazuhiko Endo, Shinichi O'uchi, Takashi Matsukawa, Younghwan Son, Jong Pil Kim, Kunihiro Sakamoto, Yongxun Liu, Byung-Gook Park and Meishoku Masahara, "Rigorous Design of 20 nm Level SOI 4-T FinFETs for Low Standby Power by Extracting Parameters from the Pre-stage 50 nm Technology Node Devices", Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials, Sendai, Japan, pp. 380-381, Oct. 7-9, 2009.

[262] Seongjae Cho, Hee-Sauk Jhon, Il Han Park, Jung Hoon Lee, Hyungcheol Shin and Byung-Gook Park, "Device and Circuit Co-Design Strategy for Radio Frequency (RF) Applications Based on Silicon Nanowire (SNW) MOSFETs", Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials, Sendai, Japan, pp. 1104-1105, Oct. 7-9, 2009.

[261] Dong Hua Li, Byung-Gook Park, "Improvement on Erase Characteristics of SONOS Flash Memory by Bandgap Engineering of Tunnel Oxide", 2009 International Intergrated Reliability Workshop, California, USA, Oct. 18-22, 2009.

[260] Dong Hua Li, Se Hwan Park, Byung-Gook Park, "Long-term Data Retention of Charge Trapping Layer with Thickness-dependent Characteristics in Bandgap Engineering SONOS Structure", 10th Annual Non-Volatile Memory Technology Symposium, Portland, USA, pp.7-5 Oct. 25-28, 2009.

[259] Seongjae Cho, Yoon Kim, Jang-Gn Yun, Jung Hoon Lee, Won Bo Shim, and Byung-Gook Park, "Dependence of Program and Erase Speeds on Bias Conditions for Fully Depleted Channel of Vertical NAND Flash Memory Devices", 10th Annual Non-Volatile Memory Technology Symposium, Portland, USA, pp.8-2 Oct. 25-28, 2009.

[258] Seongjae Cho, Il Han Park, Jung Hoon Lee, Yoon Kim, Hyungcheol Shin and Byung-Gook Park, "Analytical Modeling of Radial Channel Potential and Surface Charge Density of Cylindrical MOSFET Devices under Arbitrary Surface Potentials", The 24nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2009), Jeju, Korea, pp. 1213-1214, July 5-8, 2009.

[257] Dong Hua Li, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung lee, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "Effects of Equivalent Oxide Thickness on Bandgap-Engineered SONOS Flash Memory", 2009 IEEE Nanotechnology Materilas and Devices Conference, Traverse City, Michigan, USA, pp.255-258, June 2-5, 2009.

[256] Garam Kim, Sang Wan Kim, Jae Young Song, Jong Pil Kim, Kyung-Chang Ryoo, Jeong-Hoon Oh, Jae Hyun Park, Hyun Woo Kim and Byung-Gook Park, "Body-Raised Double-Gate Structure for 1T DRAM", 2009 IEEE Nanotechnology Materilas and Devices Conference, Traverse City, Michigan, USA, pp.259-263, June 2-5, 2009.

[255] Seongjae Cho, Dong Hua Li, Doo-Hyun Kim, Il Hwan Cho, and Byung-Gook Park, "Channel Doping Concentration and Fin Width Effects on Self-Boosting in NAND-Type SONOS Flash Memory Array Based on Bulk-FinFETs", 2009 IEEE Nanotechnology Materilas and Devices Conference, Traverse City, Michigan, USA, pp.251-254, June 2-5, 2009.

[254] Dong Hua Li, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung lee, Yoon Kim, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Study of Tunneling Oxides Fabricated by Different Processes and Their Effects on Memory Characteristics of SONOS Capacitors", E-MRS 2009 Spring Meeting, Congress Center, Strasbourg, France, I15-11, June 8-12, 2009.

[253] Dong Seup Lee, Kwon-Chil Kang, Joung-Eob Lee, Hong-Seon Yang, Jung Han Lee, Sang Hyuk Park, and Byung-Gook Park, "Gate-All-Around Tunneling Field-Effect Transistors (GAA TFETs)", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 59-60, June 13-14, 2009.

[252] Sang Hyuk Park, Dong-Seup Lee, Sangwoo Kang, Jung Han Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, "Fabrication and Operation Characteristics of Recessed-Channel Dual-Gate Single-Electron Transistors", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 97-98, June 13-14, 2009.

[251] Seongjae Cho, Shinichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Kunihiro Sakamoto, Yongxun Liu, Byung-Gook Park and Meishoku Masahara "Minimization of Gate-Induced Drain Leakage (GIDL) for Low Standby Power in 20 nm Level SOI 4-T FinFETs by Controlling Underlap Lengths", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 41-42, June 13-14, 2009.

[250] Doo-Hyun Kim, Yoon Kim, Il Han Park, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Gil Sung Lee, Se Hwan Park, Won Bo Shim and Byung-Gook Park, "Simulation of Retention Characteristics in Double-Gate Structure SONOS Flash Memory with Body Doping Concentration", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 71-72, June 13-14, 2009.

[249] Jang-Gn Yun, Il Han Park, Wandong Kim, Jong Duk Lee and Byung-Gook Park, "Word-line Double Patterning Process (WDPP) for High Density, Low Cost NAND Flash Memory", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 73-74, June 13-14, 2009.

[248] Won Bo Shim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Jang-Gn Yun, Dong Hua Li, Gil Sung Lee, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Device Structure and Operation of Stacked Vertical AND array for High Density Flash Memory", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 79-80, June 13-14, 2009.

[247] Wandong Kim, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, "Impact of Three-dimensional Device Structures on NAND Flash Memory with Inversion Type Source and Drain", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 69-70, June 13-14, 2009.

[246] Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Jae Hyun Park, Garam Kim, Hyun Woo Kim, Atteq Ur Rehman, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Buried-Gate Fin and Recess Channel MOSFET for Sub-30 nm DRAM Cell Transistors with High Performance and Low GIDL Current", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 51-52, June 13-14, 2009.

[245] Jeong-Hoon Oh, Kyung-Chang Ryoo, Jong Pil Kim, Jae Young Song, Kyung Seok Oh, Hyungcheol Shin, and Byung-Gook Park, "An Access-Transistor or Diode-Free (0T or 0D/2R) Resistance Random Access Memory (RRAM) Using a Novel Access and Switching Mechanism", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 65-66, June 13-14, 2009.

[244] Kyung-Chang Ryoo, Jeong-Hoon Oh, Hongsik Jeong, Hyungcheol Shin, and Byung-Gook Park, "Novel Multi-Bit Structure and Its Mechanism for High Density Resistive Random Access Memory (RRAM)", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 63-64, June 13-14, 2009.

[243] Jae Hyun Park, Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jeong-Hoon Oh, Kyung-Chang Ryoo, Ga Ram Kim, Hyun Woo Kim, and Byung-Gook Park, "Fabrication and Analysis of the Gate-All-Around (GAA) Structure Silicon Nanowire MOSFET", 2009 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 13-14, June 13-14, 2009.

[242] Dong-Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jung Han Lee and Byung-Gook Park, "Gate-All-Around Tunnel Field-Effect Transistor (GAA TFET) with Vertical Channel and n-doped Layer", 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, 1B.11, June 24-26, 2009.

[241] Joung-eob Lee, Kwon-Chil Kang, Jung Han Lee and Byung-Gook Park, "Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier", 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, 1B.8, June 24-26, 2009.

[240] Seongjae Cho, Jung Hoon Lee, Yoon Kim, Jang-Gn Yun, Hyungcheol Shin, and Byung-Gook Park, "Study on Dependence of Self-Boosting Channel Potential on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices", 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, 3B.8, June 24-26, 2009.

[239] Yoon Kim, Seongjae Cho, Jang-Gn Yun, Il Han Park, Gil Sung Lee, Doo-Hyun Kim, Dong Hua Li, Se Hwan Park, Wandong Kim, Wonbo Shim, and Byung-Gook Park, "Multi-level reading method by using PCI (Paired Cell Interference) in vertical NAND flash memory", 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, 3B.3, June 24-26, 2009.

[238] Jongwook Jeon, Jeahong Lee, Junsoo Kim, C. H. Park, H Lee, H Oh, H. K. Kang, Byung-Gook Park, Hyungcheol Shin, “The first observation of shot noise characteristics in 10-nm scale MOSFETs”, 2009 Symposia on VLSI Technology and Circuit, Kyoto, Japan, pp. 48-49, June, 2009.

[237] Seongjae Cho, Il Han Park, Jung Hoon Lee, Jong Duk Lee, and Byung-Gook Park, "Program Efficiency Relying on Channel Conditions at NOR-Type Flash Memory Device Based on Silicon-on-Insulator (SOI)," 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong, December 8-10, 2008.

[236] Dong Hua Li, Seongjae Cho, Il Han Park, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Se-Hwan Park, Won Bo Sim, Jong Duk Lee, and Byung-Gook Park, "Charge Trapping Characteristics of SONOS Capacitors with Control Gates of Different Work Functions during Program/Erase Operation," 2008 Materials Research Society, Boston, USA, A11.1, December 1-5, 2008.

[235] Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, and Byung-Gook Park, "Analytical Modeling of Channel Potential and Surface Charge Density for Gate-All-Around (GAA) or Nanowire MOSFETs," 2008 International Workshop on Next Generation Electronics, Tainan County, Taiwan, pp.13-14, November 20-21, 2008.

[234] Lee Jaehong ; Jun Jongwook ; Junsoo Kim ; Byung-Gook Park ; Jong Duk Lee ; Hyungcheol Shin, "Prediction of channel thermal noise in twin silicon Nanowire MOSFET (TSNWFET)", The 9th International Conference on Solid-State and Integrated-Circuit Technology, pp.0-0, Oct. 2008

[233] Junsoo Kim ; Seungwon Yang ; Lee Jaehong ; 석성대 ; 서강일 ; 박동건 ; Byung-Gook Park ; Jong Duk Lee ; Hyungcheol Shin, "Investigation of mobility in twin silicon nanowire MOSFETs (TSNWFETs)", The 9th International Conference on Solid-State and Integrated-Circuit Technology, pp.0-0, Oct. 2008

[232] Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Se-Hwan Park, Won Bo Sim, Wandong Kim, Jong Duk Lee and Byung-Gook Park, "Stacked Vertical Channel (SVC) NOR Flash Memory," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.151, October 20-22, 2008.

[231] Seongjae Cho, Yoon Kim, Se Hwan Park, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Design Considerations for Gated Twin-Bit (GTB) Nonvolatile Memory Device Regarding Leakage Current," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.208, October 20-22, 2008.

[230] Jong Pil Kim, Jae Young Song, Sang Wan Kim, Han Ki Chung, Jae Hyun Park, Hee Sauk Jhon, Ga Ram Kim, Hyungcheol Shin, Jong Duk Lee and Byung-Gook Park, "High Performance RF Characteristics of Asymmetric MOSFETs," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.56, October 20-22, 2008.

[229] Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jae Hyun Park, Ga Ram Kim, Jong Duk Lee and Byung-Gook Park, "Design Consideration for Source/Drain and LDD Junction of FiReFET," The 2nd IEEE Nanotechnology Materials and Devices Conference, Kyoto, Japan, pp.150, October 20-22, 2008.

[228] Dae Woong Kang ; Seungwon Yang ; Jinho Kim ; Duckhyung Lee ; Byung-Gook Park ; Younghwan Son ; Jong Duk Lee ; Hyungcheol Shin, "Extraction of vertical, lateral locations and energies of hot-electrons-induced traps through the random telegraph noise", International Conference on Solid State Devices and Materials, pp.428-429, Sep. 2008

[227] Jun Jongwook ; Lee Jaehong ; Chan Hyeong Park ; Jong Shik Yoon ; Hyunwoo Lee ; Hansu Oh ; Byung-Gook Park ; Hyungcheol Shin, "Accurate channel thermal noise modeling in BSIM4", International Conference on Solid State Devices and Materials, pp.890-891, Sep. 2008

[226] [Plenary] Byung-Gook Park, "Nanosculptures: Three-dimensional CMOS device structures for the ULSI Era," 15th International Conference on Superlattices, Nanostructures and Nanodevices, Natal, Brazil, p.73, Aug. 2008

[225] Yoo Chul Kim, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Charge Injection Path of Bottom-Contact Organic Thin-Film Transistors," 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp. 125-128, July 9-11, 2008.

[224] Doo-Hyun Kim, Il Han Park, and Byung-Gook Park, " Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memory," 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.81-84, July 9-11, 2008.

[223] Seongjae Cho, Il Han Park, Jung Hoon Lee, Gil Sung Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Design of Vertical Nonvolatile Memory Device Considering Gate-Induced Barrier Lowering (GIBL), " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.95-99, July 9-11, 2008.

[222] Yoon Kim, Gil-Seong Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " 3-dimensional Terraced NAND (3D TNAND) Flash Memory, " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.85-88, July 9-11, 2008.

[221] Sang Hyuk Park, Sangwoo Kang, Dong-Seup Lee, Jung Han Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, and Byung-Gook Park, " Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for room temperature operation, " 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp.73-76, July 9-11, 2008.

[220] Se Hwan Park, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Jong Duk Lee and Byung-Gook Park, " Design and Simulation of Folded Split Gate SONOS Memory," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-21, June 15-16, 2008.

[219] Gil Sung Lee, Il Han Park, Seongjae Cho, Jang-Gn Yun, Jung Hoon Lee, Dong Hua Li, Doo Hyun Kim, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Memory characteristics improvement encouraged by the shape of narrow drain in cone SONOS memory structure," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-30, June 15-16, 2008.

[218] Dong-Seup Lee, Sangwoo Kang, Kwon-Chil Kang, Joung-Eob Lee, Hong-Seon Yang, Jung Han Lee, Sang Hyuk Park, Jung Hoon Lee, Jong-Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Fabrication and Improved Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P1-24, June 15-16, 2008.

[217] Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Se-Hwan Park, Yoon Kim, Dong Hua Lee, Seongjae Cho, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, " Vertical Channel Double Split-Gate (VCDSG) Flash Memory," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-29, June 15-16, 2008.

[216] Sang Wan Kim, Jae Young Song, Jong Pil Kim, Woo Young Choi, Han Ki Chung, Jae Hyun Park, Hyoungsoo Ko, Seungbum Hong, Hongsik Park, Chulmin Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Investigation of Resistive Probes with High Sensitivity," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-15, June 15-16, 2008.

[215] Han Ki Chung, Hoon Jeong, Yeun Seung Lee, Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jae Hyun Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " A Capacitor-less 1T-DRAM Cell with Vertical Surrounding Gates Using Gate-Induced Drain-Leakage (GIDL) Current," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, M0345, June 15-16, 2008.

[214] Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Gil Sung Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, " Gated Twin-Bit (GTB) Nonvolatile Memory Device and Its Operation," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-20, June 15-16, 2008.

[213] Kwon-Chil Kang, Hong Sun Yang, Joung-eob Lee, Jang-Gn Yun, Jung Han Lee, Dong-Seup Lee, Sang Hyuk Park, Jong Duk Lee, and Byung-Gook Park, " Room Temperature Behavior of Poly-silicon Quantum Dot Single Electron Transistors," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P1-28, June 15-16, 2008.

[212] Yoon Kim, Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Se-Hwan Park, Dong Hua Lee, Doo-Hyun Kim, Gil Sung Lee, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, " Locally-Separated Vertical Channel SONOS Flash Memory (LSVC SONOS) for Multi-Storage and Multi-Level Operation," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-33, June 15-16, 2008.

[211] Doo-Hyun Kim and Byung-Gook Park, " Program/Erase Model of NAND-type Nitride-Based Charge Trapping Flash Memories," IEEE 2008 Silicon Nanoelectronics Workshop, Honolulu, USA, P2-36, June 15-16, 2008.

[210] Seongjae Cho, Il Han Park, Younghwan Son, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, " Dependency of Program Efficiency on Implementation Conditions for NOR Type Silicon-on-Insulator (SOI) Flash Memory," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.412-415, June 24-27, 2008.

[209] Jung Hoon Lee, Il Han Park, Seongjae Cho, Gil Seong Lee, Doo Hyun Kim, Jang Gn Yun, Yoon Kim, Jong Duk Lee, Byung-Gook Park, " Enhanced Program/Erase Characteristic of Arch Shaped SONOS Flash Memory," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1029-1032, June 24-27, 2008.

[208] Doo-Hyun Kim , Gil Sung Lee, Jung Hoon Lee, Il Han Park, Seong-Jae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, and Byung-Gook Park, " Retention Model of NAND-type Nitride-Based Charge Trapping Flash Memory," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1033-1036, June 24-27, 2008.

[207] Gil Sung Lee, Doo Hyun Kim, Il Han Park, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Jong Duk Lee and Byung-Gook Park, " Fabrication Process of Cone SONOS Memory Structure," 2008 The 9th International Conference on Electronics, Information, and Communication, Tashkent, Uzbekistan, pp.1017-1020, June 24-27, 2008.

[206] Jun Jongwook, Jong Duk Lee, Byung-Gook Park, Hyungcheol Shin, "White noise characteristic of nanoscale MOSFETs in all operation regions", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008

[205] Junsoo Kim, Lee Jaehong, Yoon Yeonam, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Temperature dependence of effective channel length, Source/Drain resistance, and electron mobility in sub-50 nm MOSFETs", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008

[204] Dae Woong Kang, Sungnam Chang, Jung Hun Lee, Il Han Park, Seunggun Seo, Gideok Kwon, Kyungmi Bae, Inyoung Kim, Eunjung Lee, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using arch-active profile in NAND flash memory having 60 nm design rule", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008

[203] Dae Woong Kang, Sungnam Chang, Seungwon Yang, Eunjung Lee, Seunggun Seo, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Extraction of location and energies of traps in nanoscale flash memory using RTN", Silicon Nanoelectronics Workshop, pp.0-0, Jun. 2008

[202] Jae Young Song, Jong Pil Kim, Sang Wan Kim, Han Ki Jung, Jae Hyun Park, Jong-Duk Lee, and Byung-Gook Park, "Fin and Recess Channel MOSFET (FiReFET) for Performance Enhancement of Sub-50 nm DRAM Cell," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[201] Seongjae Cho, Il Han Park, Jong-Duk Lee, and Byung-Gook Park, "Negative Read Biasing Effects for the Reliable Operation of NOR Type Floating Gate Flash Memory Devices," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[200] Jang-Gn Yun, Yoon Kim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Dong Hwa Lee, Se Hwan Park, Wonbo Sim, Jong-Duk Lee, and Byung-Gook Park, "Fin Flash Memory Cells with Separated Double Gates," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[199] Kwon-Chil Kang, Sangwoo Kang, Hong Sun Yang, Seung-hwan Song, Jinho Kim, Jong-Duk Lee, and Byung-Gook Park, "Poly-silicon Quantum Dot Single Electron Transistors," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[198] Il Han Park, Seongjae Cho, Jung Hun Lee, Gil Seong Lee, Doo-Hyung Kim, Jang-Gn Yoon, Yoon Kim, Sangwoo Kang, Il Hwan Cho, Daewoong Kang, Jong-Duk Lee, and Byung-Gook Park, "Vertical AND (V-AND) Array: High Density, High Speed, and Reliable Flash Array," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[197] Keum-Dong Jung, Byeong-Ju Kim, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "A Novel Gated Transmission Line Method for Organic Thin Film Transistors," 2007 International Semiconductor Device Research Symposium, FA4-04, Maryland, USA, December 12-14, 2007.

[196] Il Hwan Cho, Il Han Park, Jong-Ho Lee, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Fin Width Variation Effects on Program Disturbance Characteristics in a NAND Type Bulk Fin SONOS Flash Memory," 2007 International Semiconductor Device Research Symposium, Maryland, USA, December 12-14, 2007.

[195] Daewoong Kang, Sungnam Jang, Kyong joo Lee, Jinjoo Kim, Dongwon Chang, Hyukje Kwon, Wonseong Lee, Il Han Park, Jun Su Kim, Jae Hong Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Improving the Cell Characteristics Using SiN Liner at Active Edge in 4G NAND Flash," 2007 International Conference on Solid State Devices and Materials, pp.238-239, Tsukuba, Japan, September 19-21, 2007.

[194] Junsoo Kim, Jaehong Lee, Yeonam Yun, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Accurate Extraction of Mobility, Effective Channel Length, and Source/Drain Resistance in 60 nm MOSFETs," 2007 International Conference on Solid State Devices and Materials, pp.442-443, Tsukuba, Japan, September 19-21, 2007.

[193] Jongwook Jeon, Yeonam Yun, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Spatial Distrubution of Channel Thermal Noise in Short-Channel MOSFETs," 2007 International Conference on Solid State Devices and Materials, pp.448-449, Tsukuba, Japan, September 19-21, 2007.

[192] Keum-Dong Jung, Byeong-Ju Kim, Yoo Chul Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "An Analytic Current-Voltage Equation for Top-contact OTFTs Including the Effects of Variable Series Resistance," 2007 International Conference on Solid State Devices and Materials, pp.1080-1081, Tsukuba, Japan, September 19-21, 2007.

[191] Sangwoo Kang, Dae-Hwan Kim, Il-Han Park, Jin-Ho Kim, Joung-eob Lee, Jong-Duk Lee, Byung-Gook Park, "Self-Aligned Dual-Gate Single-Electron Transistors (DG-SETs)," 2007 International Conference on Solid State Devices and Materials, pp.1136-1137, Tsukuba, Japan, September 19-21, 2007.

[190] Keum-Dong Jung, Yoo Chul Kim, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Concept of Effective Gate-Source Overlap Length in Inverted-staggered TFT Structures," 2007 International Meeting on Information Display, pp.1270-1272, Daegu, Korea, August 27-31, 2007.

[189] [Invited] Byung-Gook Park, "Silicon Nanoelectronic Devices: CMOS and Its Extensions", The 5th International Nanotech Symposium and Exhibition in Korea (Nano Korea 2007), Korea, pp. 102-104, August 29-31, 2007.

[188] Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "Characterization of 2-bit Recessed Channel Memory with Lifted Charge Trapping Node Scheme", The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 2, pp. 437-438, July 8-11, 2007.

[187] Se Hwan Park, Il Han Park, Jung Hoon Lee, Jong-Duk Lee, and Byung-Gook Park, "2-bit/Cell Split Gate Flash Memory with Double Gate," The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 2, pp. 437-438, July 8-11, 2007.

[186] Yoo Chul Kim, Keum-Dong Jung, Byeong-Ju Kim, Jong Duk Lee, and Byung-Gook Park , "A New Threshold Voltage Extraction Method for Organic Thin-Film Transistors", The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 3, pp. 1445-1446, July 8-11, 2007.

[185] Doo-Hyun Kim, Seongjae Cho, and Byung-Gook Park, " P/E Transient Modeling of NAND SONOS Flash Memories," The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007), Busan, Korea, vol. 3, pp. 1439-1440, July 8-11, 2007.

[184] Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Jong-Duk Lee, and Byung-Gook Park, "2-bit Recessed Channel Nonvolatile Memory Device with Lifted Charge Trapping Node Scheme", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 99-100, June 10-11, 2007.

[183] Gil Sung Lee, Il Han Park, Seong Jae Cho, Jang-Gn Yun, Jung Hoon Lee, Dong Hwa Lee, Doo Hyun Kim, Yoon Kim, Se Hwan Park and Byung-Gook Park, "Program Characteristic Improvement in Cone Type SONOS Memory Structure", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 97-98, June 10-11, 2007.

[182] Yeun Seung Lee, Hoon Jeong, Han Ki Chung, Byung Su Yoo, Seung Beom Kim, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "New Capacitor-less 1T DRAM Cell Based on a Double Gate MOSFET with Vertical Channel (DGVC Cell)", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 63-64, June 10-11, 2007.

[181] Il Han Park, Se Hwan Park, Seongjae Cho, Jung Hun Lee, Gil Sung Lee, Doo Hyun Kim, Jang Geoun Yoon, Yoon Kim, Jong Duk Lee, and Byung-Gook Park, "Self-Aligned Vertical Channel Split-Gate (VCSG) SONOS Flash Memory with Stair-Channel Structure Fabricated by Two-Step Si Etching Process", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 109-110, June 10-11, 2007.

[180] Hoon Jeong, Yeun Seung Lee, Hanki Chung, Sangwoo Kang, Il Han Park, Chang Woo Oh, Ki-Whan Song, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "A Capacitor-less 1T DRAM Cell with High Sensing Margin", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 181-182, June 10-11, 2007.

[179] Jin Ho Kim, Seung-hwan Song, Sangwoo Kang, Il Han Park, Kwon Chil Kang, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Trench Tunneling Barrier Single-Electron Transistors (TSETs) Using Bandgap Increase by Quantum Confinement Effect", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 103-104, June 10-11, 2007.

[178] Jong Pil Kim, Jae Young Song, Sang Wan Kim, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "30-nm Asymmetric NMOSFET Using a Novel Fabrication Method", IEEE 2007 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 89-90, June 10-11, 2007.

[177] Jongwook Jeon, Ick Hyun Song, In Man Kang, Yeonam Yun, Byung-Gook Park, Jong Duk Lee, and Hyungchoel Shin, "A new noise parameter model of short-channel MOSFETs" , IEEE Radio Frequency Integrated Circuits Symposium, Honolulu, USA, pp. 639-642, June 3-5, 2007.

[176] [Invited] Byung-Gook Park and Jong Duk Lee, "Silicon Nanoelectronic Devices and Their Fabrication", ISESCO International Workshop and Conference on Nanotechnology (IWCN2007), Malaysia, pp. 4, June 12-15, 2007.

[175] [Invited] Byung-Gook Park and Jong Duk Lee, "Silicon Nanoelectronic Devices and Their Fabrication", ISESCO International Workshop and Conference on Nanotechnology (IWCN2007), Malaysia, pp. 4, June 12-15, 2007.

[174] Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Establishing Read Operation Bias Schemes for 3-D Pillar-Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)", 2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Gyeongju, Korea, pp. 247-250, June 25-27, 2007.

[173] Dong-Seup Lee, Sangwoo Kang, Joung-eob Lee and Byung-Gook Park, "Design and Simulation of Single Hole Transistor with Tunneling Barrier formed by Fixed Charge", 2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Gyeongju, Korea, pp. 152-155, June 25-27, 2007.

[172] Yoon Kim, Jang-Gn Yun and Byung-Gook Park, "4-bit FinFET SONOS Flash Memory-Optimization of Structure and 3D Numerical Simulation", 2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Gyeongju, Korea, pp. 229-232, June 25-27, 2007.

[171] Jang-Gn Yun, Yoon Kim, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Dong Hua Lee, Se-Hwan Park, Jong-Duk Lee, and Byung-Gook Park, "Study of Programming Characteristics of 4-bit SONOS Flash Memory Using 3-Dimensional Transient Simulation", 2nd International Conference on Memory Technology and Design, Giens, France, pp. 81-84, May 7-10, 2007.

[170] Dae Woong Kang , Sungnam Chang , Seunggun Seo , Yongwook Song , Hojin Yoon , Eunjung Lee , Dongwon Chang , Wonseong Lee , Byung-Gook Park , Jong Duk Lee , Il Han Park , Sangwoo Kang , Hyungcheol Shin, "Improving the endurance characteristics through boron implant at active edge in 1G NAND flash_", IEEE International Reliability Physics Symposium, pp.652-653, Apr. 2007. [INTL]

[169] Yeonam Yun, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin"Extraction of effective carrier velocity in RF MOSFETs", Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Long Beach, California, USA, pp. 72-75, Jan. 10-12, 2007.

[168] Youngchang Yoon, Hochul Lee, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, "Analysis of the Output Noise Voltage in CMOS Image Sensor Readout Circuit," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 944-946, Nov. 29-Dec. 1, 2006.

[167] Keum Dong Jung, Byung-ju Kim, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, Jong Duk Lee, "Considerations on the C-V Characteristics of Pentacene Metal-Insulator-Semiconductor Capacitors," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 572-575, Nov. 29-Dec. 1, 2006.

[166] Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Performance Improvement of OTFTs using Double Layer Insulator," IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, pp. 48-51, Nov. 29-Dec. 1, 2006.

[165] Dae Woong Kang, Sungnam Jang, Kyongjoo Lee, Jinjoo Kim, Hyukje Kwon, Wonseong Lee, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Improving the cell characteristics using low-k gate spacer in 1Gb NAND flash memory", IEEE International Electron Devices Meeting, San Francisco, U.S.A., Dec. 11-13, 2006.

[164] Woo Young Choi, Jae Young Song, Jong Pil Kim, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Breakdown Voltage Reduction in I-MOS Devices", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 380-381, October 22-25, 2006.

[163] Sang Wan Kim, Woo Young Choi, Jae Young Song, Jong Pil Kim, Junsoo Kim, Hyoungsoo Ko, Hongsik Park, Chulmin Park, Seungbum Hong, Sung-Hoon Choa, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Analysis and Modeling of Resistive Probes", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 318-319, October 22-25, 2006.

[162] Jung-Hoon Lee, Hyun-Woo Kim, Il Han Park, Seongjae Cho, Gil Seong Lee, Doo Hyun Kim, Jang Gn Yun, Yoon Kim, Jong Duk Lee, Byung-Gook Park, and Euijoon Yoon, "Low-pressure, low-temperature hydrogen annealing for nanoscale silicon fin rounding", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 638-639, October 22-25, 2006.

[161] Jaehong Lee, Junsoo Kim, Juhwan Jung, Seungbum Hong, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "A New Resistive Probe With Higher Resolution", IEEE Nanotechnology Materials and Devices Conference 2006, Gyeongju, Korea, pp. 114-115, October 22-25, 2006.

[160] [Invited] Byung-Gook Park, Il Han Park, Jung-Hoon Lee, Byung Youg Choi, "Novel Device Structures for Charge Trap Flash Memories", 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Shanghai, China, pp. 748-751, October 23-26, 2006.

[159] Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Low Hysteresis Organic Thin -Film Transistors and Inverters with Hybrid Gate Dielectric," 2006 International Conference on Solid State Devices and Materials, pp.928-929, Yokohama, Japan, September 13-15, 2006.

[158] Jae Young Song, Woo Young Choi, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Novel Gate-All-Around MOSFETs with Self-Aligned Structure," 2006 International Conference on Solid State Devices and Materials, pp.1072-1073, Yokohama, Japan, September 13-15, 2006.

[157] Woo Young Choi, Jae Young Song, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Multi-Functionality of Novel Structured Tunneling Devices," 2006 International Conference on Solid State Devices and Materials, pp.824-825, Yokohama, Japan, September 13-15, 2006.

[156] Cheon An Lee, Dong-Wook Park, Keum-Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-swing pentacene organic inverter with long-channel driver and short-channel load," 2006 International Conference on Solid State Devices and Materials, pp.774-775, Yokohama, Japan, September 13-15, 2006.

[155] Hoon Jeong, Yeun Seung Lee, Sangwoo Kang, Il Han Park, Woo Young Choi, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Capacitorless DRAM Cell with Highly Scalable Surrounding Gate Structure," 2006 International Conference on Solid State Devices and Materials, pp.574-575, Yokohama, Japan, September 13-15, 2006.

[154] [Invited] Byung-Gook Park, Woo Young Choi, Kyung Rok Kim,"Inter-band tunneling and its application to nanoscale silicon devices : TFET, FITET and MOSFET," International Symposium on the Physics of Semiconductors and Applications 2006, Jeju, Korea, pp.10, August 22-25, 2006.

[153] Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Modeling of pentacene MIS capacitors with admittance measurements and the effects of dispersive charge transport," 2006 International Meeting on Information Display, pp.67-69, Daegu, Korea, August 22-25, 2006.

[152] Dong-Wook Park, Cheon An Lee, Keum-Dong Jung, Byung-Gook Park, and Jong Duk Lee, "Bias stress effect in organic thin-film transistors with cross-linked PVA gate dielectric and its reduction method using SiO2 blocking layer," 2006 International Meeting on Information Display, pp.445-448, Daegu, Korea, August 22-25, 2006.

[151] Ki Hyun Lyoo, Byeong-Ju Kim, Cheon An Lee, Keum-Dong Jung, Dong-Wook Park, Byung-Gook Park, and Jong Duk Lee, "Performance improvement in bottom-contact pentacene organic thin-film transistors by the PMMA layer insertion," 2006 International Meeting on Information Display, pp.1139-1141, Daegu, Korea, August 22-25, 2006.

[150] Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Jong Pil Kim, Sangwoo Kang, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Analyses on Current Characteristics of 3-D MOSFET Nonvolatile Memory Devices Determined by Junction Doping Profiles," 2006 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sendai, Japan, pp. 171-174, July 3-5, 2006.

[149] Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sangwoo Kang, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park, "Design and Simulation of Asymmetric MOSFETs," 2006 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sendai, Japan, pp. 175-178, July 3-5, 2006.

[148] Kwon-chil Kang, Sangwoo Kang, Jin Ho Kim, Hong Sun Yang, Woo Young Choi, Gil Seong Lee, Jong Duk Lee, and Byung-Gook Park, "An Approach to a Small Dot Fabricated with an Etch-back Process," International Technical Conference on Circuits/Systems, Computers and Communications 2006,Thailand, pp. I_37-I_40, July 10-13, 2006.

[147] [Invited] Byung-Gook Park, Woo Young Choi and Jong Duk Lee,"Characterization and Design Consideration of I-MOS Devices," International Technical Conference on Circuits/Systems, Computers and Communications 2006,Thailand, pp. III_693-III_696, July 10-13, 2006.

[146] Hoon Jeong, Ki-Whan Song, Il Han Park, Tae Hun Kim, Yeun Seung Lee, Seong-Goo Kim, Jun Seo, Kyoungyong Cho, Kangyoon Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, " New Capacitor-less 1T DRAM Cell : Surrounding Gate MOSFET with a Vertical Channel (SGVC Cell),” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 103-104, June 11-12, 2006.

[145] Jae Young Song, Woo Young Choi, Ju Hee Park, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Effects of Oversized Bottom Gate in Self-Aligned Gate-All-Around MOSFET ,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 47-48, June 11-12, 2006.

[144] Seung-hwan Song, Kyung Rok Kim, Jin Ho Kim, Sangwoo Kang, Kwon Chil Kang, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Fabrication and Characterization of Tri-Gate Field-induced Inter-band Tunneling Effect Transistors (TG-FITETs),” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 53-54, June 11-12, 2006.

[143] Junsoo Kim, Youngho Jung, Seungbum Hong, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "Nano-scale Resistive Probe for Recording Applications,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 79-80, June 11-12, 2006.

[142] Jong Pil Kim, Woo Young Choi, Jae Young Song, Ju Hee Park, Jong Duk Lee, and Byung-Gook Park, "Design and Fabrication of Asymmetric MOSFETs Using a Sidewall Spacer,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 139-140, June 11-12, 2006.

[141] Ju Hee Park, Woo Young Choi, Jae Young Song, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Double-Gate SOI FinFETs Using Sidewall Multi-Line Patterning Technique,” IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 145-146, June 11-12, 2006.

[140] Jae Young Song, Woo Young Choi, Jong Pil Kim, Sang Wan Kim, Doo-Hyun Kim, Jin Ho Kim, Dong-Wook Park, Jong Duk Lee, and Byung-Gook Park, "Effects on Multi-Fin on Self-Aligned Gate-All-Around MOSFETs," 2006, Ulaanbaatar, Mongolia, pp. 21-24, June 27-28, 2006.

[139] Doo-Hyun Kim, Jung Hoon Lee, Il Han Park, Sung Jae Cho, Gil SUNG Lee, Yoon Kim, Jae Young Song, Jin Ho Kim, Dong-Wook Park, Jong Pil Kim, Jong Duk Lee, and Byung-Gook Park, "Silicon Corner Rounding for Nano-Scale Non-volatile Memory (NVM) Using Conventional Thermal Oxidation," International Conference on Electronics, Information, and Communication 2006, Ulaanbaatar, Mongolia, pp. 137-140, June 27-28, 2006.

[138] Youngchang Yoon, Hochul Lee, In Man Kang, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Random telegraph noise in 130 nm n-MOS and p-MOS transistors", Device Research Conference, Penn State Univ., U. S. A., pp.283-284, June. 2006.

[137] Kyung Rok Kim, Byung-Gook Park, and Robert W. Dutton, "Numerical Simualtion of Field-Induced Inter-Band Tunneling Effect Transistor Using TCAD-Based Device Simulator", Device Research Conference, Penn State Univ., U. S. A., pp.119-120, June. 2006.

[136] Keum-Dong Jung, Cheon An Lee, Dong-Wook Park, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "Extraction of Accumulation Mobility from C-V Characteristics of Pentacene MIS Structures", Device Research Conference, Penn State Univ., U. S. A., pp.139-140, June. 2006.

[135] Byung Yong Choi, Choong-Ho Lee, Yong Kyu Lee, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, Dong-Won Kim, Suk-Kang Sung, Se Hoon Lee, Byung-Kyu Cho, Tae-Yong Kim, Eun Suk Cho, Jong Jin Lee, and Donggun Park, "Investigation of Lateral Charge Distribution of 2-bit SONOS Memory Devices Using Physically Separated Twin SONOS Structure," ICMTS2006, Texas, U.S.A., pp. 47-50, March 6-9, 2006.

[134] Byung Yong Choi, Byung-Gook Park, Jong Duk Lee, Hyungchel Shin, Yong Kyu Lee, Suk-Kang Sung, Se-Hoon Lee, Heesoon Chae, Jong Jin Lee, Keun Hee Bai, Dong-Dae Kim, Dong-Won Kim, Choong-Ho Lee, and Donggun Park, "TWIn SONOS TransistOR (TWISTOR) for 2-bit/cell SONOS Memory Technology," IEEE Non-Volatile Semiconductor Memory Workshop, California, U.S.A., pp. 72-73, Feb. 12-16, 2006.

[133] Woo Young Choi, Jae Young Song, Jong Duk Lee, Young June Park, and Byung-Gook Park, "70-nm Impact-Ionization Metal-Oxide-Semiconductor (I-MOS) Devices Integrated with Tunneling Field-Effect Transistors (TFETs)," International Electron Devices Meeting, Washington, D.C., U.S.A., pp. 975-978, Dec. 5-7, 2005.

[132] Il Hwan Cho, Junsoo Kim, Il Han Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Isolation Method for Bulk FinFET without Using CMP Process," 2005 International Semiconductor Device Research Symposium, Maryland, U.S.A., December 7-9, 2005.

[131] Woo Young Choi, Byung Yong Choi, Ju Hee Park, Dong-Won Kim, Choong-Ho Lee, Donggun Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "25nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure," 2005 International Semiconductor Device Research Symposium, Bethesda, U.S.A., December 7-9, 2005.

[130] [Keynote speech] Jong Duk Lee, Woo Young Choi, Byung-Gook Park, "Challenges in Nanoscale Devices and Breakthrough," 2005 IEEE National Symposium on Microelectronics, Kuching, Malaysia, pp. A1-A5, November 21-24, 2005.

[129] Seongjae Cho, Il Han Pak, Tae Hun Kim, Jung Hoon Lee, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Quantitative Analyses on Voltage Schemes for Reliable Operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell," The 20th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2005), Jeju, Korea, pp. 147-148, July 4-7, 2005.

[128] Cheon An Lee, Kyoung Chul Jang, Sung Won Kim, Ki Hyun Ryoo, Sung Hun Jin, Jong Duk Lee, HyungCheol Shin, and Byung Gook Park, "Electrical performance and contact resistance with the substrate temperature in the pentacene organic thin-film transistors," 2005 International Meeting on Information Display, pp.1317-1319, Seoul, Korea, July 19-23, 2005.

[127] Ki Hyun Ryoo, Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Chang Bum Park, Jong Duk Lee, Hyungcheol Shin, and Byung Gook Park, "Triple Layer Passivation for Organic Thin-Film Transistors," 2005 International Meeting on Information Display, pp.1310-1312, Seoul, Korea, July 19-23, 2005.

[126] Chang Bum Park, Sung Hun Jin, Byung-Gook Park, and Jong Duk Lee, "Hybrid Insulator Organic Thin Film Transistors With Improved Mobility Characteristics," 2005 International Meeting on Information Display, pp.1291-1293, Seoul, Korea, July 19-23, 2005.

[125] Keum Dong Jung, Sung Hun Jin, Chang Bum Park, Hyungcheol Shin, Byung Gook Park, and Jong Duk Lee, "Effects of Peripheral Pentacene Region on C-V Characteristics of Metal-Oxide-Pentacene Capacitor Structure," 2005 International Meeting on Information Display, pp.1284-1287, Seoul, Korea, July 19-23, 2005.

[124] Seung-hwan Song, Kyung Rok Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "Analytical Modeling of Field-induced Inter-band Tunneling Effect Transistors (FITETs) and Its Application," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 104-105, June 12-13, 2005.

[123] Hoon Jeong, Ki-Whan Song, Soo-Ho Shin, Sang Ho Song, Jong Duk Lee, and Byung-Gook Park, "A Capacitor-less 1T DRAM Cell Based on a Surrounding Gate MOSFET with a Vertical Channel," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 92-93, June 12-13, 2005.

[122] Jae Young Song, Woo Young Choi, JuHee Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "Optimization of GAA MOSFET Structure and Comparison with DG MOSFETs," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 70-71, June 12-13, 2005.

[121] Woo Young Choi, Jae Young Song, Ju Hee Park, Jong Duk Lee, Young June Park, and Byung-Gook Park, "Effect of Substrate Doping Concentration on I-MOS Characteristics," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 46-47, June 12-13, 2005.

[120] Il Hwan Cho, Tai-su Park, Dong Gun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Erase Characteristics of p-Channel Bulk FinFET SONOS Flash Memory," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 40-41, June 12-13, 2005.

[119] Il Han Park, Tae Hun Kim, Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Design of Depletion Induced Body Screening (DIBS) Structure on SOI for Reliable Nanoscale NAND Flash Array," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 38-39, June 12-13, 2005.

[118] Seongjae Cho, Il Han Park, Tae Hun Kim, Jae Sung Sim, Ki-whan Song, Jong Duk Lee, Hyungcheol Shin and Byung-Gook Park, "Design and Optimization of Two-bit Double Gate Nonvolatile Memory Cell for Highly Reliable Operations," IEEE 2005 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 36-37, June 12-13, 2005.

[117] Jae Sung Sim, Il Han Park, Seongjae Cho, Tae Hun Kim, Ki Whan Song, Jihye Kong, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "BAVI-Cell: A Novel High-Speed 50 nm SONOS Memory with Band-to-Band Tunneling Initiated Avalanche Injection Mechanism," 2005 Symposium on VLSI Technology, Kyoto, Japan, pp. 122-123, June 14-16, 2005.

[116] Byung Yong Choi, Byung-Gook Park, Yong Kyu Lee, Suk Kang Sung, Tae Yong Kim, Eun Suk Cho, Hye Jin Cho, Chang Woo Oh, Sung Hwan Kim, Dong Won Kim, Choong-Ho Lee, and Donggun Park, "Highly Scalable and Reliable 2-bit/cell SONOS Memory Transistor beyond 50nm NVM Technology Using Outer Sidewall Spacer Scheme with Damascene Gate Process," 2005 Symposium on VLSI Technology, Kyoto, Japan, pp. 118-119, June 14-16, 2005.

[115] Sung Hun Jin, Keum Dong Jung, Hyungcheol Shin, Byung-Gook Park, and Jong Duk Lee, "Performance Improvement of Scaled-down Top-contact OTFTs by Two-Step-Deposition of Pentacene," 2005 SID International Symposium, pp. 292-295, Boston, U.S.A., May 24-27, 2005.

[114] Junsoo Kim, Seungbum Hong, Hyoungsoo Ko, Dong-Ki Min, Hongsik Park, Chulmin Park, Juhwan Jung, Jong Duk Lee, Byung-Gook Park, and Hyungcheol Shin, "Study on Sensitivity and Resolution of Resistive Probe by 3-D Device Simulation," IEEE Nanoscale Devices and System Integration, Houston, Texas, U.S.A., pp. 90, April 6, 2005.

[113] [Invited]Byung-Gook Park, "Silicon Quantum Tunneling Devices and Their Applications," 2005 RCIQE International Seminar for 21st Century COE Program: "Quantum Nanoelectronics for Meme-Media-Based Information Technologies (III)", Hokkaido University, Japan, pp. 1-7, Feb. 8~10, 2005.

[112] [Invited]Byung-Gook Park, "Silicon Tunneling and Single Electron Devices with Inter-Band Tunnel Barriers," The 1st Internaltional Symposium on Nanovision Science "Nanospace Manipulation of Photons and Electrons for Nanovision Systems", Hamamatsu, Japan, pp. 7-13, Feb. 14~15, 2005.

[111] Jong Duk Lee, Sung Hun Jin, Keum Dong Jung, and Byung-Gook Park, "Scaling-down Effects on the Electrical Performance of Top-contact Pentacene TFTs," 2004 IEEE International Conference on Semiconductor Electronics (ICSE2004), pp. 668-672, Kuala Lumpur, Malaysia, Dec. 7-9, 2004.

[110] Woo Young Choi, Jae Young Song, Byung Yong Choi, Jong Duk Lee, Young June Park, and Byung-Gook Park, "80nm Self-Aligned Complementary I-MOS Using Double Sidewall Spacer and Elevated Drain Structure and Its Applicability to Amplifiers with High Linearity," International Electron Devices Meeting, San Francisco, U.S.A., pp. 203-206, Dec. 13~15, 2004.

[109] [Invited]Byung-Gook Park, Yong Kyu Lee, Byung Yong Choi, and Dong Gun Park, "Nanoscale Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) Structure and Its Applications," 2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, Beijing, China, pp. 679-684, October 18-21, 2004.

[108] [Invited]Byung-Gook Park, "Nanoscale Silicon Tunneling Devices for Ultra-Low Power CMOS/QED Hybrid Cirtuits," International SOC Conference, Seoul, Korea, Oct. 25-26, 2004.

[107] Sung Hun Jin, Sang Min Yi, Keum Dong Jung, Chang Bum Park, Chong Nam Chu, Hyung Chul Shin, Byung-Gook Park, and Jong Duk Lee, "Pentacene TFTs Fabricated by High-aspect Ratio Metal Shadow Mask," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 864-865, September 15-17 2004.

[106] Yong Kyu Lee, Byung Yong Choi, Jae Sung Sim, Ki Whan Song, Jong Duk Lee and Byung-Gook Park, Donggun Park, Chilhee Chung, "A Highly Scalable Split-Gate SONOS Flash Memory with Programmable-Pass and Pure-Select Transistors for Sub-90-nm Technology," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 252-253, September 15-17 2004.

[105] [Invited]Byung-Gook Park, Kyung Rok Kim, Ki-Whan Song, Hyun Ho Kim, Jung Im Huh, and Jong Duk Lee, "Silicon Quantum Tunneling Devices - FIBTET and MOSET," Int'l Conf. on Solid State Devices and Materials 2004, Tokyo, Japan, pp. 120-121, September 15-17 2004.

[104] Byung Yong Choi, Yong Kyu Lee, Woo Young Choi, Il Han Park, Hyungcheol Shin, Jong Duk Lee, Byung-Gook Park, Sung Taek Kang, Chilhee Chung, and Donggun Park, "Programmable Virtual Source/Drain MOSFETs," 34th European Soild-State Device Research Conference, Leuven, Belgium, pp. 229-232, Sept. 21-23, 2004.

[103] Il Han Park, Yong Kyu Lee, Chang Ju Lee, Suk Kang Sung, Tae Hun Kim, Jae Sung Sim, Ji Hye Kong, Jong Duk Lee and Byung Gook Park, Soo Doo Chae, and Chung Woo Kim, "Fabrication of 30 nm Square-Channel SONOS Flash Memory on SOI and Characterization of Program/Erase Operation in Nanoscale Regime," IEEE Non-Volatile Semiconductor Memory Workshop(20th NVSM Workshop), pp.94-95, Monterey, California, U.S.A., August 22-26, 2004.

[102] Sung Hun Jin, Keum Dong Jung, Hyung Chul Shin, Byung-Gook Park, and Jong Duk Lee, Sang Min Yi and Chong Nam Chu, "Pentacene Thin Film Transistors Fabricated by High-aspect Ratio Metal Shadow Mask," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.881-884, Taegu, Korea, August 23-27, 2004.

[101] Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Thin-film passivation of the polymer EL device using parylene and its application to the passive matrix PELD system," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.669-672, Taegu, Korea, August 23-27, 2004.

[100] Sung Woo Ko, Hyung Cheol Shin, Byung Gook Park, Jong Duk Lee, Pil Goo Jun, Byung Hwak Kwak, Hyung Wook Noh, Hyung Soo Uh, "Effect of Rapid Thermal Annealing on Growth and Field Emission Characteristics of Carbon Nanotubes," The 24th International Display Research Conference (Asia Display) in conjunction with The 4rd International Meeting on Information Display, pp.453-455, Taegu, Korea, August 23-27, 2004.

[99] [Invited]Byung-Gook Park, Young Kyu Lee, Il Han Park, Chung Woo Kim, and Dong Gun Park, "Fabrication of Nanoscale Flash Memory Devices by Sidewall Spacer Patterning," U.S.-Korea Conference 2004, North Carolina, U.S,A., pp. 86, August 12-14 2004.

[98] [Invited]Byung-Gook Park, Young Kyu Lee, Il Han Park, Chung Woo Kim, and Dong Gun Park, "Nanoscale SONOS Flash Memories," 2004 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sasebo, Japan, pp. 179-184, June 30-July 2 2004.

[97] Kyung Rok Kim, Hyun Ho Kim, Jung-Im Huh, Dae Hwan Kim, Ki-Whan Song, Jong Duk Lee, and Byung-Gook Park, "Field Induced Band-to-Band Tunneling Effect Transistor - FIBTET with Negative-Differential Transconductance and Negative-Differential Conductance Characteristics,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 11-12, June 13-14, 2004.

[96] Byung Yong Choi, Woo Young Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "INverted-Sidewall and Partially-Etched Channel (INSPEC) MOSFET on Fully Depleted SOI Substrates,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 31-32, June 13-14, 2004.

[95] Junsoo Kim, Sangyeon Han, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "MOSFETs with Biased Spacer Having Work-function Different From the Gate,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 49-50, June 13-14, 2004.

[94] Woo Young Choi, Dong-Soo Woo, Byung Yong Choi, Jong Duk Lee, and Byung-Gook Park, "A Novel Biasing Scheme for the I-MOS (Impact-Ionization MOS),” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 61-62, June 13-14, 2004.

[93] Hyun Ho Kim, Kyung Rok Kim, Jung-Im Huh, Ki-Whan Song, Il-Han Park, Jong Duk Lee and Byung-Gook Park, "Room Temperature Characteristics in Single-Electron Transistors with a Quantum Dot Formed by Anisotropic TMAH Wet Etch,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 79-80, June 13-14, 2004.

[92] Jung Im Huh, Dae Hwan Kim, Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jong Duk Lee and Byung-Gook Park, "Coupled Parallel Quantum Dots in Silicon Single-Electron Transistors by the Three-Dimensional Field Effects," IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 83-84, June 13-14, 2004.

[91] Il Hwan Cho, Tai-su Park, Jeong Dong Choe, Hye Jin Cho, Dong Gun Park, Hyungcheol Shin, Byung-Gook Park, Jong Duk Lee, and Jong-Ho Lee, "Characteristics of P-channel Ω SONOS Flash Memory Device Based on Body-Tied Tri-Gate MOSFETs,” IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 153-154, June 13-14, 2004.

[90] Cheon An Lee, Sung Hun Jin, Keum Dong Jung, Jong Duk Lee, and Byung-Gook Park, "Full-Swing Pentacene Organic Thin-Film Transistor Inverter with Enhancement-Mode Driver and Depletion-Mode Load,” 62nd Annual Device Research Conference, pp. 181-182, Indiana, USA, June. 21-23, 2004.

[89] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "A New Fabrication Method for Self-aligned Nanoscale I-MOS (Impact-ionization MOS),” 62nd Annual Device Research Conference, pp. 211-212, Indiana, USA, June. 21-23, 2004.

[88] Byung Yong Choi, Yong-Kyu Lee, Woo Young Choi, Il Han Park, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Nano-scale MOSFETs with Programmable Virtual Source/Drain,” 62nd Annual Device Research Conference, pp. 213-214, Indiana, USA, June. 21-23, 2004.

[87] Kyung Rok Kim, Hyun Ho Kim, Ki-Whan Song, Jung Im Huh, Jong Duk Lee, and Byung-Gook Park, "SOI MOSFET-Based Quantum Tunneling Device - FIBTET,” 62nd Annual Device Research Conference, pp. 217-218, Indiana, USA, June. 21-23, 2004.

[86] [Invited]Byung-Gook Park, "Silicon Quantum Effect Devices - FIBTET and MOSET," The 6th International Symposium of Northeastern Asian NanoScience and Technology, Shanghai, P.R.China, pp. 60-61, May 7-9, 2004.

[85] Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Simulation of Single-Charging Effect in Nanocrystal Memories," IEEE Nanoscale Devices and System Integration, Miami, Florida, U.S.A, pp. 31, Feb. 15-19, 2004.

[84] [Invited]Byung-Gook Park, Dae Hwan Kim, Kyung Rok Kim, Ki-Whan Song, and Jong Duk Lee, "Single-Electron Transistors Fabricated with Sidewall Spacer Patterning," 6th International Conference on New Phenomena in Mesoscopic Structures 6 Surfaces and Interfaces in Mesoscopic Devices 4, pp.108-109, Hawaii, USA, Nov. 30-Dec. 5, 2003.

[83] Kyung Rok Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung Gook Park, "Silicon MOSFET-based Field-Induced Band-to-band Tunneling Effect Transistor - FIBTET," International Semiconductor Device Research Symposium, pp.522-523, Washington, USA, Dec. 10-12, 2003.

[82] Yong Kyu Lee, Jae Sung Sim, Suk Kang Sung, Tae Hoon Kim, Jong Duk Lee, and Byung-Gook Park, Sung Taeg Kang, Chilhee Chung, Donggun Park, and Kinam Kim, "Excellent 2-bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory (TSM) with a 90-nm Merged-Triple Gate," International Semiconductor Device Research Symposium, pp.489-490, Washington, USA, Dec. 10-12, 2003.

[81] Soo Doo Chae, Chang Ju Lee, Ju Hyung Kim, Suk Kang Sung, Jae Seong Sim, Moon Kyung Kim, Se Wook Yoon, Youn Seok Jeong, Won Il Ryu, Tae Hun Kim, Byung-Gook Park, Jo Won Lee and Chung Woo Kim, "70 nm SONOS Nonvolatile Memory Devices using FN Programming and Hot Hole Erase Method," Int'l Conf. on Solid State Devices and Materials 2003, pp.206-207, Tokyo, Japan, Sept. 16-18, 2003.

[80] Kyung Rok Kim, Ki-Whan Song, Gwanghyeon Baek, Hyun Ho Kim, Jung Im Huh, Jong Duk Lee, Byung Gook Park, "Analytical SPICE Modeling of Realistic MOS-based Single-Electron Transistors-"MOSETs" with a Unique Distirbution Function in the Coulomb Oscillation Region," Int'l Conf. on Solid State Devices and Materials 2003, pp.330-331, Tokyo, Japan, Sept. 16-18, 2003.

[79] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Myeong Won Lee, Jong Duk Lee, and Byung-Gook Park, "A New Stable Extraction of Threshold Voltage Using Regularization Method," Int'l Conf. on Solid State Devices and Materials 2003, pp.420-421, Tokyo, Japan, Sept. 16-18, 2003.

[78] Jae Sung Sim, Jihye Kong, Jong Duk Lee, Byung-Gook Park, "Monte-Carlo Simulation of Single-Electron Nanocrystal Memories," Int'l Conf. on Solid State Devices and Materials 2003, pp.850-851, Tokyo, Japan, Sept. 16-18, 2003.

[77] Ki-Whan Song, Gwanghyeon Baek, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Dong-Soo Woo, Jae Sung Sim, Jong Duk Lee, and Byung-Gook Park, "Realistic Single-Electron Transistor Modeling and Novel CMOS/SET Hybrid Circuits," 2003 Thrid IEEE Conference on Nanotechnology(IEEE-NANO 2003), pp.119-121, San Francisco, California, USA, August 12-14, 2003.

[76] Woo Young Choi, Jong Duk Lee, Byung-Gook Park, "Reverse-Order Source/Drain Formation with Double Offset Spacer (RODOS) for CMOS Low-power, High-Speed and Low-Noise Amplifiers," 2003 International Symposium on Low Power Electronics and Design (ISLPED 2003), pp.189-192, Seoul, Korea, August 25-27, 2003.

[75] Myeong Won Lee, In Man Kang, Byung Yong Choi, Dong-Soo Woo, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Juncion Leakage Characteristics of Shallow Trench Isolation (STI) with Nitrogen Pile-Up Sidewall Oxide," 2003 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, pp. 5-8, June 30-July 2 2003.

[74] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Reverse-Order Source/Drain with Double Offset Spacer (RODOS) for Sub-50nm Low-Power and High-Speed MOSFET Design," 2003 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Busan, Korea, pp. 51-54, June 30-July 2 2003.

[73] Cheon An Lee, Yong Jin Yoon, Sung Hun Jin, Jin Wook Kim, Hyuck In Kwon, Jong Duk Lee, and Byung-Gook Park, "A new driving circuit for the low power and reduced layout area in silicon based AM-OELDs," The 3rd International Meeting on Information Display, pp.11-14, Taegu, Korea, July 9-11, 2003.

[72] Sung Hun Jin, Jin Wook Kim, Cheon An Lee, Byung-Gook Park, and Jong Duk Lee, "Pentacene OTFTs with Al2O3 gate insulator by Atomic Layer Deposition Process," The 3rd International Meeting on Information Display, pp.15-18, Taegu, Korea, July 9-11, 2003.

[71] Cheon An Lee, Hyuck In Kwon, Sung Hun Jin, Chang Ju Lee, Myung Won Lee, Jae Woo Kyung, Il Whan Cho, Jong Duk Lee, and Byung-Gook Park, "High voltage MOSFET fabricated by using a standard CMOS logic process to drive the top emission OLEDs in silicon-based OELDs," The 3rd International Meeting on Information Display, pp.981-983, Taegu, Korea, July 9-11, 2003.

[70] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Sub-50nm MOSFET with Reverse-Order Source/Drain with Double Offset Spacer (RODOS)”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 22-23, June 8-9, 2003.

[69] Suk-Kang Sung, Chang Ju Lee, Yong Kyu Lee, Jong Duk Lee, and Byung-Gook Park, "Program/Erase Characteristics of Nanoscale SONOS Memory and Feasibility of Multi-Level Operation in Multi-Layer SONOS”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 58-59, June 8-9, 2003.

[68] Dong-Soo Woo, Byung Yong Choi, Woo Young Choi, Jong Duk Lee, and Byung-Gook Park, "Self-Aligned FinFET with Large Source/Drain Fan-Out Strucure”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 66-67, June 8-9, 2003.

[67] Kyung Rok Kim, Dae Hwan Kim, Ki-Whan Song, Sang-Hoon Lee, Jaewoo Kyung, Jong Duk Lee, and Byung-Gook Park, "Observation of Single-Electron Charging Effects Based on Band-to-band Tunneling in a MOS-based Single-Electron Transistor-"MOSET" ”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 72-73, June 8-9, 2003.

[66] Yong Kyu Lee, Tae Hun Kim, Sang Hoon Lee, Jong Duk Lee, and Byung-Gook Park, "Twin-Bit Silicon-Oxide-Nitride-Oxide-Silicon(SONOS) Memory by Inverted Sidewall Patterning (TSM-ISP)”, IEEE 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 92-93, June 8-9, 2003.

[65] Sung Hun Jin, Yong Kyu Lee, Cheon An Lee, Jin Wook Kim, Byung-Gook Park, and Jong Duk Lee, "A Nonvolatile Pentacene Organic Memory (PENTOM) with a Triple-layer Gate Insulator on a Flexible Substrate,” 61st Annual Device Research Conference, pp. 185-186, Salt Lake, Utah, USA, June. 23-25, 2003.

[64] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "Stable Extraction of Threshold Voltage Using Transconductance Change Method," 203rd ECS Meeting, Paris, France, pp. 27, April 27-May 2, 2003.

[63] Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, and Sang Sik Park, "Dark Current Characterization of the CMOS APS Imagers Fabricated Using a 0.18 um CMOS Technology," 2003 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, Elmau, Germany, pp. 0-0, May 15-17, 2003.

[62] Ki-Whan Song, Sang Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, and Byung-Gook Park, "Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic," 33rd International Symposium on Multiple-Valued Logic, Tokyo, Japan, pp.267-272, May 16-19, 2003.

[61] Woo Young Choi, Byung Yong Choi, Dong-Soo Woo, Jong Duk Lee, and Byung-Gook Park, "A New Linearity Measurement Algorithm for Sub-Micron Microwave CMOS," 20th IEEE Instrumentation and Measurement Technology Conference, Vail Colorado, USA, pp. 374-376, May 20-22, 2003.

[60] Chang Ju Lee, Suk-Kang Sung, Yong Kyu Lee, Kyung Rok Kim, Jae Seong Sim, Tae Hun Kim, Ji Hye Kong, Jong Duk Lee, and Byung-Gook Park, Soo doo Chae, and Chung woo Kim, "70-nm-long and 30-nm-wide Channel SONOS Memory Fabricated on an SOI Wafer," IEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, U.S.A, pp. 69-70, Feb. 16-20, 2003.

[59] Jong Duk Lee, Woo Young Choi, Byung Yong Choi, Young Jin Choi, Dong-Soo Woo, and Byung-Gook Park, "30 nm MOSFET Development Based on Processes for Nanotechnology," 2002 IEEE International Conference on Semiconductor Electronics (ICSE2002), pp. 251-254, Penang, Malaysia, Dec. 19-21, 2002.

[58] Jae Sung Sim, Yong Kyu Lee, Jong Duk Lee, and Byung-Gook Park, "Observation of the Lateral Redistribution of Locally Trapped Charge in SONOS Memory Cells," International Semiconductor Technology Conference 2002, Abstract No. 41, Tokyo, Japan, September 12-14, 2002.

[57] Jong Duk Lee, Chang woo Oh, Jae Woo Park, and Byung Gook Park, "Thermal Effects of Single Silicon Tip Emitters with Various Tip Radii," The 2nd International Meeting on Information Display, pp.681-684, Taegu, Korea, August 21-23, 2002.

[56] Jong Duk Lee, Byung Chang Shim, Byung Gook Park, "Vacuum Dependency of Si, Co Silicide and Mo Silicide FEAs," The 2nd International Meeting on Information Display, pp.685-688, Taegu, Korea, August 21-23, 2002.

[55] Sang Jik Kwon, Euo Sik Cho, Byung-Gook Park, and Jong Duk Lee, "Characteristics of Phosphorus Implanted Mold type Diamond FEAs," Joint International Plasma Symposium of 6th APCPST, 15th SPSM, OS 2002 & 11th KAPRA, Jeju Island, Korea, pp. 412, July 2002.

[54] Yong Jin Yoon, Jong Duk Lee, Byung Gook Park, Nam Seog Kim, Uk Rae Cho and Hyun Gun Byun, "Synchronous Mirror Delay for Multi-phase Locking," 2002 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, Sapporo, Japan, pp. 33-36, July 2002.

[53] Jong-Ho Lee, Sung-In Hong, Jong Duk Lee, and Byung-Gook Park, "Recessed Double-Gate MOSFETs for sub-30 nm CMOS Technology," IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 7-8, June 9-10, 2002.

[52] Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook Park, "Single-Electron Transisters Based on Gate-Induced Si Island for Single-Electron Logic Application,” IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 57-58, June 9-10, 2002.

[51] Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Negative Differential Conductance Characteristics in 30-nm Square Channel Silicon-On-Insulator n-MOSFETs”, IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 9-10, June 9-10, 2002.

[50] Young Jin Choi, Byung Yong Choi, Dong-Soo Woo, Kyung Rok Kim, Woo Young Choi, Cheon Ahn Lee, Jong Duk Lee, and Byung-Gook Park, "A New Side-gate nMOSFET with 50nm Gate Length,” IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 13-14, June 9-10, 2002.

[49] Sang Hoon Lee, Dae Hwan Kim, Kyung-Rok Kim, Jong Duk Lee, and Byung-Gook Park, "A Practival SPICE Model Based on Realistic Single-Electron Transisor,” IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 77-78, June 9-10, 2002.

[48] Jae Sung Sim, Suk Kang Sung, Dong-Hyuk Chae, Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Programming Characteristics of Single Quantum Dot and Nanocrystal Memories,” IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 65-66, June 9-10, 2002.

[47] Dong-Soo Woo, Jong-Ho Lee, Woo Young Choi, Byung-Yong Choi, Young-Jin Choi, Jong Duk Lee and Byung-Gook Park, "Electrical Characteristics of of FinFET with Vertically Non-Uniform S/D Doping Profile,” IEEE 2002 Silicon Nanoelectronics Workshop, Honolulu, Hawaii, U.S.A, pp. 23-24, June 9-10, 2002.

[46] Yong Kyu Lee, Suk Kang Sung, Jae Seong Sim, Chang Ju Lee, Tae Hun Kim, Sang Hun Lee, Jong Duk Lee, Byung Gook Park, Dong Hun Lee and Young Wuk Kim, "Multi-Level Vertical Channel SONOS Nonvolatile Memory on SOI," 2002 Symposium on VLSI Technology, Honolulu, Hawaii, U.S.A, pp. 208-209, June 11-13, 2002.

[45] Dae Hwan Kim, Suk-Kang Sung, Kyung Rok Kim, Bum Ho Choi, Sung Woo Hwang, Doyeol Ahn, Jong Duk Lee, and Byung-Gook Park, "Si Single-Electron Transistors with Sidewall Depletion Gates and their Application to Dynamic Single-Electron Transistor Logic”, International Electron Devices Meeting, Washington DC, U.S.A., pp. 151-154, Dec. 2~5, 2001.

[44] Jong Duk Lee, Chang Woo Oh, and Byung-Gook Park, "Electrical Aging of Molybdenum Field Emitter," 14th International Vacuum Microelectronics Conference 2001, pp.109-110, August 12-16, 2001.

[43] Jong Duk Lee, Il Hwan Kim, Chang Woo Oh, Jae Woo Park, and Byung-Gook Park, "MOSFET-Controlled Field Emission Display(MCFED)," 14th International Vacuum Microelectronics Conference 2001, pp.189-190, August 12-16, 2001.

[42] Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Characteristics of phosphorus implanted MPCVD diamond films,"14th International Vacuum Microelectronics Conference 2001, pp.281-282, August 12-16, 2001.

[41] Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Properties of phosphorus implanted mold type diamond FEAs," 14th International Vacuum Microelectronics Conference 2001, pp.203-204, August 12-16, 2001.

[40] Jong Duk Lee, Hyuck In Kwon, Jung Hyun Nam, Byung Chang Shim, and Byung Gook Park, "Design of One-Chip FED on a Standard CMOS Process," SID 2th Microdisplay Conference 2001, pp.83-86, Wesminster, Colorado, USA, August 13-15, 2001.

[39] Jong Duk Lee, Euo Sik Cho, Byung-Gook Park, and Sang Jik Kwon, "Field Emission Properties of Phosphorus doped Diamond Films by Various Ion Implantation Conditions," The 1st International Meeting on Information Display, pp.589-592, Taegu, Korea, August 29-31, 2001.

[38] Jong Duk Lee, Hyuck In Kwon, Jung Hyun Nam, Byung Chang Shim, and Byung-Gook Park, "Design of One-Chip FED System based on a Standard CMOS Process," The 1st International Meeting on Information Display, pp.543-546, Taegu, Korea, August 29-31, 2001.

[37] Cheon An Lee, Jong Duk Lee, and Byung-Gook Park, "Design of a CMOS On-chip Driver Circuit for Active Matrix Polymer Electroluminescent Displays," The 1st International Meeting on Information Display, pp.330-333, Taegu, Korea, August 29-31, 2001.

[36] Jong Duk Lee, Chang Woo Oh, Jae Woo Park, Byung Gook Park, and Il Hwan Kim, "Evaluation of MOSFET-Controlled Field Emission Display (MCFED) in a High Vacuum Chamber," The 1st International Meeting on Information Display, pp.179-182, Taegu, Korea, August 29-31, 2001.

[35] Byung Yong Choi, Woo Young Choi, Young Jin Choi, Jong Duk Lee, and Byung-Gook park, "Side-gate Length Optimization for 50nm Induced Source/Drain MOSFETs,” 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 49-54, Cheju, Korea, July 4-7, 2001.

[34] Woo Young Choi, Suk Kang Sung, Kyung Rok Kim, Jong Duk Lee, and Byung-Gook park, "Nanoscale Poly-Si Line Formation and Its Uniformity,” 2001 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp. 11-16, Cheju, Korea, July 4-7, 2001.

[33] Kyung Rok Kim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook park, “Single Electron Transistors Based on Silicon-On-Insulator Wire Patterened by Sidewall Masking Technology and Electrically Induced Tunnel Barriers,” 2001 Silicon Nanoelectronics Workshop, pp. 42-43, Kyoto, Japan, Jun. 10-11, 2001.

[32] Suk Kang Sung, Jae Sung Sim, Dae Hwan Kim, Jong Duk Lee, Byung-Gook park, “Nano-scale Patterning Based on Conventional VLSI Technology and Its Application to a Si Self-Aligned Quantum Dot Memory,” 2001 Silicon Nanoelectronics Workshop, pp. 20-21, Kyoto, Japan, Jun. 10-11, 2001.

[31] Dae Hwan Kim, Jong Duk Lee , Byung Gook Park , Beom Ho Choi, and Sung Woo Hwang , "Single electron transistors based on silicon-on-insulator quantum wire", Seoul International Symposium on Physics of Semiconductors and Applications, pp. 63-64, November 2000.

[30] Sung Hun Jin, Byung Chang Shim, Byung Gook Park, and Jong Duk Lee, "A Novel Process to Form Cobalt Silicide on Single Crystal Silicon Field Emitter Arrays by Electrical Stress", International Vacuum Microelectronics Conference 2000, pp.238-239 ,August 14-17, 2000.

[29] Byung Yong Choi, Suk Kang Sung, Byung Gook Park and Jong Duk Lee, "70nm NMOSFET Fabrication with 12nm n+-p Junctions Using As2+ A Low Energy Ion Implantations", Int'l Conf. on Solid State Devices and Materials 2000, pp.50-51, Sendai, Japan, August 29-31, 2000.

[28] Jong Duk Lee, Chang Woo Oh, Sang Jik Kwon, and Byung Gook Park, "MOSFET-Controlled Single Tip Emitter", IVESC 2000 Technical Digest, H-3, July 10-13,2000

[27] Jong Duk Lee, Byung Chang Shim, Sung Hun Jin and Byung-Gook Park " Mo and Co Silicide FEAs ," MRS spring meeting, pp.R4.1.1- R4.1.9, April, 2000.

[26] Jong Duk Lee, Byung Chang Shim and Byung Gook Park, "A Mo-silicidized a-Si FEA," Proceedings of The Sixth International Display Workshops, Sendai, Japan, pp. 935~938, Dec. 1~3, 1999.

[25] Byung Chang Shim, Byung Gook Park, and Jong Duk Lee, "Co-Silicide Formation on Silicon FEAs from Co, Co/Ti and Ti/Co Layers," International Electron Devices Meeding 1999, Washington, D.C., U.S.A., pp. 709~712, Dec. 5~8, 1999.

[24] Jae Sung Sim, In Ho Nam, Sung In Hong, Jong Duk Lee, and Byung Gook Park, "A Study on Soft- and Hard- Breakdowns in MOS Capacitors Using the Parallel Stressing Method," Int'l Conf. on VLSI and CAD, Seoul, Korea, p. 194~196, Oct., 26~27, 1999.

[23] Dae Hwan Kim, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Coulomb Oscillation of a Single Electron Switch with an Electrically Formed Quantum Dot and its Modeling," Int'l Conf. on Solid State Devices and Materials, pp. 234~235, Tokyo, Japan, Sept., 1999.

[22] Byung Gook Park, Dong Hyuk Chae, Dae Hwan Kim, and Jong Duk Lee, "Room Temperature Silicon Single Electron Memory and Switch," Proceedings of the 3rd Korea-China Joint Workshop on Advanced Materials, pp. 194-200, Cheju, Korea, August 23-27, 1999.

[21] Jong Duk Lee, Byung Chang Shim, Byung Gook Park, "Molybdenum-Silicide Application on Gated Single Crystal and Amorphous Silicon Field Emitter Arrays," IVMC, pp. 414~415, Darmatadt, Germany, July 6~9, 1999.

[20] Dong Hyuk Chae, Tae Sik Yoon, Dae Hwan Kim, Jang Yeon Kwon, Ki Bum Kim, Jong Duk Lee, Byung Gook Park, "Programming Dynamics of a single Electron memory Cell with a High-Density SiGe Nanocrystal Array at Room Temperature," Device Research Conference, pp140-141, June, 1999

[19] Dae Hwan Kim, Dong-Hyuk Chae, Jong Duk Lee, and Byung-Gook Park, "Room Temperature Operation of a Single Electron Switch with an Electrically Formed Quantum Dot," the 57th Device Research Conference, California, U.S.A., p. 134~135, June., 28~30, 1999.

[18] Jong Duk Lee, Byung Chang Shim, Hyung Soo Uh and Byung-Gook Park, "Characterization of Si Field Emitters Based on Single Crystal, Polycrystalline and Amorphous Silicon Substrate," The 18th International Display Research Conference, pp.141-144, Seoul, Korea, Sep. 28 - Oct. 1, 1998.

[17] Dae Hwan Kim, Jong Duk Lee, Byung Gook Park, and Hyung Gyoo Lee, "Silicon Single Electron Switch with an Electrically Formed Qunatum Dot," 56th Annual Device Research Conference, Charlottesville, Virginia, June 22-24, 1998.

[16] Hyung Soo Uh, Byung Gook Park and Jong Duk Lee, "Enhanced Electron Emission and Its Stability from Gated Mo-Polycide Field Emitters," IEDM 1997 Technical Digest, pp.713-716, Washington D.C., Dec. 7-10, 1997.

[15] Hyung Soo Uh, Sung Ho Jo, Jung Hyun Nam, Hyung Soon Nam, Sang Jik Kwon, Jae Soo Yoo, Byung Gook Park, and Jong Duk Lee, "A Cathodoluminescent Flat Panel Display Based on Polycrystalline Silicon Field Emitters," International Display Research Conference, pp.322-325, Toronto, Canada, Sep. 15-19, 1997.

[14] Jeongho Lyu, Young Jin Choi, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "Lateral Channel Doping Engineering in 0.1um Recessed Channel nMOSFETs," 27th European Solid-State Device Research Conference, pp. 236-239, Stuttgart, Germany, Sep. 22-24, 1997.

[13] Chun Gyoo Lee, Byung Gook Park, and Jong Duk Lee, "Calculation of Emission Current Density in Cone-Type Field Emitter with Non-Triangular Potential Barrier," 10th International Vacuum Microelectronics Conference, pp.315-320, Kyongju, Korea, August 17-21, 1997.

[12] Hyung Soo Uh, Byung Gook Park and Jong Duk Lee, "Formation of Mo Silicide on Poly-Si Field Emitters for Improved Emission Stability," 10th International Vacuum Microelectronics Conference, pp.371-375, Kyongju, Korea, August 17-21, 1997.

[11] Chang Woo Oh, Chun Gyoo Lee, Jong Ho Lee, Byung Gook Park, and Jong Duk Lee, "Novel Metal Field Emitter Structure for Low Voltage Operation," 10th International Vacuum Microelectronics Conference, pp.426-430, Kyongju, Korea, August 17-21, 1997.

[10] Young Jin Choi, Byung-Gook Park and Jong Duk Lee, "A 0.1 um IHLATI(Indium Halo by Large Angle Tilt Implant) nMOSFET for 1.0 V Low Power Application," 55th Annual Device Research Conference Digest, pp16-17, Colorado State Univ., U.S.A., Jun. 23-25, 1997.

[9] Jeongho Lyu, Young Jin Choi, Yeong Taek Lee, Byung-Gook Park, Kukjin Chun, Jong Duk Lee, "Characteristics of 0.1mm Si MOSFET with ISRC(Inverted-Sidewall Recessed-Channel) Structure for Reduced Short Channel Effect," Conference on Optoelectronic Materials and Devices, pp. 204-210, Dec. 1996.

[8] Jong Tae Park, Sung Jun Jang, Chong Gun Yu, Byung Gook Park, Jong Duk Lee, "New experimental findings on hot carrier effects in deep submicrometer surface channel PMOS," Proceedings of the 7th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, pp. 1659-1662, Oct. 8-11, 1996.

[7] Yeong-Taek Lee, Ki-Whan Song, Byung-Gook Park, and Jong Duk Lee, "Channel Doping Engineering with Indium as an Alternative p-Type Dopant," Proc. of 1996 Int'l Conf. on Solid State Devices and Materials, Yokohama, Japan, pp. 127-129, Aug. 26-29, 1996.

[6] Chun Gyoo Lee, Byung Gook Park, and Jong Duk Lee, "A New Fabrication Process of Volcano-Shaped Field Emitters for Large-Area Display Applications," 9th International Vacuum Microelectronics Conference, pp.384-387, St. Petersburg, Russia, July 7-12, 1996.

[5] Il Hwan Kim, Chun Gyoo Lee, Byung Gook Park, Jong Duk Lee, and Joha Hyun Won, "Metal FEAs on Double Layer Structure of Polycrystalline Silicon," 9th International Vacuum Microelectronics Conference, pp.423-426, St. Petersburg, Russia, July 7-12, 1996.

[4] Yeon-Cheol Heo, Byung Gook Park, and Jong Duk Lee, "Application of Ultra-Thin Rapid Thermal Oxide to 0.15 um NMOSFET," Proceedings of International Workshop on Advanced LSI's, pp.51-56, Korea, July 18-20, 1996.

[3] Yeon-Cheol Heo, Byung Gook Park, and Jong Duk Lee, "The Effect of Guard Line on Plasma Damage," Proceedings of 1st International Symposium on Plasma Process-Induced Damage, pp.94-97, May 13-14, Santa Clara, CA, 1996.

[2] Jeongho Lyu, Byung-Gook Park, Kukjin Chun, and Jong Duk Lee, "A 0.1um Inverted-Sidewall Recessed-Channel(ISRC) nMOSFET for High Performance and Reliability," IEDM Technical Digest, pp.17.5.1-17.5.4, Washington D.C. Dec. 10-13, 1995.

[1] Sang Jik Kwon, Byung Gook Park, and Jong Duk Lee, "Ultra Shallow p+n Junction Formation Using the Solid Phase Diffusion(SPD) through 'a-Si/Thin Barrier Oxide' Layer," Proc. of 1995 Int'l Conf. on Solid State Devices and Materials, Osaka, Japan, pp.354-356, August, 1995.

Domestic

[436] Bosung Jeon, Seunghwan Song, Taejin Jang, and Byung-Gook Park, "Compression of Spiking Neural Network with Structured Pruning Technique," 하계종합학술대회, Jun. 2022

[435] Changha Kim, Hyun-Min Kim, Daewoong Kwon, and Byung-Gook Park, "Gate last process Ferroelectric-Metal Field-Effect Transistro," 하계종합학술대회, Jun. 2022

[434] 김현민, 김창하, 김시현, 이기태, 권대웅, 박병국, "Ni Silicidation과 HPA를 이용한 낮은 열 예산의 HfZrO 절연막을 갖는 MOSFET의 구현," 하계종합학술대회, Jun. 2022

[433] Jonghyuk Park, Kyungchul Park, Bosung Jeon, and Byung-Gook Park, "Spike Duration Adjustable Neuron Circuit for Stable Synaptic Operation," Korean Conference on Semicondutor, Feb. 2022

[432] Taejin Jang, Bosung Jeon, Kyungchul Park, and Byung-Gook Park, "Analysis of Bit-Error in Spiking Neural Networks According to Retention Characteristics," Korean Conference on Semiconductors, Feb. 2022

[431] Donghyun Ryu, Junsu Yu, and Byung-Gook Park, "Floating Gate based Synaptic Device using Back Tunneling Mechanism," Korean Conference on Semiconductors, Feb. 2022

[430] Yeonwoo Kim, Kyung Kyu Min, Junsu Yu, Dae Woong Kwon, and Byung-Gook Park, "A Solution for Polarization-Leakage Relationship of Pure-HfO2 Based Laminated Metal-Ferroelectric-Insulator-Semiconductor Stack," Nanokorea, Jul. 2021

[429] Kyungho Hong, Sungjoon Kim, and Byung-Gook Park, "Analysis on self-compliance and gradual reset characteristics of RRAM with oxygen scavenging layer," Nanokorea, Jul. 2021

[428] 김창하, 이기태, 김시현, 김현민, 권대웅, 박병국, "강유전체 면적 조절이 가능한 Ferroelectric-Gate Fin Field-Effect Transistor," 하계종합학술대회, Jun. 2021

[427] Junsu Yu, Kyung Kyu Min, Yeonwoo Kim, Daewoong Kwon, Byung-Gook Park, "Effect of Bottom Electrode Doping on Metal-Ferroelectric-Insulator-Semiconductor (MFIS) Ferroelectric Tunnel Junction (FTJ)," 하계종합학술대회, Jun. 2021

[426] Bosung Jeon, Seunghwan Song, Taejin Jang, and Byung-Gook Park, "Impact of Leakage Current of Synapse Array on Spiking Neural Networks," Korean Conference on Semiconductors, Feb. 2021

[425] Jonghyuk Park, Taejin Jang, Sungmin Hwang, Bosung Jeon and Byung-Gook Park, "Analysis of Line Resistance Effect of Neuromorphic System," Korean Conference on Semiconductors, Feb. 2021

[424] Yeon-Joon Choi, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Kyungho Hong, Sungjun Kim, and Byung-Gook Park, "Effect of the Thickness of Ag-Inserted Layer on the Mechanism of TiN/Ag/SiNx/TiN RRAM," Korean Conference on Semiconductors, Feb. 2021

[423] Youngsan Cha, Kyungchul Park, and Byung-Gook Park, "Neuron Circuit with Capacitive Transimpedance Amplifier Integrator for Improving Output Linearity in Spiking Neural Networks," Korean Conference on Semiconductors, Feb. 2021

[422] Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Kyung Kyu Min, Sungjoon Kim, Yeon-Joon Choi, Kyungho Hong, and Byung-Gook Park, "Investigation of current sum error in the spiking neural network of RRAM synapse array," Korean Conference on Semiconductors, Feb. 2021

[421] Dong-Oh Kim, Kitae Lee, Changha Kim, Sihyun Kim, Hyun-Min Kim, Daewoong Kwon, and Byung-Gook Park, "Suppression of Reverse Drain Induced Barrier Lowering in Negative Capacitance Field-Effect Transistor using Hetero-Dielectric Structure," Korean Conference on Semiconductors, Feb. 2021

[420] 김연우, 황성민, 박병국, "Ni/SiNx/n+-Si RRAM을 시냅스 소자로 사용한 뉴런 회로의 시냅스 전류 합산 성능 개선," 추계종합학술대회, Nov. 2020

[419] 송승환, 유준수, 류동현, 장태진, 황성민, 박병국, "시뮬레이션을 통한 TFET Synapse 소자의 Gate Overlap/Underlap과 채널 두께에 따른 특성변화 연구," 하계종합학술대회, Aug. 2020

[418] 박경철, 박병국, "정확한 막전위 방전을 위한 구형파 출력을 갖는 뉴런 회로," 하계종합학술대회, Aug. 2020

[417] Kyu-Ho Lee, Dongseok Kwon, Byung-Gook Park, and Jong-Ho Lee "Operation Condition of NAND Flash Memory Cells as Synaptic Devices," 하계종합학술대회, Aug. 2020

[416] Jinwoo Park, Gyuweon Jung, Seongbin Hong, Yujeong Jeong, Wonjun Shin, Donghee Kim, Byung-Gook Park, Jong-Ho Lee "NO2 Gas Sensing Properties in FET-type Gas Sensor having Horizontal Floating-Gate," 하계종합학술대회, Aug. 2020

[415] Donghee Kim, Wonjun Shin, Seongbin Hong, Yujeong Jeong, Gyuweon Jung, Jinwoo Park, Dongkyu Jang, Byung-Gook Park, Jong-Ho Lee "Effect of bias condition on the gas response in resistor- and FET-type gas sensors," 하계종합학술대회, Aug. 2020

[414] Young Suh Song, Jang Hyun Kim, Sangwan Kim, Garam Kim, Hyun-Min Kim, Hyunwoo Kim, and Byung-Gook Park, "Improvement of gate-induced drain leakage current in gate-all-around MOSFET with self-heating effect," Nano Korea, Jul. 2020

[413] Changha Kim, Junil Lee, Ryoongbin Lee, Kitae Lee, Sihyun Kim, Sangwan Kim, and Byung-Gook Park, "Simulation Study on Ambipolar Current Suppression Using Different Annealing Conditions in Tunnel Field-Effect Transistor," Nano Korea, Jul. 2020

[412] Taejin Jang, Suhyeon Kim, Sungmin Hwang, Jeesoo Chang, Kyung Kyu Min, Kyungchul Park, and Byung-Gook Park, "3D Stackable AND-type Array Structure for Synapse Array," Nano Korea, Jul. 2020

[411] Kyoung Yeon Kim and Byung-gook Park, "Deterministic Wigner Equation Solver based on Spherical Harmonics Expansion," Korean Conference on Semiconductors, Feb. 2020

[410] Donghyun Ryu, Munhyeon Kim, and Byung-Gook Park, "Investigation of the High-k Gate Dielectric Sidewall Effect in Gate-all-around Structure," Korean Conference on Semiconductors, Feb. 2020

[409] Kitae Lee, Sihyun Kim, Munhyeon Kim, and Byung-Gook Park, "Tunneling-based Ternary CMOS with Ferroelectric Gate Dielectric," Korean Conference on Semiconductors, Feb. 2020

[408] Sihyun Kim, Kitae Lee, Munhyeon Kim, and Byung-Gook Park, "Stacked-gate-all-around Structured Tunneling-based Ternary CMOS," Korean Conference on Semiconductors, Feb. 2020

[407] Junsu Yu, Myung-Hyun Baek, Kyung Kyu Min, Kyungchul Park, Young Suh Song, and Byung-Gook Park, "Investigation on Extremely-thin-body Polysilicon-based Synaptic Transistor," Korean Conference on Semiconductors, Feb. 2020

[406] Jonghyuk Park, Myung-Hyun Baek, Suhyeon Kim, Young Suh Song, and Byung-Gook Park, "Novel NOR Type Synapse Array Using Additional N-well for Weight Update Method," Korean Conference on Semiconductors, Feb. 2020

[405] Yeonwoo Kim, Chae Soo Kim, Myung-Hyun Baek, and Byung-Gook Park, "Improved Neuron Circuit Using Ni/SiNx/n+-Si RRAM as Synaptic Devices," Korean Conference on Semiconductors, Feb. 2020

[404] Kyungho Hong, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Kyung Kyu Min, Yeon Joon Choi, Chae Soo Kim, and Byung-Gook Park, "Effect of Post Annealing Process on SiNx-based RRAM Operation," Korean Conference on Semiconductors, Feb. 2020

[403] Yeon-Joon Choi, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Chae Soo Kim, Kyungho Hong, Seongjae Cho, and Byung-Gook Park, "Investigation into the Effects of Ag Insertion Layer in TiN/SiNx/TiN ReRAM through Monte Carlo Simulation," Korean Conference on Semiconductors, Feb. 2020

[402] Changha Kim, Kitae Lee, Junil Lee, Ryoongbin Lee, Sihyun Kim, Hyun-min Kim, Sangwan Kim, and Byung-Gook Park, "Switching Characteristics Analysis of Tunnel Field-effect Transistor with Elevated Drain by Changing Drain Underlap Length," Korean Conference on Semiconductors, Feb. 2020

[401] Bosung Jeon, Sungmin Hwang, Kyungchul Park, Jong-Ho Lee, and Byung-Gook Park, "Non-linearity Effect of Current Mirror due to High Fan-in on Spiking Neural Network," Korean Conference on Semiconductors, Feb. 2020

[400] Jangsaeng Kim, Sung Yun Woo, Won-Mook Kang, Byung-Gook Park, and Jong-Ho Lee "Implementation of Homeostasis Functionality Using Active Leaky Path of Membrane Potential in STDP-based Spiking Neural Network," Korean Conference on Semiconductors, Feb. 2020

[399] Sung-Tae Lee, Byung-Gook Park, and Jong-Ho Lee "Hardware-Based Neural Networks Using Multiple NAND Flash Cells for a Synaptic Device," Korean Conference on Semiconductors, Feb. 2020

[398] Sung Yun Woo, Won-Mook Kang, Nagyong Choi, Young-Tak Seo, Soochang Lee, Seongbin Oh, Jangsaeng Kin, Byung-Gook Park, and Jong-Ho Lee "Analysis of Split-Gate Positive Feedback Device for Neuron Circuit at Variable Temperatures," Korean Conference on Semiconductors, Feb. 2020

[397] Hyeongsu Kim, Sung-Tae Lee, Dongseok Kown, Byung-Gook Park, and Jong-Ho Lee "Classification methods using additional output neurons to increase inference accuracy in hardware-based binarized neural network," Korean Conference on Semiconductors, Feb. 2020

[396] Kyungho Hong, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Kyungkyu Min, Dong Keun Lee, Yeon-Joon Choi, Chae Soo Kim, Sungjun Kim, and Byung-Gook Park, "Thermal Recovery from Reset Breakdown in SiNx-based RRAM," Nano Korea, Jul. 2019

[395] Taejin Jang, Myung-Hyun Baek, Sungmin Hwang, Kyungchul Park and Byung-Gook Park, "Analysis of Hot Carrier Injection with Schottky Barrier MOSFET for Synaptic Device," Nano Korea, Jul. 2019

[394] Jeesoo Chang, Min-Hye Oh, and Byung-Gook Park, "A Systematic Model Card Generation for Instantaneous Feedback in Early Technology Development utilizing Hooke-Jeeves Pattern Search Method," Nano Korea, Jul. 2019

[393] Myung-Hyun Baek, Taejin Jang, Sungmin Hwang, and Byung-Gook Park, "Multi-level weight modulation of double gate synaptic transistor," Nano Korea, Jul. 2019

[392] Kyungchul Park, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, and Byung-Gook Park, "Optimization of dual gate feedback field-effect transistor for stable and predictable operation in low power systems," Nano Korea, Jul. 2019

[391] Hyun Min Kim, Junil Lee, Yunho Choi, and Byung Gook Park, "A Simulation Study on Reduction of Grain Boundary Position Dependency in Tunneling Thin Film Transistors Using Pocket Doping," Nano Korea, Jul. 2019

[390] Suhyeon Kim, Junil Lee, Myung Hyun Baek, Sihyun Kim, Ryoongbin Lee, Hyun Min Kim, Kitae Lee, and Byung-Gook Park, "An Analysis of Capacitance and Resistance in Stacked Gate All Around Nano Sheet MOSFET for Compact Modeling," Nano Korea, Jul. 2019

[389] Sung-Tae Lee, Suhwan Lim, Jong-Ho Bae, Dongseok Kwon, Hyeog-Su Kim, Byung-Gook Park, and Jong-Ho Lee, "Pruning for hardware-based deep spiking neural network using gated schottky diode as synaptic devices," Nano Korea, Jul. 2019

[388] Sungmin Hwang, Jeesoo Chang, Hyungjin Kim, and Byung-Gook Park, "A Scheme for Weight Transfer Using Quantization in Hardware Spiking Neural Network," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2019

[387] Kyung Kyu Min, Kyungho Hong, Chae Soo Kim, Yeon-Joon Choi, Tae-Hyeon Kim, Suhyun Bang, Dong Keun Lee, Min-Hwi Kim, Sungjun Kim, and Byung-Gook Park, "Characterization of CMOS Compatible HfOx RRAM on Metal-Insulator-Semiconductor (MIS) Stacks," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2019

[386] Jae Yoon Lee, Min-Hwi Kim, Youngmin Kim, Seoyeon Go, Tae Jung Ha, Soo Gil Kim, Seongjae Cho, and Byung-Gook Park, "A Realistic Modeling of ReRAM Array and Analysis on RC Delay Effects," Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Jul. 2019

[385] Kitae Lee, Sihyun Kim, Munhyeon Kim, Sangwan Kim, and Byung-Gook Park, "Analysis on Capacitance Characteristics in FE-GAA MOSFET," 하계종합학술대회, Jun. 2019

[384] Junsu Yu, Sihyun Kim, Myung-Hyun Baek, Kyung Kyu Min, Taejin Jang, Young Suh Song, and Byung-Gook Park, "Investigation of Ambipolar Current Suppression Using Dual Work Function Metal Gate in L-Shaped Tunnel Field Effect Transistor," 하계종합학술대회, Jun. 2019

[383] Tae-Hyeon Kim, and Byung-Gook Park, "TiOx 기반 저항 변화 메모리의 상부 전극에 따른 정류 특성 연구," 하계종합학술대회, Jun. 2019

[382] Changha Kim, Kitae Lee, Junil Lee, Ryoongbin Lee, and Byung-Gook Park, "Analysis on Characteristics of Tunnel Field Effect Transistor with Elevated Drain by Changing Drain Underlap Length," 하계종합학술대회, Jun. 2019

[381] Yeonwoo Kim, Taehyung Kim, Myung-Hyun Baek, Taejin Jang, Young Suh Song, Bosung Jeon, and Byung-Gook Park, "An Area Efficient Adaptive Neuron Circuit Exploiting Tunnel Field-Effect Transistor," 하계종합학술대회, Jun. 2019

[380] Sihyun Kim, Junil Lee, Junsu Yu, Kitae Lee, Munhyeon Kim, Sangwan Kim, and Byung-Gook Park, "Suppression of Ambipolar Current Using Sidewall Spacer in L-Shaped Tunnel Field Effect Transistor," 하계종합학술대회, Jun. 2019

[379] Munhyeon Kim, Sihyun Kim, Kitae Lee, Soyoun Kim, Junil Lee, Hyun-Min Kim, Ryoongbin Lee, Sangwan Kim and Byung-Gook Park, "Effective Work Function Modulation using Dipole Mechanism with Al2O3 on HfO2 Atomic Layer Deposition," 한국반도체학술대회, Feb. 2019

[378] Junil Lee, Ryoongbin Lee, Sihyun Kim, Hyun-Min Kim, Kitae Lee, Soyoun Kim, Munhyeon Kim, Yunho Choi, Sangwan Kim and Byung-Gook Park, "Demonstration of Ge Condensed SiGe channel Tunnel FETs and Co-integration with CMOS," 한국반도체학술대회, Feb. 2019

[377] Ryoongbin Lee, Junil Lee, Kitae Lee, Soyoun Kim, Sihyun Kim, Sangwan Kim and Byung-Gook Park, "Proposal of I-shaped SiGe Fin Tunnel Field-effect Transistor," 한국반도체학술대회, Feb. 2019

[376] Young Suh Song, Taehyung Kim, Kyung Kyu Min, Sungmin Hwang, Yunho Choi and Byung-Gook Park, "Investigation of Omega-Shaped-Gate nanowire FETs," 한국반도체학술대회, Feb. 2019

[375] Chae Soo Kim, Suhyun Bang, Tae-Hyeon Kim, Kyungkyu Min, Min-Hwi Kim, Dong Keun Lee, Yeon-Joon Choi, Kyungho Hong, Sungjun Kim and Byung-Gook Park, "Design and Switching Characteristics Analysis of 3D Vertical W/SiNx/n+-Si/p-Si 1D1R unipolar RRAM," 한국반도체학술대회, Feb. 2019

[374] Yunho Choi, Kitae Lee, Kyoung Yeon Kim, Sihyun Kim, Junil Lee, Ryoongbin Lee, Hyun-Min Kim, Young Suh Song, Sangwan Kim and Byung-Gook Park, "Simulation Study on the Effect of Parastic Channel Height on Characteristics of Stacked Gate-All-Around Nanosheet FET," 한국반도체학술대회, Feb. 2019

[373] Taehyung Kim, Kyungchul Park, Taejin Jang, Sungmin Hwang, Myung-Hyun Baek, Young Suh Song and Byung-Gook Park, "Design and Simulation of Variable Threshold Inverter using Floating-Gate MOSFET with Independent Double Control-Gate," 한국반도체학술대회, Feb. 2019

[372] Tae-Hyeon Kim, Min-Hwi Kim, Suhyun Bang, Dong Keun Lee and Byung-Gook Park, "Effects of pulse amplitude on conductance change of TiOx-based synaptic devices," 한국반도체학술대회, Feb. 2019

[371] Won-Mook Kang, Chul-Heung Kim, Soochang Lee, Sung Yun Woo, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, "A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices," 한국반도체학술대회, Feb. 2019

[370] Jangsaeng Kim, Chul-Heung Kim, Sung Yun Woo, Won-Mook Kang, Young-Tak Seo, Soochang Lee, Seongbin Oh, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, "Initial Synaptic Weight Distribution for Fast Learning Speed and High Recognition Rate in STDP-based Spiking Neural Network," 한국반도체학술대회, Feb. 2019

[369] Hyeongsu Kim, Suhwan Lim, Jong-Ho Bae, Sung-Tae Lee, Young-Tak Seo, Dongseok Kwon, Byung-Gook Park and Jong-Ho Lee, "The Effect of structure and position of layer on accuracy of hardware neural network with variation of synapse devices," 한국반도체학술대회, Feb. 2019

[368] Young-Tak Seo, Min-Kyu Park, Jong-Ho Bae, Byung-Gook Park and Jong-Ho Lee, "Implementation of Synaptic Device Using Various High-k Gate Dielectric Stack," 한국반도체학술대회, Feb. 2019

[367] Sung Yun Woo, Kyu-Bong Choi, Jangsaeng Kim, Won-Mook Kang, Chul-Heung Kim, Young-Tak Seo, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, "Implementation of Homeostasis Functionality in Neuron Circuit Using Split-Gate Device for Spiking Neural Network," 한국반도체학술대회, Feb. 2019

[366] Sung-Tae Lee, Suhwan Lim, Nagyong Choi, Jong-Ho Bae, Dongseok Kwon, Hyeog-Su Kim, Byung-Gook Park, and Jong-Ho Lee, "Effect of word-line bias on linearity of multi-level conductance steps for multi-layer neural networks based on NAND flash cells," 한국반도체학술대회, Feb. 2019

[365] Soochang Lee, Chul-Heung Kim, Seongbin Oh, Byung-Gook Park, and Jong-Ho Lee, "Excitatory and Inhibitory Synaptic Behavior of Analog Synapses Using TFT-Type NOR Flash Memory Cells," 한국반도체학술대회, Feb. 2019

[364] Seongbin Oh, Chul-Heung Kim, Soochang Lee, JangSaeng Kim, Byung-Gook Park, and Jong-Ho Lee, "Effect of Pruning on Energy-efficient Spiking Neural Network Trained by Back-propagation," 한국반도체학술대회, Feb. 2019

[363] Chae Soo Kim, Sungjun Kim, and Byung-Gook Park, "신경모방회로에서의 전류역류현상 방지를 위한 W/SiNx/N+/P 1D1R 시냅스와 패턴인식 시뮬레이션," 대한전자공학회 추계학술대회, Nov. 2018

[362] Taehyung Kim, and Byung-Gook Park, "넓은 Learning Window를 가지는 Spike-timing Dependent Placiticity(STDP)를 구현한 저항변화메모리(RRAM) 시냅스 기반 뉴런 회로," 대한전자공학회 추계학술대회, Nov. 2018

[361] Young Suh Song, Taehyung Kim, Kyung Kyu Min, Sungmin Hwang, and Byung-Gook Park, "실리콘 기반 나노와이어 터널 전계 효과 트렌지스터의 스케일링 및 게이트 절연막 연구," 대한전자공학회 추계학술대회, Nov. 2018

[360] Kyungchul Park, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, and Byung-Gook Park, "Analysis of operation characteristics of dual gate positive Feedback field effect transistor as capacitor-less 1T-DRAM device," Nano Korea, Jul. 2018

[359] Ryoongbin Lee, Sangwan Kim, Kitae Lee, Sihyun Kim, Dae Woong Kwon, and Byung-Gook Park, "Nonvolatile Memory (NVM) Operation of Tunnel Field-Effect Transistor (TFETs) Using Doped-HfO2 Sidewall," Nano Korea, Jul. 2018

[358] Min-Woo Kwon, Kyungchul Park, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, Byung-Gook Park, "Spice compact modeling for positive feedback field effect transistor," Nano Korea, Jul. 2018

[357] Myung-Hyun Baek, Taejin Jang, Min-Woo Kwon, Sungmin Hwang, Suhyeon Kim, and Byung-Gook Park1, "Design and Fabrication of Polysilicon-based Asymmetric Dual Gate Synapse Array," Nano Korea, Jul. 2018

[356] Taehyung Kim, and Byung-Gook Park, "Integrate-and-Fire Silicon-on-Insulator Neuron Circuit Incorporating a Hysteresis Inverter as an Action Potential Generating Component," Nano Korea, Jul. 2018

[355] 김민휘, 김성준, 방수현, 김태현, 이동근, 조성재, 박병국, "실리콘 질화막 기반 저항 변화 메모리의 전압 의존적 저항 변화 특성 모델링," 하계종합학술대회, Jun. 2018

[354] 김문현, 이기태, 김시현, 김상완, 박병국, "적층된 Nanosheet Gate-All-Around Field-Effect Transistor의 동작 최적화를 위한 PMOS 구조," 하계종합학술대회, Jun. 2018

[353] 장태진, 백명현, 황성민, 권민우, 박병국, "비대칭 게이트 구조에서 충격 이온화를 이용한 핫 캐리어 주입 분석," 하계종합학술대회, Jun. 2018

[352] 김현민, 김시현, 박병국, "시뮬레이션을 통한 Thyristor RAM에서 Band to Band Tunneling이 소자 특성에 미치는 영향 연구," 하계종합학술대회, Jun. 2018

[351] 오민혜, 장지수, 박병국, "하드웨어 기반 스파이킹 뉴럴 네트워크를 이용한 강화 학습 검증에 대한 연구," 하계종합학술대회, Jun. 2018

[350] 이기태, 이준일, 김시현, 김문현, 김상완, 박병국, "TMAH를 이용한 채널 방향에 따른 실리콘 식각 특성 분석," 하계종합학술대회, Jun. 2018

[349] 홍경호, 김태형, 박경철, 황성민, 박병국, "Spike-Timing Dependent Plasticity 학습을 위한 활동 전위 생성 회로," 하계종합학술대회, Jun. 2018

[348] 김시현, 김수현, 고형우, 김상완, 박병국, "시뮬레이션을 통한 게이트-소스/드레인 간 Overlap 길이에 따른 GAA FET의 Extension 저항 추출 및 분석," 하계종합학술대회, Jun. 2018

[347] Seongbin Oh, Chul-Heung Kim, Soochang Lee, Byung-Gook Park, and Jong-Ho Lee, "Classification for grayscale images using supervised spike rate-based learning," 한국반도체학술대회, Feb. 2018

[346] Soochang Lee, Chul-Heung Kim, Byung-Gook Park, and Jong-Ho Lee, "Unsupervised Learning of Image Patterns using Multiple Postsynaptic Neurons based on Spike-Timing-Dependent Plasticity," 한국반도체학술대회, Feb. 2018

[345] Young-Tak Seo, Myoung-Sun Lee, Ho-Jung Kang, Byung-Gook Park, and Jong-Ho Lee, "Implementation of Synaptic Device with Long/Short Term Memory Function Using High-k Charge Storage Layer," 한국반도체학술대회, Feb. 2018

[344] Sung Yun Woo, Kyu-Bong Choi, Suhwan Lim, Byung-Gook Park, and Jong-Ho Lee, "Synaptic Devices Using MOSFET wth Memory Functionality for Neural Network," 한국반도체학술대회, Feb. 2018

[343] Chul-Heung Kim, Soochang Lee, Byung-Gook Park, and Jong-Ho Lee, "Demonstration of Unsupervised Learning with Spike-Tuyhwan Park, Junil Lee, Ryoongbin Lee, Soyeon Kim, Hyun-Min Kim, Kitae Lee, Jong-Ho Lee, and Byung-Gook Park, "Simulation Study on the Effect of Unconformal Work-function Metal Deposition on the Electrical Characteristic of Stacked-GAA MOSFET," 한국반도체학술대회, Feb. 2018

[342] Suhwan Lim, Jai-Ho Eum, Jong-Ho Bae, Byung-Gook Park, and Jong-Ho Lee, "Design of Foward Propagation Using Gated Schottky Diodes," 한국반도체학술대회, Feb. 2018

[341] Sihyun Kim, Suhyeon Kim, Sangwan Kim, Euyhwan Park, Junil Lee, Ryoongbin Lee, Soyeon Kim, Hyun-Min Kim, Kitae Lee, Jong-Ho Lee, and Byung-Gook Park, "Simulation Study on the Effect of Unconformal Work-function Metal Deposition on Electrical Characteristic of Stacked-GAA MOSFET," 한국반도체학술대회, Feb. 2018

[340] Suhyeon Kim, Junil Lee, Myung-Hyun Baek, Sihyun Kim, Ryoongbin Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, "A Characteristic of Stacked Gate-All-Around Nanowire MOSFET based on Source Drain Doping Profile," 한국반도체학술대회, Feb. 2018

[339] Hyungjin Kim, Sungmin Hwang, Seunghyun Kim, Myung-Hyun Baek, Jong-Ho Lee,and Byung-Gook Park, "Solving Overlapping Pattern Issues by Inhibitory Synaptic Transistors in BioInspired Neuromorhpic System," 한국반도체학술대회, Feb. 2018

[338] Kyungchul Park, Min-Woo Kwon, and Byung-Gook Park, "Analysis of Carrier Lifetime Dependence of Dual Gate Positive Feedback Field-Effect Transistor with Polysilicon Body," 한국반도체학술대회, Feb. 2018

[337] Kitae Lee, Junil Lee, Ryoongbin Lee, Euyhwan Park, Sihyun Kim, Hyun-Min Kim, Sangwan Kim, and Byung-Gook Park, "Tunnel Field Effect Transistor with Ferroelectric Gate Dielectric," 한국반도체학술대회, Feb. 2018

[336] Dong Keun Lee, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Yeon-Joon Choi, Seongjae Cho,and Byung-Gook Park, "Neuromorphic Behaviors of HfO2 ReRAM by Pulse Frequency Modulation," 한국반도체학술대회, Feb. 2018

[335] Jeong-Jun Lee, Jungjin Park, Sungmin Hwang, and Byung-Gook Park, "Implementation of Neuromorphic System with Neuron Circuit Retaining Overflow," 한국반도체학술대회, Feb. 2018

[334] Junil Lee, Ryoongbin Lee, Euyhwan Park, Sihyun Kim, Hyun-Min Kim, Kitae Lee, Soyoun Kim, Sangwan Kim, and Byung-Gook Park, "Drive Current Boosting Method of Tunnel FET with Locally Concentrated Silicon-Germanium Channel near Surface," 한국반도체학술대회, Feb. 2018

[333] Jeesoo Chang, Sihyun Kim, Dae Woong Kwon, and Byung-Gook Park, "Parasitic Capacitance Reduction on Tunneling Field Effect Transistor for Enhanced AC Performance and Energy Consumption," 한국반도체학술대회, Feb. 2018

[332] Taejin Jang, Myung-Hyun Baek, and Byung-Gook Park, "An Analysis of Hot Carrier Injection in Asymmetric Dual Gate Structure," 한국반도체학술대회, Feb. 2018

[331] Yeon-Joon Choi, Sungjun Kim, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, Seongjae Cho, and Byung-Gook Park, "Close Investigation of Electric Field Concentration Effect in the Wedge Structure through Numerical Analysis for Nanoscale ReRAM Application," 한국반도체학술대회, Feb. 2018

[330] Sungmin Hwang, Hyungjin Kim, Min-Woo Kwon, Jungjin Park, and Byung-Gook Park, "A Proposal of Learning Method Using Spike-Timing Dependent Plasticity for Neuromorphic Systems," 한국반도체학술대회, Feb. 2018

[329] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Suhyun Bang, Dong keun Lee, Hee-Dong Kim, and Byung-Gook Park, "Scaling effect of device size on resistive switching characteristics in SiN-based RRAM," NANO Korea, Jul. 2017

[328] Hyungjin Kim, Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Taejin Jang, Jeong-Jun Lee, and Byung-Gook Park, "A DRAM Cell Based on Gated-Thyristor with Surrounding Gate Structure for High Scalability," NANO Korea, Jul. 2017

[327] Dong Keun Lee, Sungjun Kim, Min-Hwi Kim, Suhyun bang, Tae-Hyeon Kim, and Byung-Gook Park, "Area Dependency of Operating Voltages in Nano-Wedge Resistive Random Access Memory," NANO Korea, Jul. 2017

[326] Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Analysis on Current Drift of n- and p-channel pH-sensitive SiNW ISFET by capacitance measurement," NANO Korea, Jul. 2017

[325] Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Jong-Ho Lee, and Byung-Gook Park, "Back-bias effect on nanowire Tunnel Field-Effect Transistors for Modulating Turn-on point," NANO Korea, Jul. 2017

[324] Kitae Lee, Dae Woong Kwon, Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Taehyung Park, Hyun-Min Kim, and Byung-Gook Park, "Suppression of ambipolar current by controlling gate oxide thickness in Tunnel FET," NANO Korea, Jul. 2017

[323] Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim, and Byung-Gook Park, "Determination of Optimal Drive Voltage for Highly-Sensitive ISFET Considering CMOS Readout Circuit Applications," NANO Korea, Jul. 2017

[322] Junil Lee, Euyhwan Park, Sihyun Kim, Ryoongbin Lee, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, "Novel Method to Fabricate SiGe Nanowire Tunnel Field-effect Transistors with Low Temperature Dopant Activation by Ni Silicidation," NANO Korea, Jul. 2017

[321] Hyun-Min Kim, Dae Woong Kwon, Sihyun Kim, Kitae Lee, Junil Lee, Euyhwan Park, Ryoongbin Lee, and Byung-Gook Park, "A study of volatile and nonvolatile characteristics of asymmetric dual-gate thyristor RAM fabricated vertically with polycrystalline silicon," NANO Korea, Jul. 2017

[320] Jeong-Jun Lee, Sungmin Hwang, and Byung-Gook Park, "Demonstration of Neuromorphic system with HfO2-based RRAm," NANO Korea, Jul. 2017

[319] Min-Woo Kwon, Myung-Hyun Baek, Sungmin Hwang, Tejin Jang, and Byung-Gook Park, "Low power Integrate-and-Fire neuron circuit using positive feedback field effect transistor," NANO Korea, Jul. 2017

[318] 박경철, 황성민, 이정준, 장태진, 이기태, 박병국, "터널링 소자 기반 전하 트랩 플래시 메모리 구조적 특성 분석," 하계종합학술대회, pp. 141-143, Jun. 2017

[317] 이기태, 이준일, 박의환, 김시현, 이륭빈, 박태형, 김현민, 박병국, "Tunneling Field Effect Transistor의 채널과 산화막 사이 계면 트랩 위치에 따른 전류 전달 특성 분석," 하계종합학술대회, pp. 90-92, Jun. 2017

[316] 오민혜, 황성민, 박병국, "양성 피드백을 이용한 전계 효과 트랜지스터의 벌크 트랩 영향에 대한 연구," 하계종합학술대회, pp. 93-95, Jun. 2017

[315] Eunseon Yu, Seongjae Cho, and Byung-Gook Park, "Capacitance-Voltage Characterization of Ultra-Thin Floating-Body MOSFETs," 한국반도체학술대회, pp. -, Feb. 2017

[314] Youngmin Kim, Seongjae Cho, Hyungsoon Shin, and Byung-Gook Park, "Design and Operation of Capacitorless Si Volatile Memory Based on 2-Terminal Thyristor (2-T TRAM)," 한국반도체학술대회, pp. -, Feb. 2017

[313] Ho-Jung Kang, Nagyong Choi, Byung-Gook Park and Jong-Ho Lee, "Analysis of Hysteresis Characteristic in 3-D NAND Flash Memory Cells," 한국반도체학술대회, pp. -, Feb. 2017

[312] Won-Mook Kang,SungTae Lee, In-Tak Cho, Tae Hyung Park, Hyeonwoo Shin, Cheol Seong Hwang, Changhee Lee, Byung-Gook Park and Jong-Ho Lee, " Multi-layer WSe2 Field Effect Transistor with Improved Carrier-injection Contact by Using Oxygen Plasma Treatment," 한국반도체학술대회, pp. -, Feb. 2017

[311] Chul-Heung Kim, Suhwan Lim, Sung Yun Woo, Byung-Gook Park, and Jong-Ho Lee, "Demonstration of Unsupervised Learning with Spike-Timing Dependent Plasticity for Neuromorphic System," 한국반도체학술대회, pp. -, Feb. 2017

[310] Jong-Ho Bae, Jun-Mo Park, Jai-Ho Eum, Won-Mook Kang, Jaeha Kim, Byung-Gook Park, and Jong-Ho Lee, "Reconfigurable Device with Programmable Bottom Gate Array," 한국반도체학술대회, pp. -, Feb. 2017

[309] Jongmin Shin, Yoonki Hong, Meile Wu, Byung-Gook Park, and Jong-Ho Lee, "Response characteristics of Si FET-type humidity sensor having sputtered MoS2 film as a sensing layer," 한국반도체학술대회, pp. -, Feb. 2017

[308] Sung Yun Woo, Chul-Heung Kim, Kyu-Bong Choi, Suhwan Lim, Jaeha Kim, Byung-Gook Park, and Jong-Ho Lee, "Homeostatic Neuron Circuit Using Double-Gate Device for Spiking Neural Network," 한국반도체학술대회, pp. -, Feb. 2017

[307] Suhwan Lim, Jong-Ho Bae, Jun-Mo Park, Jai-Ho Eum, Won-Mook Kang, Chul-Heung Kim, Myoung-Sun Lee, Sung Yun Woo, Byung-Gook Park, and and Jong-Ho Lee, "Synaptic Devices Based on Reconfigurable Gated Schottky Diodes for Highly-Linear Potentiation," 한국반도체학술대회, pp. -, Feb. 2017

[306] Kyu-Bong Choi, Byung-Gook Park, and Jong-Ho Lee, "Fully Formed, Releasable Single-Crystal Silicon-Metal Oxide Field Effect Transistors Based on (100) Silicon Bulk wafer," 한국반도체학술대회, pp. -, Feb. 2017

[305] Suhyun Bang, Sungjun Kim, Hyungjin Kim, Tae-Hyeon Kim, and Byung-Gook Park, "Investigation on Pulse Operation of Cu/IGZO/Si Structured ReRAM," 한국반도체학술대회, pp. -, Feb. 2017

[304] Suhyeon Kim, Junil Lee, Myung-Hyun Baek, Sihyun Kim, Taehyung Park, and Byung-Gook Park, "An Analysis of Gate-All-Around Nanowire MOSFET Channel Mobility On the Nanowire Shape Variation," 한국반도체학술대회, pp. -, Feb. 2017

[303] Min-Woo Kwon, Sungmin Hwang, Myung-Hyun Baek, Jungjin Park, and Byung-Gook Park, "Integrate-and-Fire (I&F) neuron circuit using positive feedback field effect transistor (FBFET)," 한국반도체학술대회, pp. -, Feb. 2017

[302] Sungjun Kim, Min-Hwi Kim, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Improved Controllability of Conductance by Inserting Al2O3 in SiN-based Resistive Switching Memory," 한국반도체학술대회, pp. -, Feb. 2017

[301] Sungjun Kim, Tae-Hyeon Kim, Hee-Dong Kim, Seongjae Cho and Byung-Gook Park, "Self-compliance bipolar resistive switching in SiN-based RRAM with MIS structure," 한국반도체학술대회, pp. -, Feb. 2017

[300] Do-Bin Kim, Dae Woong Kwon, and Byung-Gook Park, "A Boosted Common Source Line Program Scheme in Channel Stacked NAND Flash Memory with Layer Selection by Multilevel Operation," 한국반도체학술대회, pp. -, Feb. 2017

[299] Junil Lee, Dae Woong Kwon, Euyhwan Park, Sihyun Kim, Ryoongbin Lee, Taehyung Park, Hyun-Min Kim, Kitae Lee, and Byung-Gook Park, "Novel Method to Form Thin Silicon Channel on Bulk Silicon Substrate for Low-cost Tunnel Field Effect Transistor Fabrication," 한국반도체학술대회, pp. -, Feb. 2017

[298] Ryoongbin Lee, Dae Woong Kwon, Euyhwan Park, Junil Lee, Sihyun Kim and Byung-Gook Park, "Simulation study on drain current characteristics in linear and saturation region of Tunnel Field Effect Transistor (TFET)," 한국반도체학술대회, pp. -, Feb. 2017

[297] Seunghyun Kim, Do-Bin Kim, Sang-Ho Lee, Sang-Ku Park, Youngmin Kim, Seongjae Cho, and Byung-Gook Park, "Compact modeling of NAND flash memory operation through accurate locating the vertical position of trapped charges," 한국반도체학술대회, pp. -, Feb. 2017

[296] Taejin Jang, Myung-Hyun Baek, Hyungjin Kim, and Byung-Gook Park, "An Analysis of Carrier Trapping at Grain Boundary of Polysilicon," 한국반도체학술대회, pp. -, Feb. 2017

[295] Tae-Hyeon Kim, Sungjun Kim, Min-Hwi Kim, Su-Hyun Bang, Dong Keun Lee, and Byung-Gook Park, "Resistive switching characteristics of a Ni/WO x /p + -Si RRAM by pulse analysis," 한국반도체학술대회, pp. -, Feb. 2017

[294] Sang Ho Lee, Dae Woong Kwon, Seung Hyun Kim, Sangku Park, Myung Hyun Baek, and Byung-Gook Park, "Simulation study of the Dependence of Word-Line Stacked NAND Flash Memory Electrical Characteristics on Grain Boundary Traps," 한국반도체학술대회, pp. -, Feb. 2017

[293] Jeong-Jun Lee, Jungjin Park, Hyungjin Kim, and Byung-Gook Park, "Learning with Neuron-Synapse Connection in Neuromorphic System," 한국반도체학술대회, pp. -, Feb. 2017

[292] Min-Hwi Kim, Sungjun Kim, Suhyun Bang, Tae-hyeon Kim, Dong Keun Lee, Seongjae Cho and Byung-Gook Park, "Fabrication and Resistive Switching Characteristics of Silicon Nano-wedge Structure RRAM," 한국반도체학술대회, pp. -, Feb. 2017

[291] Sihyun Kim, Dae Woong Kwon, Euyhwan Park, Junil Lee, Roongbin Lee, Jong-Ho Lee, and Byung-Gook Park, "Simulation Study on the Effect of Source Length in Schottky Barrier Tunnel Field Effect Transistor," 한국반도체학술대회, pp. -, Feb. 2017

[290] 이동근, 김성준, 김민휘, 방수현, 김태현, 박병국, "Si 3 N 4 및 SiO 2 이중층 절연막 기반 저항 변화 메모리 구동에 compliance 전류가 미치는 영향," 대한전자공학회 추계학술대회, pp. 48-51, Nov. 2016

[289] 김현민, 이준일, 권대웅, 박의환, 김시현, 이륭빈, 박태형, 이기태, 박병국, "시뮬레이션을 통한 TFET 소자에서의 Source-to-Gate Underlap/Overlap 길이에 따른 특성 변화 연구," 대한전자공학회 추계학술대회, pp. 95-98, Nov. 2016

[288] 이기태, 이륭빈, 권대웅, 박의환, 이준일, 김시현, 박태형, 김현민, 박병국, "시뮬레이션을 통한 Tunneling Field Effect Transistor의 온도와 트랩 분포에 따른 전류 전달 특성 분석," 대한전자공학회 추계학술대회, pp. 99-102, Nov. 2016

[287] 방수현, 김성준, 박병국, "멀티 레벨 셀 활용을 위한 터널링장벽이 삽입된 질화막 기반의 저항 변화 메모리의 점진적 저항변화 특성," 대한전자공학회 추계학술대회, pp. 110-112, Nov. 2016

[286] Eunseon Yu, Seongjae Cho, and Byung-Gook Park, "Non-Quasi-Static Capacitance-Voltage Characteristics of Ultra-Thin-Body n-type MOSFET Device," 대한전자공학회 추계학술대회, pp. 129-132, Nov. 2016

[285] Yongbeom Cho, Youngmin Kim, Seongjae Cho, Sang Sig Kim, and Byung-Gook Park, "Optimization of Program Operation for the Scaled 2-Terminal TRAM Memory Device," 대한전자공학회 추계학술대회, pp. 106-109, Nov. 2016

[284] Youngmin Kim, Yongbeom Cho, Seongjae Cho, Sang Sig Kim, and Byung-Gook Park, "Scaling and Sub-1-V Low-Voltage Operation Characteristics of TRAM Memory Device Based on 2-Terminal Thyristor," 대한전자공학회 추계학술대회, pp. 62-65, Nov. 2016

[283] Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Taehyung Park, and Byung-Gook Park, "Tunnel Field-Effect Transistor (TFET) with Asymmetric Gate Dielectric and Body Thickness," NANO Korea, pp. -, Jul. 2016

[282] Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee, Taehyung Park, and Byung-Gook Park, "Switching Characteristic Analysis of Tunnel Field-Effect Transistor (TFET) Inverters," NANO Korea, pp. -, Jul. 2016

[281] Ryoongbin Lee, Dae Woong Kwon, Sihyun Kim, Dae Hwan Kim, and Byung-Gook Park, "New type of ISFET with separated sensing region from gate-controlled region," NANO Korea, pp. -, Jul. 2016

[280] Sihyun Kim, Dae Woong Kwon, Ryoongbin Lee, Dae Hwan Kim, and Byung-Gook Park, "Simulation study on ONO gate stacked biosensor-CMOS hybrid system," NANO Korea, pp. -, Jul. 2016

[279] Jang Hyun Kim, Dae Woon Kwon, and Byung-Gook Park, "Analysis of Hump Phenomena in Amorphous oxide Thin Film Transistor," NANO Korea, pp. -, Jul. 2016

[278] Taehyung Park, Jang Hyun Kim, Dae Woong Kwon, Euyhwan Park, Junil Lee, Sihyun Kim, Ryoongbin Lee and Byung-Gook Park, "Universal Analytic Drain Current Model with SiGe Source Tunnel FET," NANO Korea, pp. -, Jul. 2016

[277] Junil Lee, Jang Hyun Kim, Dae Woong Kwon, Euyhwan Park, Taehyung Park, Sihyun Kim, Ryoongbin Lee, and Byung-Gook Park, "Co-Integration of Metal-Oxide-Semiconductor Field-Effect Transistors and Tunnel Field-Effect Transistors Using SiGe Selective Etch for Low Power CMOS Technology," NANO Korea, pp. -, Jul. 2016

[276] Sungjun Kim, Min-Hwi Kim, Tae-Hyeon Kim, Su Hyun Bang, Min Ju Yun, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "Understanding reset transitions in SiN-based resistive random-access memory," NANO Korea, pp. -, Jul. 2016

[275] 김민휘, 김성준, 방수현, 김태현, 이동근, 조성재, 박병국, "CMOS 호환 가능한 Si3N4 기반 저항 변화 메모리의 점진적 저항 변화 특성 분석," 하계종합학술대회, pp. 2557-2560, Jun. 2016

[274] 김태현, 김성준, 김민휘, 방수현, 이동근, 박병국, "저전력 동작을 위한 실리콘 나이트라이드 기반의 저항 변화 메모리 소자에서 forming 전압이 미치는 효과," 하계종합학술대회, pp. -, Jun. 2016

[273] 김현민, 이준일, 권대웅, 김장현, 박의환, 김시현, 박태형, 이륭빈, 박병국, "시뮬레이션을 통한 Double Gate Tunneling Field Effect Transistor의 최적화 연구," 하계종합학술대회, pp. -, Jun. 2016

[272] 이정준, 박정진, 김형진, 권민우, 백명현, 황성민, 박병국, "저 전력 동작을 위한 뉴런 모방 회로의 파라미터 최적화," 하계종합학술대회, pp. -, Jun. 2016

[271] 장태진, 박태형, 권대웅, 이준일, 김장현, 김시현, 박병국, 시뮬레이션을 통한 이중 게이트 Tunneling Field Effect Transistor의 Compact Modeling," 하계종합학술대회, pp. -, Jun. 2016

[270] 이성태, 조인탁, 강원묵, 박병국, 이종호, "Pulsed I-V 측정과 DC 측정을 통한 WSe2 FET특성에서 수소 열처리 효과 분석," 하계종합학술대회, pp. -, Jun. 2016

[269] Sang-Ho Lee, Dae Woong Kwon, Seunghyun Kim, Myung-Hyun Baek, and Byung-Gook Park, "Effects of Channel Hole Diameter and Blocking Layer Thickness on Electrical Characteristics in Word-Line Stacked NAND Flash Memory," 한국반도체학술대회, pp. -, Feb. 2016

[268] Myung-Hyun Baek, Sang-Ho Lee, Dae Woong Kwon, Joo Yun Seo, and Byung-Gook Park, " Hole Trapping Phenomenon at Grain Boundary of 3D NAND Flash Memory," 한국반도체학술대회, pp. -, Feb. 2016

[267] Su-Hyun Bang, Sungjun Kim, Hyungjin Kim, Tae-Hyeon Kim, and Byung-Gook Park, "Synaptic Device based on Memristor using Cu/ITO/Si Structure," 한국반도체학술대회, pp. -, Feb. 2016

[266] Sangku Park, Myung-Hyun Baek, and Byung-Gook Park, "Charge Trapping Characteristics of FG NAND Flash Tunneling Oxide under Program and Erase Opeartion," 한국반도체학술대회, pp. -, Feb. 2016

[265] Hyungjin Kim, and Byung-Gook Park, "Effects of Pocket Doping Conncentration on 1T DRAM based on Pillar Type Tunneling Field-effect Transistor with Surrounding Gate Structure," 한국반도체학술대회, pp. -, Feb. 2016

[264] Tae-Hyeon Kim, Hyungjin Kim, Sungjun Kim, Su-Hyun Bang, and Byung-Gook Park, "Resistive Switching Characteristics of RRAM with WOx Switching Layer Prepared by Rapid Thermal Oxidation," 한국반도체학술대회, pp. -, Feb. 2016

[263] Seunghyun Kim, Min-Hwi Kim, Sang-Ho Lee, Yongmin Kim, 김형민, 김용관, Seongjae Cho, and Byung-Gook Park, "Highly Accurate Circuit-level Macro Modeling of Charge-trap Flash Memory," 한국반도체학술대회, pp. -, Feb. 2016

[262] Min-Hwi Kim, Sungjun Kim, Sunghun Jung, Seongjae Cho, and Byung-Gook Park, "DC and Pulse Switching Characteristics of Fully Si Processing-compatible SiN-based RRAM," 한국반도체학술대회, pp. -, Feb. 2016

[261] Min-Hwi Kim, Sungjun Kim, Sunghun Jung, Seongjae Cho, and Byung-Gook Park, "Circuit-level Simulation of RRAM Cross-point Array based on a Reliable Device-level Compact Modeling," 한국반도체학술대회, pp. -, Feb. 2016

[260] Do-Bin Kim, Dae Woong Kwon, Wandong Kim, and Byung-Gook Park, "Threshold Voltage Setting Method for Layer Selection by Multi-Level Operation in Channel Stacked NAND Flash memory with Body," 한국반도체학술대회, pp. -, Feb. 2016

[259] Min-Woo Kwon, Sungjun Kim, Min-Hwi Kim, Jungjin Park, Hyungjin Kim, and Byung-Gook Park, "Integrate-and-Fire (I&F) neuron circuit using resistive-switching random access memory (RRAM)," 한국반도체학술대회, pp. -, Feb. 2016

[258] Jun-Mo Park, In-Tak Cho, Won-Mook Kang, Byung-Gook Park, and Jong-Ho Lee, "Method to eliminate gate and drain bias stress in WSe2 field effect transistors with single channel pulsed I-V measurement," 한국반도체학술대회, pp. -, Feb. 2016

[257] Ho-Jung Kang, Nagyong Choi, Byung-Gook Park, and Jong-Ho Lee, "An Analysis of AC- gm Dispersions due to Traps in Nitride Storage Layer in 3-D NAND Flash Memory," 한국반도체학술대회, pp. -, Feb. 2016

[256] Nagyong Choi, Ho-Jung Kang, Sung-Min Joe1, Byung-Gook Park, and Jong-Ho Lee, "Effect of Trap in Hysteresis Phenomenon of Floating-Gate NAND Flash Memory Cells," 한국반도체학술대회, pp. -, Feb. 2016

[255] Xiaochi Chen, Seongjae Cho, James S. Harris, and Byung-Gook Park, "Ge-on-Si microdisk resonator with enhanced optical confinement by SiNx stressor for Si electronic and photonic integrated system," 한국반도체학술대회, p. 260, Feb. 2016

[254] Sungmin Hwang, Hyungjin Kim, Dae Woong Kwon, and Byung-Gook Park, "양성 피드백을 이용한 낮은 문턱 전압 이하 스윙을 갖는 전계 효과 트랜지스터 구현," 대한전자공학회 추계학술대회, pp. -, Nov. 2015

[253] Sungjun Kim, Sunghun Jung, Hyungjin Kim, Min-Hwi Kim, Suhyun Bang, Tae-Hyeon Kim, Minju Yun, Hee-Dong Kim, Seongjae Cho, and Byung-Gook Park, "실리콘 산화막 기반의 저항변화메모리," 대한전자공학회 추계학술대회, pp. -, Nov. 2015

[252] Sihyun Kim, Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park, Junil Lee, TaeHyung Park, Ryoongbin Lee, and Byung-Gook Park, "시뮬레이션을 통한 silicon germanium tunnel field effect transistor의 온도 특성 분석," 대한전자공학회 추계학술대회, pp. -, Nov. 2015

[251] Myung-Hyun Baek, Jang Hyun Kim, and Byung-Gook Park, "The lowering of schottky barrier height using ultrathin interlayer to reduce contact resistance," NANO Korea, pp. -, Jul. 2015

[250] Do-Bin Kim and Byung-Gook Park, "Investigation on SONOS flash memory with thin polycrystalline channel," NANO Korea, pp. -, Jul. 2015

[249] Seunghyun Kim, Myung-Hyun Baek, Won Bo Shim, and Byung-Gook Park, "Investigation of gated multi bit array (GMB) with arch type cut off gate for 3D NAND flash memory," NANO Korea, pp. -, Jul. 2015

[248] Junil Lee, Jang Hyun Kim, Euyhwan Park, Taehyung Park, Dae Woong Kwon, and Byung-Gook Park, "Improvement of switching characteristics and on-current in tunnel field-effect transistors by modifying source/channel junction," NANO Korea, pp. -, Jul. 2015

[247] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "HfOx-based RRAM with sub-100-nA operating current for low-power applications," NANO Korea, pp. -, Jul. 2015

[246] Taehyung Park, Jang Hyun Kim, Hyun Woo Kim, Euyhwan Park, Junil Lee, and Byung-Gook Park, "Capacitance-Voltage characterization of tunnel field effect transistors with Si/SiGe heterojunction," NANO Korea, pp. -, Jul. 2015

[245] 김태현, 김민휘, Sungjun Kim, and Byung-Gook Park, "시뮬레이션을 통한 RRAM crossbar array의 구현과 read margin 및 전력 소모 개선 방안 연구," 하계종합학술대회, pp. -, Jun. 2015

[244] Min-Hwi Kim, Sunghun Jung, Sungjun Kim, and Byung-Gook Park, "대용량 메모리 어레이 시뮬레이션을 위한 양극성 저항 변화 메모리 회로 모델링," 하계종합학술대회, pp. 2557-2560, Jun. 2015

[243] 박상구, 이치우, Sang-Ho Lee, and Byung-Gook Park, "Fast measurement 기법을 사용한NAND flash 소자에서의 NBTI 열화분석," 하계종합학술대회, pp. -, Jun. 2015

[242] Hyungjin Kim and Byung-Gook Park, "Self-Boosted tunnel field-effect transistor using nitride charge trapping layer," 한국반도체학술대회, pp. 126-126, Feb. 2015

[241] Sungjun Kim, Sunghun Jung, Min-Hwi Kim, Seongjae Cho, and Byung-Gook Park, "Resistive switching characteristics depending on defects in Silicon nitride-based RRAM," 한국반도체학술대회, pp. 92-92, Feb. 2015

[240] Jungjin Park, Min-Woo Kwon, Hyungjin Kim, and Byung-Gook Park, "Neuromorphic system based on CMOS analog neuron circuit," 한국반도체학술대회, pp. 126-126, Feb. 2015

[239] Seongjae Cho and Byung-Gook Park, "Low-Power and high-speed optically readable charge-trap flash Memory with sub-10-ps read time," 한국반도체학술대회, pp. 127-127, Feb. 2015

[238] Junil Lee, Hyun Woo Kim, Jang Hyun Kim, Euyhwan Park, Dae Woong Kwon, Tae-Hyung Park, and Byung-Gook Park, "Electrical characteristics of MOSCAP with high-κ/Metal gateusing an Oxygen scavenging process," 한국반도체학술대회, pp. 166-166, Feb. 2015

[237] Jeongmin Lee, Seung Wook Ryu, Seongmin Lee, Sungjun Kim, Seongjae Cho, Hyeong Joon Kim, and Byung-Gook Park, "A novel processing technique for reducing contact resistance of n+ si junctions by a high-κ dielectric prepared by atomic layer deposition," 한국반도체학술대회, pp. 167-167, Feb. 2015

[236] Jang Hyun Kim, Hyun Woo Kim, and Byung-Gook Park, "고리형식의 gate를 가진 터널 전계효과 트랜지스터," 대한전자공학회 추계학술대회, pp. 139-140, Nov. 2014

[235] Euyhwan Park, Hyun Woo Kim, Jang Hyun Kim, Junil Lee, and Byung-Gook Park, "Tunnel field-effect transistor에서의 온도변화에 따른 높은 게이트 전압에서의 전류감소 현상분석," 대한전자공학회 추계학술대회, pp. 59-60, Nov. 2014

[234] Sihyun Kim, Jungjin Park, Junil Lee, Hyun Woo Kim, Jang Hyun Kim, and Byung-Gook Park, "시뮬레이션을 통한 tunneling field effect transistor의 최적화 연구," 대한전자공학회 하계학술대회, pp. 49-52, Jun. 2014

[233] Seongjae Cho, Byung-Gook Park, and James S. Harris, Jr, "SiGeSn ternary system for next-generation electronic and photonic devices," Korean Conference on Semiconductors, pp. 291-291, Feb. 2014

[232] Hyun Woo Kim, Jong Pil Kim, Sang Wan Kim, Min-Chul Sun, Garam Kim, Jang Hyun Kim, Euyhwan Park, and Byung-Gook Park, "Schottky barrier tunneling field-effect transistor using spacer technique," Korean Conference on Semiconductors, pp. 294-294, Feb. 2014

[231] Min-Woo Kwon, Hyungjin Kim, Jungjin Park, and Byung-Gook Park, "Integrate-and-Fire neuron circuit and synaptic device with floating body MOSFETs," Korean Conference on Semiconductors, pp. 293-293, Feb. 2014

[230] Garam Kim, Jang Hyun Kim, Euyhwan Park, and Byung-Gook Park, "Current crowding improvement of InGaN-based blue light-emitting diodes by modifying metal contact geometry," Korean Conference on Semiconductors, pp. 355-355, Feb. 2014

[229] Joo Yun Seo, Yoon Kim, Do-Bin Kim, and Byung-Gook Park, "A new programming method to alleviate the program speed variation for three-dimensional channel stacked array architecture," Korean Conference on Semiconductors, pp. 80-80, Feb. 2014

[228] Min-Hwi Kim, Se Hwan Park, Sunghun Jung, Seunghyun Kim, and Byung-Gook Park, "에어갭의 도입을 통한 낸드 플래시 메모리의 셀 간 간섭의 완화," 대한전자공학회 추계학술대회, pp. 94-97, Nov. 2013

[227] Myung Hyun Baek, Se Hwan Park, Joo Yun Seo, and Byung-Gook Park, "포획된 전하량 분석을 통한 planar 구조와 gate-all-around (GAA) 구조의 SONOS 낸드 플래시 메모리특성 비교," 대한전자공학회 추계학술대회, pp. 90-93, Nov. 2013

[226] Hyungjin Kim, Jungjin Park, Min-Chul Sun, Do-Bin Kim, and Byung-Gook Park, "Sensitization characteristics of silicon-based floating-body synaptic transistor (SFST)," NANO Korea, pp. -, Jul. 2013

[225] Sungjun Kim, Sunghun Jung, and Byung-Gook Park, "플라스마 화학기상증착을 사용한 실리콘질화막 기반 저항메모리의 양극성저항스위칭 특성에 대한 연구," 하계종합학술대회, pp. 265-266, Jul. 2013

[224] Jieun Lee, Jung Han Lee, Mihee Uhm, Won Hee Lee, Jung Han Lee, Seonwook Hwang, Bong Sik Choi, Byung-Gook Park, Dong Myong Kim, and Dae Hwan Kim, "Implementation and characterization of gate-induced drain leakage current-based multiplexed SiNW biosensor," 한국반도체학술대회, pp. 1-2, Feb. 2013

[223] Sungjun Kim, Sunghun Jung, Kyung-Chang Ryoo, Jeong-Hoon Oh, and Byung-Gook Park, "Effects of forming voltage in Pt/Si3N4/p+-Si RRAM devices," 한국반도체학술대회, pp. WP1-23-, Feb. 2013

[222] Won Hee Lee, Jin-Moo Lee, Mihee Uhm, Jieun Lee, Jung Han Lee, Hagyoul Bae, Euiyoun Hong, Seonwook Hwang, Yun Hyeok Kim, Bong Sik Choi, Byung-Gook Park, Dong Myong Kim, Yong-Joo Jeong, and Dae Hwan Kim, "Characterization of subthreshold slope degradation in CMOS-based silicon nanowire biosensors," 한국반도체학술대회, pp. 1-2, Feb. 2013

[221] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, Sang-Ho Lee, and Byung-Gook Park, "Channel selection by multi level operation of string select line in 3D channel stacked NAND flash memory array," 한국반도체학술대회, pp. WE3-K-3-, Feb. 2013

[220] Jong-Ho Bae, MoonGyu Jang, Chan Hyeong Park, Byung-Gook Park, and Jong-Ho Lee, "Characterization of low frequency noise in PtSi Source/Drain schottky barrier junction SOI MOSFETs," Korean Conference on Semiconductors, pp. 187-, Feb. 2013

[219] Jung-Kyu Lee, Byeong-In Choe, Jinwon Park, Sung-Woong Chung, Jae Sung Roh, Sung-Joo Hong, Byung-Gook Park, and Jong-Ho Lee, "Cell area effect on read failure problem disturbing nonvolatile memory applications of conductive filament-type resistive switching memory devices," Korean Conference on Semiconductors, pp. 220-, Feb. 2013

[218] Byeong-In Choe, Changseok Kang, Youngwoo Park, Woonkyung Lee, Byung-Gook Park, and Jong-Ho Lee, "Analysis of stress-induced traps generation on random telegraph noise for TANOS(TaN-Al2O3-Si3N4-SiO2-si) NAND flash memories," Korean Conference on Semiconductors, pp. 195-, Feb. 2013

[217] Junil Lee, Hyungjin Kim, Min-Chul Sun, Sang-Ho Lee, Seunghyun Kim, Jungjin Park, and Byung-Gook Park, "Tunneling field-effect transistor (TFET) 에서 body의 두께가 소자 특성에 미치는 영향," 대한전자공학회 추계학술대회, pp. 7-9, Nov. 2012

[216] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, and Byung-Gook Park, "Study on the corner effect of L-shaped tunneling field-effect transistors," NANO Korea, pp. O1201_010-, Aug. 2012

[215] Jang Hyun Kim, Hyun Woo Kim, Min-Woo Kwon, and Byung-Gook Park, "비대칭 MOSFET 소자에서 gate oxide의 re-oxidation process의 공정방법 및 효과," 하계종합학술대회, pp. 118-120, Jun. 2012

[214] Garam Kim, Jang Hyun Kim, Euyhwan Park, Joong-Kon Son, Donghoon Kang, Hyungcheol Shin, and Byung-Gook Park, "비정상적인 I-V 특성을 보이는 GaN LED 소자에 대한 전기적, 광학적 분석," 하계종합학술대회, pp. 144-145, Jun. 2012

[213] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, and Byung-Gook Park, "가상 Source/Drain을 갖는 NAND 플래시 메모리에서 gate length 변동에 의한 문턱 전압 및 On-cell 전류 변동을 완화시키는 방법에 관한 연구," 하계종합학술대회, pp. 48-49, Jun. 2012

[212] Sang Wan Kim, Woo Young Choi, Min-Chul Sun, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "터널링 장벽의 폭이 터널링 전계 효과 트랜지스터의 특성에 미치는 영향에 대한 연구," 하계종합학술대회, pp. 138-141, Jun. 2012

[211] Min-Woo Kwon, Hyungjin Kim, Sang-Ho Lee, and Byung-Gook Park, "Virtual source / drain을 사용한 NAND flash memory의 planar와 FinFET 구조에 따른 short channel effect 분석," 하계종합학술대회, pp. 50-51, Jun. 2012

[210] Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, Sungjun Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Pt/Cu/TiO2/Pt 기반의 저항 변화 메모리 (RRAM)에서 다중 레벨 셀 동작을 구현하기 위한 방법," 하계종합학술대회, pp. 142-143, Jun. 2012

[209] Sang-Ho Lee, Min-Woo Kwon, Mi-Rae Kim, Seunghyun Jang, Hyungcheol Shin, and Byung-Gook Park, "Polycrystalline-Si thin film transistor에서 density of states 분포가 전달 특성에 미치는 영향," 하계종합학술대회, pp. 121-122, Jun. 2012

[208] Euyhwan Park, Garam Kim, Jang Hyun Kim, Sang Wan Kim, Joong-Kon Son, Donghoon Kang, and Byung-Gook Park, "GaN 발광 다이오드의 ITO층 습식식각 공정에 따른 cathodoluminescene 이미지 분석," 하계종합학술대회, pp. 77-78, Jun. 2012

[207] Wandong Kim, Seunghyun Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, and Byung-Gook Park, "Layer Selection by Multi Level Operation (LSM) of String Select Line in 3D Stacked NAND Flash Memory," Korean Conference on Semiconductors, pp. 473-474, Feb. 2012

[206] Hyun Woo Kim, Jung Han Lee, Min-Chul Sun, and Byung-Gook Park, "Investigation on Suppression of Nickel-Silicide Formation By Fluorocarbon Reactive Ion Etch (RIE) and Plasma-Enhanced Deposition," Korean Conference on Semiconductors, pp. 388-389, Feb. 2012

[205] Kyung Wan Kim, Jung Han Lee, Kwon-Chil Kang, and Byung-Gook Park, "Investigation of Logic Circuit with Vertical Type Single-Electron Transistor," Korean Conference on Semiconductors, pp. 51-52, Feb. 2012

[204] Min-Chul Sun, Hyungjin Kim, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Ground-Plane Doping for VT-modulation of Planar Tunnel Field-Effect Transistors on Ultra-Thin-Body and BOX (UTBB) SOI Substrate," Korean Conference on Semiconductors, pp. 123-124, Feb. 2012

[203] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, Do-Bin Kim, Seunghyun Kim, and Byung-Gook Park, "Erase Speed Enhancement by Using SiGe Drain in 3D Stacked NAND Flash Memory," Korean Conference on Semiconductors, pp. 475-476, Feb. 2012

[202] Jieun Lee, Jung Han Lee, Hyeri Jang, Mihee Uhm, , , Byung-Gook Park, In-Young Chung, Dong Myong Kim, and Dae Hwan Kim, "CMOS-Compatible Inverter-Type Si Nanoribbon Biosensor with High Sensitivity," Korean Conference on Semiconductors, pp. 435-436, Feb. 2012

[201] Sungjun Kim, Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "고집적화, 저전력 적용을 위한 단극성 저항-스위치 메모리 (RRAM)에서 열처리를 통한 전류전달 메커니즘 분석," 대한전자공학회 추계학술대회, pp. 133-134, Nov. 2011

[200] Sunghun Jung, Jeong-Hoon Oh, Sungjun Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "전기장 집중효과를 이용한 RRAM에서 계면 각도에 따른 전기장 세기의 의존성," 대한전자공학회 추계학술대회, pp. 141-142, Nov. 2011

[199] Yoon Kim, Se Hwan Park, Wandong Kim, Joo Yun Seo, and Byung-Gook Park, "3차원 적층 NAND 플래시 메모리의 설계 및 특성 분석," 대한전자공학회 추계학술대회, pp. 129-132, Nov. 2011

[198] Wandong Kim, Yoon Kim, Se Hwan Park, Joo Yun Seo, and Byung-Gook Park, "Variation of Threshold Voltage and ON Cell Current induced by Word Line Length Fluctuation with Technology Node Scaling in Virtual Source/Drain NAND Flash Memory," NANO Korea, pp. P1101_177-P1101_177, Aug. 2011

[197] Garam Kim, Jang Hyun Kim, Euyhwan Park, Joong-Kon Son, Daeyoung Woo, Sang Wan Kim, Min-Chul Sun, Hyun Woo Kim, and Byung-Gook Park, "Optical and Electrical Degradation of GaN LED by Thermal stress," NANO Korea, pp. P1101_178-P1101_178, Aug. 2011

[196] Dong Hua Li, Se Hwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Modulated Charge Storage Layer by Adopting Ge-Doping Method for SONOS Flash Memory Application," NANO Korea, pp. P1101_195-P1101_195, Aug. 2011

[195] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Interface-Modified Unipolar Resistive Random Access Memory (RRAM) Structure for Low Power Application," NANO Korea, pp. P1101_061-P1101_061, Aug. 2011

[194] Jung Han Lee, Jieun Lee, Dae Hwan Kim, and Byung-Gook Park, "Fabrication of Silicon Nanowire FETs for Biosensor Application," NANO Korea, pp. P1105_011-P1105_011, Aug. 2011

[193] Kyung-Chang Ryoo, Jeong-Hoon Oh, Sunghun Jung, Hongsik Jeong, and Byung-Gook Park, "Dimensional Effect of Non-polar Resistive Random Access Memory (RRAM) for Low Power Application," NANO Korea, pp. P1101_059-P1101_059, Aug. 2011

[192] Min-Chul Sun, Garam Kim, Sang Wan Kim, Hyun Woo Kim, Hyungjin Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Co-Integration of Nano-scale Vertical- and Horizontal-Channel MOSFETs for Low Power CMOS Technology," NANO Korea, pp. O1101_010-O1101_010, Aug. 2011

[191] Hyun Woo Kim, Hyungjin Kim, Sang Wan Kim, Min-Chul Sun, Garam Kim, Euyhwan Park, Jang Hyun Kim, and Byung-Gook Park, "A Novel Fabrication Method for Nanoscale Tunneling Field-Effect Transistor," NANO Korea, pp. O1102_006-O1102_006, Aug. 2011

[190] Dong Hua Li, Se Hwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "서로 다른 게이트 물질에 의존하는 전하 트랩 플래시 메모리 소자의 프로그램/지우기 특성," 하계종합학술대회, pp. 458-459, Jun. 2011

[189] Jang Hyun Kim, Do-Bin KIm, Hyun Woo Kim, and Byung-Gook Park, "MIS Capacitance Model Structure을 이용한 HfInZnO Thin Film Transistors의 Capacitance-Voltage 특성분석," 하계종합학술대회, pp. 531-533, Jun. 2011

[188] Euyhwan Park, Garam Kim, Jang Hyun Kim, Sang Wan Kim, Joong-Kon Son, Daeyoung Woo, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "GaN 발광 다이오드의 전류 포화 지연현상 분석," 하계종합학술대회, pp. 461-462, Jun. 2011

[187] Joo Yun Seo, Yoon Kim, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Compact Bit-line STacked ARray(STAR)," 하계종합학술대회, pp. 358-359, Jun. 2011

[186] Joung-Eob Lee, Jung Han Lee, Kwon-Chil Kang, and Byung-Gook Park, "Single-Electron transistors with extending channel for reducing MOSFET current," 한국반도체학술대회, pp. 516-517, Feb. 2011

[185] Jang Hyun Kim, Hyun Woo Kim, Jae Chul Park, Chang Jung Kim, and Byung-Gook Park, "Photo-Enhanced recovery characteristics in HfInZnO thin film transistors," 한국반도체학술대회, pp. 719-720, Feb. 2011

[184] Nam-Hoon Kim, Hyungcheol Shin, Byung-Gook Park, Young June Park, and Jong-Ho Lee, "Simulation Study on Simple Bio-sensor for Detecting Upside-Down Bonded DNA," Korean Conference on Semiconductors, pp. 853-854, Feb. 2011

[183] Chang-Hee Kim, Hyun-jong Chung, Jinseong Heo, Heejun Yang, Sunae Seo, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "Gas Sensing Characterization of Bottom-Gate Graphene FETs Prepared by Using ICP-CVD Method," Korean Conference on Semiconductors, pp. 645-646, Feb. 2011

[182] Hyun Woo Kim, Sang Wan Kim, Min-Chul Sun, Garam Kim, Dae Woong Kwon, Jisoo Chang, Jang Hyun Kim, Euyhwan Park, and Byung-Gook Park, "터널링 전계효과 트랜지스터의 양극성 현상을 줄이기 위한 공정 방법," 대한전자공학회 추계학술대회, pp. 46-47, Nov. 2010

[181] Won Bo Shim, Se Hwan Park, Jung Hoon Lee, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Wandong Kim, and Byung-Gook Park, "적층형 낸드 플래시 메모리에서 절연막 두께에 따른 게이트 간의 누설 전류에 관한 연구," 대한전자공학회 추계학술대회, pp. 32-33, Nov. 2010

[180] Garam Kim, Sang Wan Kim, Kyung-Chang Ryoo, Jeong-Hoon Oh, Min-Chul Sun, Hyun Woo Kim, Dae Woong Kwon, Jisoo Chang, Sunghun Jung, Jang Hyun Kim, and Byung-Gook Park, "Split gate structure 1T DRAM for improving retention characteristics," NANO Korea, pp. 1034-1034, Aug. 2010

[179] Jung Han Lee, Joung-Eob Lee, Kwon-Chil Kang , and Byung-Gook Park, "Single Electron Transistor with P-type Sidewall Spacer Gates," NANO Korea, pp. 1021-1021, Aug. 2010

[178] Dong Hua Li, Sunghun Jung, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Shallow-Trap-Assisted PGM/ERS Behaviors for Charge Trap Flash," NANO Korea, pp. 1018-1018, Aug. 2010

[177] Jang-Gn Yun, Yoon Kim, Se Hwan Park, Jong-Ho Lee, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Vertical Crosstalk Phenomenon (VCP) Among Neighboring Cells in 3D Stacked NAND Flash Memory," 하계 종합 학술발표회 논문집, pp. 716-718, Jun. 2010

[176] Sunghun Jung, Jeong-Hoon Oh, Kyung-Chang Ryoo, Se Hwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Variation of Switching Characteristics Dependent on Contact Area in Unipolar Resistive-Switching Random Access Memory (RRAM)," 하계 종합 학술발표회 논문집, pp. 699-700, Jun. 2010

[175] Yoon Kim, Jang-Gn Yun, Se Hwan Park, Wandong Kim, and Byung-Gook Park, "Study of 3-dimentional stacked vertical NAND falsh memory," 하계 종합 학술발표회 논문집, pp. 730-733, Jun. 2010

[174] Min-Chul Sun, Sang Wan Kim, Garam Kim, Hyun Woo Kim, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "Short-Channel Characteristics of Tunneling Field-Effect Transistor and Operation of Vertical-Channel Tunneling Field-Effect Transistor," 하계 종합 학술발표회 논문집, pp. 727-729, Jun. 2010

[173] Gil Sung Lee, Yoon Kim, and Byung-Gook Park, "Research of Memory Characteristics of GAA(Gate All Around) and DG(Double Gate) Type Bit Line Stacked Array," 하계 종합 학술발표회 논문집, pp. 714-715, Jun. 2010

[172] Se Hwan Park, Won Bo Shim, Seongjae Cho, Jung Hoon Lee, and Byung-Gook Park, "Optimization Design of Folded Split Gate Flash Memory," 하계 종합 학술발표회 논문집, pp. 477-478, Jun. 2010

[171] Doo-Hyun Kim, Yoon Kim, Gil Sung Lee, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, and Byung-Gook Park, "Investigation of Width Dependent Retention Characteristics with GAA(Gate-All-Around) SONOS structure," 하계 종합 학술발표회 논문집, pp. 483-484, Jun. 2010

[170] Wandong Kim, Dae Woong Kwon, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, Jung Hoon Lee, Yoon Kim, Doo-Hyun Kim, Gil Sung Lee, Se Hwan Park, Won Bo Shim, and Byung-Gook Park, "Investigation of Current Degradation Induced by Silicide Source/Drain in the nanowire NAND Flash Memory," 하계 종합 학술발표회 논문집, pp. 489-490, Jun. 2010

[169] Jung Hoon Lee, Wandong Kim, Gil Sung Lee, Won Bo Shim, and Byung-Gook Park, "Fabrication of Arch SONOS Flash Memory Array," 하계 종합 학술발표회 논문집, pp. 583-584, Jun. 2010

[168] Jung Han Lee, Won Bo Shim, Kwon-Chil Kang, Joung-Eob Lee, Kyung Wan Kim, and Byung-Gook Park, "Dual-Gate Single Electron Transistor with SONOS Structure Able to Control Oscillation Phase," 하계 종합 학술발표회 논문집, pp. 667-668, Jun. 2010

[167] Sang Wan Kim, Garam Kim, Won Bo Shim, Min-Chul Sun, Hyun Woo Kim, Dae Woong Kwon, Jisoo Chang, Jang Hyun Kim, Euyhwan Park, Jong-Ho Lee, Hyungcheol Shin, and Byung-Gook Park, "1T DRAM Cell with Twin Gates and Recessed Channel," 하계 종합 학술발표회 논문집, pp. 723-724, Jun. 2010

[166] Doo-Hyun Kim, Gil Sung Lee, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Shim, Wandong Kim, and Byung-Gook Park, "VT decay mechanisms in SONOS flash memory retention mode including trapped charge redistribution effect," Korean Conference on Semiconductors, pp. 485-486, Feb. 2010

[165] Yongmin Kwon, Jaehong Lee, Yeonsung Kang, Byung-Gook Park, and Hyungcheol Shin, "Two-Dimensional electrostatic potential model for twin silicon nano wire MOSFETs (TSNWFETs)," Korean Conference on Semiconductors, pp. 437-438, Feb. 2010

[164] Jang-Gn Yun, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Yoon Kim, Dong Hua Li, Se Hwan Park, Won Bo Shim, Garam Kim, and Byung-Gook Park, "Three Dimensional Stacked Bit-line NAND Flash Array and Inter-layer Interference," Korean Conference on Semiconductors, pp. 53-54, Feb. 2010

[163] Seongjae Cho, Jung Hoon Lee, Won Bo Shim, Se Hwan Park, and Byung-Gook Park, "One-Time Programmable Nonvolatile Memory Device and Its Array Based on Metal-Insulator-Semiconductor Structure: Operation and Fabrication Method," Korean Conference on Semiconductors, pp. 286-287, Feb. 2010

[162] Junghwan Ji, Syed Atif Pervez, Byung-Gook Park, Jong-Ho Lee, and Hyungcheol Shin, "Modeling of Vth Shift of Gate-All-Around SONOS Flash Memory," Korean Conference on Semiconductors, pp. 481-482, Feb. 2010

[161] Younghwan Son, Taewook Kang, Sunyoung Park, Byung-Gook Park, Jong-Ho Lee, and Hyungcheol Shin, "Investigation of capture and emission process dependency between individual traps from complex RTS Noise," Korean Conference on Semiconductors, pp. 578-579, Feb. 2010

[160] Jang-Gn Yun, Il Han Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Fluctuation-Robust Extended Word-line and Extended Bit-line (EWEB) NAND Flash Memory," Korean Conference on Semiconductors, pp. 284-285, Feb. 2010

[159] Jaehong Lee, Yongmin Kwon, Junghwan Ji, Jong-Ho Lee, Byung-Gook Park, and Hyungcheol Shin, "Drain Bias Effect on Quasi-Ballistic Transport in Ultra-Short Channel MOSFETs," Korean Conference on Semiconductors, pp. 435-436, Feb. 2010

[158] Jaeho Lee, Jaehong Lee, Byung-Gook Park, Jong Duk Lee, and Hyungcheol Shin, "De-embedding accuracy for interconnection variation," Korean Conference on Semiconductors, pp. 252-253, Feb. 2010

[157] Wandong Kim, Jung Hoon Lee, Seongjae Cho, Jang-Gn Yun, Se Hwan Park, Yoon Kim, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Won Bo Shim, and Byung-Gook Park, "Arch SONOS NAND Flash Memory Array with Improved Virtual Source and Drain Performance Due to the Field Concentration Effect," Korean Conference on Semiconductors, pp. 55-56, Feb. 2010

[156] Yeonsung Kang, Younghwan Son, Jaeho Lee, Heesang Kim, Byung-Gook Park, Jong-Ho Lee, and Hyungcheol Shin, "A Surface Potential Model for Recessed Channel MOSFETs in Strong Inversion," Korean Conference on Semiconductors, pp. 576-577, Feb. 2010

[155] Ju-Wan Lee, Min-Kyu Jeong, Hyuck-In Kwon, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "3-D stacked NAND Flash String with Single-Crystal Si Channel by Adopting Si/SiGe Selective Etch Process," Korean Conference on Semiconductors, pp. 280-281, Feb. 2010

[154] Min-Kyu Jeong, Ju-Wan Lee, Byung-Gook Park, Hyungcheol Shin, and Jong-Ho Lee, "3-D Stacked NAND Flash String with Common Gate Structure by Adopting Si/SiGe Selective Etch Process," Korean Conference on Semiconductors, pp. 13-14, Feb. 2010

[153] 심원보, 이정한, 조성재, 윤장근, 이정훈, 이동화, 이길성, 김두현, 김윤, 박세환, 김완동, 박병국, "3차원 구조의 차단 게이트를 이용한 2-비트 낸드플래시 메모리의 pinch-off 현상에 따른 최적 읽기 구동 방법", 2009 IEEK fall conference, Seoul, Korea, pp.49-50, Nov. 28, 2009.

[152] 조성재, 심원보, 이정훈, 박세환, 박병국, "FinFET에 기반한 낸드 플래시 메모리 소자에서의 채널 길이 및 핀 폭에 대한 채널 전위 자가부양 의존성", 2009 IEEK fall conference, Seoul, Korea, pp.51-52, Nov. 28, 2009.

[151] 이동화, 박일한, 윤장근, 이정훈, 김두현, 이길성, 김윤, 박세환, Syed Atif Pervez, 박병국, "Bandgap Engineering 도입하여 향상된 홀 터널링 특성을 구현한 SONOS 플래쉬 메모리 소자", 2009 IEEK Summer conference, Jeju, Korea, pp. 393-394, July 8-10, 2009.

[150] 김가람, 김상완, 송재영, 김종필, 오정훈, 유경창, 김현우, Atteq-ur-Rehman, 박병국, "1T DRAM을 위한 Block Refresh (Autonomous Refresh) 방법의 최적화", 2009 IEEK Summer conference, Jeju, Korea, pp. 385-386, July 8-10, 2009.

[149] 이길성, 김윤, 박병국, "고집적 원통형 구조의 전계 특성에 대한 연구", 2009 IEEK Summer conference, Jeju, Korea, pp. 389-390, July 8-10, 2009.

[148] 윤장근, 박세환, 박일한, 이종덕, 박병국, "실리콘 게르마늄의 선택적 습식 식각에 대한 연구", 2009 IEEK Summer conference, Jeju, Korea, pp. 383-384, July 8-10, 2009.

[147] 조성재, 김상완, 손영환, 박일한, 김종필, 신형철, 박병국, "커패시턴스 측정을 통한 부정형 접합을 갖는 pn 접합의 유효 접합 면적 및 반송자 수명의 추출", 2009 IEEK Summer conference, Jeju, Korea, pp. 399-400, July 8-10, 2009.

[146] 심원보, 조성재, 박일한, 박병국, "3차원 구조의 차단 게이트를 이용한 2-비트 낸드플래시 메모리의 최적 설계", 2009 IEEK Summer conference, Jeju, Korea, pp. 391-392, July 8-10, 2009.

[145] 김완동, 이동화, 박일한, 조성재, 윤장근, 이정훈, 김윤, 김두현, 이길성, 박세환, 박병국, "실리콘 몸체 두께 변동이 가상 Source/Drain을 갖는 Double Gate NAND 플래시 메모리에 미치는 영향", 2009 IEEK Summer conference, Jeju, Korea, pp. 387-388, July 8-10, 2009.

[144] 김윤, 이길성, 조성재, 박일한, 윤장근, 이정훈, 이동화, 김두현, 심원보, 김완동, 박병국, "Virtual Source/Drain을 가지는 Folded NAND Flash Memory 영향", 2009 IEEK Summer conference, Jeju, Korea, pp. 397-398, July 8-10, 2009.

[143] Daewoong Kang, Sungnam Chang, Junghoon Lee, Ilhan Park, Seunggun Seo, Gideok Kwon, Kyungmi Bae, Inyoung Kim, Eunjung Lee, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “Improving the cell characteristics and reduction of RTS noise using field concentration effect of arch-active profile in 4 gbits NAND flash array having 60 nm design rule,” 한국 반도체 학술대회, Feb. 2009

[142] Jaehong Lee, Yeonam Yoon, Jung Han Choi, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “The modeling of metal layers and vias in RF MOSFET for accurate circuit design,” 한국 반도체 학술대회, Feb. 2009

[141] Heesang Kim, Kyungdo Kim, Tae-Kyung Kim, Seon-Yong Cha, Sung-Joo Hong, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “A simple threshold voltage model for saddle-fin transistor,” 한국 반도체 학술대회, Feb. 2009

[140] Junsoo Kim, Seungwon Yang, Jaehong Lee, Youngmin Kwon, Sung Dae Suk, Kangil Seo, Donggun Park, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “Room temperature carrier transport characteristics in twin silicon nanowire MOSFETs,” 한국 반도체 학술대회, Feb. 2009

[139] Youngmin Kwon, Junsoo Kim, Sung Dae Suk, Dong-Won Kim, Donggun Park, Kyungseok Oh, Byung-Gook Park, Jong Duk Lee and Hyungcheol Shin, “I-V modeling for twin silicon nano wire MOSFETs (TSNWFETs) including channel-length modulation and velocity saturation,” 한국 반도체 학술대회, Feb. 2009

[138] Dong-Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jung Han Lee, Sang Hyuk Park, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Oscillation Period Reduction Scheme in SET Circuit Applications", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 28-29, Feb. 18-20, 2009.

[137] Seongjae Cho, Yoon Kim, Se Hwan Park, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park, "Highly Scalable Three-Dimensional Two-Bit NAND-Type Flash Memory Device with Additional Cut-off Gate", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 20-21, Feb. 18-20, 2009.

[136] Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Doo-Hyun Kim, Yoon Kim, Dong-Hua Lee, Se-Hwan Park, Won-Bo Sim, Wandong Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "Multi-Bit Gated-Diode Flash Memory", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 300-301, Feb. 18-20, 2009.

[135] 김윤, 윤장근, 박일한, 조성재, 이정훈, 이동화, 김두현, 이길성, 심원보, 김완동, 신형철, 박병국, "PCI Phenomenon for Sub 30nm Vertical Multi-bit SONOS Flash Memory", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 535-536, Feb. 18-20, 2009.

[134] 이정훈, 조성재, 박일한, 윤장근, 이동화, 김두현, 이길성, 김윤, 박병국, "PCI Consideration of Multiple Dielectric Layer's Equivalent Oxide Thickness(EOT) in a Cylindrical Structure", The 16th Korean Conference on Semiconductors, Deajeon, Korea, pp. 746-747, Feb. 18-20, 2009.

[133] 조성재, 윤장근, 김윤, 이동화, 이종덕, 박병국, "채널 길이와 도핑 농도에 따른 낸드 플래시 메모리 소자의 결합비 의존성 연구," 2008 IEEK Fall Conference, Seoul, Korea, pp.381-382, November 29, 2008.

[132] 윤장근, 박일한, 조성재, 이정훈, 이길성, 김두현, 김윤, 이동화, 박세환, 심원보, 김완동, 신형철,이종덕, 박병국, "적층된 수직 채널 NOR 플래시 메모리의 비선택 비트라인 전위 부양 효과," 2008 IEEK Fall Conference, Seoul, Korea, pp.389-390, November 29, 2008.

[131] 이정업, 강권칠, 양홍선, 이정한, 이동섭, 박상혁, 신형철,이종덕, 박병국, "DG-SET 성능 향상을 위한 공정 방법," 2008 IEEK Fall Conference, Seoul, Korea, pp.391-392, November 29, 2008.

[130] 조성재, 박일한, 이정훈, 손영환, 이종덕, 신형철, 박병국, " SOI (Silicon-on-Insulator) 기반의 비휘발성 메모리 소자의 부분공핍 및 완전공핍 상태에서의 프로그램 효율," 대한전자공학회 하계종합학술대회, 평창, pp.395-396, June 18-20, 2008.

[129] Dae Woong Kang, Seungwon Yang, Hochul Lee, Bongchan Kim, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "The drain voltage dependence of RTS noise in flash memory having the floating gate", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.147-148, Feb. 20-22, 2008

[128] Jaehong Lee, Jiwon Chang, Junsoo Kim, Juhwan Jung, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Silicon resistive probe with improved resolution", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.781-782, Feb. 20-22, 2008

[127] Yeonam Yoon, Jongwook Jeon, Jaehong Lee, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "RF modeling of ultra-short-channel MOSFETs in subthreshold region", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.399-400, Feb. 20-22, 2008

[126] Younghwan Son, Seungwon Yang, Bongchan Kim, Jinho Kim, Chang-Rok Moon, Duckhyung Lee, Jong Duk Lee, Byung-Gook Park, Hyungcheol Shin, "Extraction of interface states energy profile by using high frequency charge pumping technique in pure and remote plasma nitrided oxides", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.631-632, Feb. 20-22, 2008

[125] Junsoo Kim, Jaehong Lee, Yeonam Yoon, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin, "Extraction of effective carrier velocity and observation of velocity overshoot in sub-40 nm MOSFETs", The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp.627-628, Feb. 20-22, 2008

[124] Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Dong Hua Lee, Se-Hwan Park, Won Bo Sim, Jong-Duk Lee, and Byung-Gook Park, "Double-Recessed channel (DRC) flash memory," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 49-50, Feb. 20-22, 2008.

[123] Keum-Dong Jung, Yoo Chul Kim, Byeong-Ju Kim, Byung-Gook Park, Hyungcheol Shin, and Jong Duk Lee, "I-V equation for the linear region operation of thin-film transistors," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 839-840, Feb. 20-22, 2008.

[122] Dong-Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Sangwoo Kang, Joung-Eob Lee, Jung Han Lee, Sang Hyuk Park and Byung-Gook Park, "Design and Simulation of Single-Electron Transistor (SET) with Electrical Tunneling Barriers," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 161-162, Feb. 20-22, 2008.

[121] Se Hwan Park, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, SeongJae Cho, Dong Hua Li, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, Byung-Gook Park, "Design and Simulation of Folded Split Gate SONOS Memory," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 437-438, Feb. 20-22, 2008.

[120] Han Ki Chung, Yeun Seung Lee, Hoon Jeong, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park, "A Capacitor-less 1T-DRAM Cell with Vertical Double Gates Using Gate-Induced Drain-Leakage (GIDL) Current for High Sensing Margin," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 413-414, Feb. 20-22, 2008.

[119] Gil Sung Lee, Jung Hoon Lee, Il Han Park, Seong-Jae Cho, Jang-Gn Yun, Doo Hyun Kim, Dong Hua Li, Yoon Kim, Se Hwan Park, Won Bo Sim, Jong Duk Lee and Byung-Gook Park, "Fabrication of Cone SONOS Memory for Better Program/Erase Characteristics," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 55-56, Feb. 20-22, 2008.

[118] 이정업, 김종필, 강상우, 양홍선, 이동섭, 박재현, 강권칠, 이정한, 신형철, 이종덕, 박병국, "Simulation of Dual Gate Single-Electron Transistor for Performance Improvement," The 15th Korean Conference on Semiconductors, Pyeongchang, Korea, pp. 159-160, Feb. 20-22, 2008.