SKILLS

ASIC Design, Verification, & VLSI

• Hardware Languages: SystemVerilog (SV), Verilog-A, VHDL, Verilog

• Methodologies: Analog/Mixed-Signal (AMS) Verification, Testbench Development, Digital/Custom RTL Design, Analog Layout

• Specialized Circuits:  Neuromorphic Circuits, different SRAM architectures (6T, 8T, 10T), Various Analog Circuits (including Low Dropout Regulators (LDOs), Strong-Arm Latch, ADCs, DACs)

• Technology Nodes: Hands-on experience with CMOS process nodes from 180nm Planar  down to 14nm FinFET

• Hands-on-Hardware: FPGA (ZYBO, Nexys4), STM32, Arduino, DSO

EDA Tools & Simulation Platforms

• Circuit Simulation: Cadence Virtuoso (Schematic/Layout), Spectre, ADE-L/XL, HSPICE, ng-SPICE, LT-SPICE, Tanner-SPICE

• FPGA/Synthesis: Xilinx Vivado, ModelSim

• Layout: Cadence Layout-XL DRC/LVS

• Physical Design Verification: Cadence Genus, Innovus, Tempus

• Device Modelling:  Synopsis Sentaurus TCAD

• Modeling/Analysis: MATLAB and Simulink (for system-level modeling and statistical analysis)

Core Research & Analysis

• Key Areas: Neuromorphic Computing, SRAM-Based In-Memory Computing (IMC), Non-Volatile Memory (NVM) Architectures

• Analysis: CMOS Reliability Analysis (Aging, BTI, Hot Carrier Injection), Statistical Analysis (Monte Carlo), Process Variation Modeling

• System-Level: Architecture Exploration, Energy-Efficient Circuit Design

Programming, Data, & Documentation

• Programming: Python (Data analysis, automation scripting), C/C++

• Scripting: Shell Scripting (Bash), TCL

• Documentation: LaTeX (for thesis and publication preparation), Microsoft Office Suite