• Investigating various SRAM-based In-Memory computing (IMC) system available in the literature

• Developing a configurable In-memory computing architecture which includes Logic functionality and Content

addressable memory (CAM)

• Proposing an energy-efficient and reliability-aware configurable SRAM-based IMC architecture

• Investigated the impact of CMOS reliability and process variability issues on various neuromorphic circuits 

• Proposed the mitigation technique for minimizing the degradation of circuit performance after lifetime 

• Designed and proposed a reliability-aware programmable memory Neuromorphic system

• Investigated the impact of BTI and HCI on conventional temporal neuromorphic encoder

• Formulated a mathematical model between image pixels intensity and the inter-spike-intervals (ISIs) for image encoding

• Designed and proposed an energy-efficient and reliability-aware Temporal Neuromorphic Encoder

• Comprehended various SRAM metrics obtained from distinguished measurement techniques

• Investigated the impact of data-dependent BTI degradation under continuous/non-continuous gate bias along with process variability on these SRAM metrics

• Retrieved and generated NBTI variability of experimental data from different semiconductor industries

• Investigated the impact of NBTI variability on FinFET SRAM stability