Design and evaluation of innovative SRAM-based In-Memory computing architectures for ADAS applications. Focus includes in improving energy efficiency, lesser area and robust aging-aware IMC design.

Design and Implementation of Neuromorphic Circuits/Systems for Machine Learning applications with low-power and high speed. It also focuses on investigation of Process Variability and Aging-induced Reliability on these circuits (including Silicon Neurons and Silicon Synapse). Furthermore, an Reliability-aware Neuromorphic circuits/system designs are developed to minimize the circuit performance degradation after aging. 

Design and Implement of 6T, 8T, and 10T SRAM architecture for robust analysis at different technology nodes. Study of the impact of data-dependent BTI degradation under continuous/non-continuous gate bias along with process variability using SRAM metrics.

Study of reliability effects on various analog circuits (including Op-AMPS, ADCs, DACs, LDO, etc., ) at lower technology nodes. Design and implement of aging-aware analog circuits for different applications.