Current:
Computer Architecture & Systems
Hardware Security
GPU Memory Safety
Digital VLSI Design & FPGA-based systems
Past:
Hardware for Approximate Computing
GPU Security/Reliability
Let-Me-In:(Still) Employing In-pointer Bounds Metadata for Fine-grained GPU Memory Safety
Jaewon Lee, Euijun Chung, Saurabh Singh, Seonjin Na, Yonghae Kim, Jaekyu Lee, Hyesoon Kim
IEEE International Symposium on High Performance Computer Architecture (HPCA)
Approximate Computing
MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications
Vishesh Mishra, Sparsh Mittal, Saurabh Singh, Divy Pandey, Rekha Singhal
proceedings of the Great Lakes Symposium on VLSI (GLSVLSI) 2022, Irvine, CA, USA. DOI: 10.1145/3526241.3530384
AxLEAP: Enabling Low-Power Approximations Through Unified Power Format
Sagar Satapathy, Saurabh Singh, Vishesh Mishra, Divy Pandey, Kaustav Goswami, Dip Sankar Banerjee
IEEE International Symposium on Circuits & Systems (ISCAS-2022), Austin, Texas, USA.
ART-MAC: an Approximate Rounding and Truncation Based Mac Unit for Fault-Tolerant Applications
Vishesh Mishra, Divy Pandey, Saurabh Singh, Sagar Satapathy, Kaustav Goswami, Babita Jajodia, Dip Sankar Banerjee
IEEE International Symposium on Circuits & Systems (ISCAS-2022), Austin, Texas, USA.
EFCSA: An Efficient Carry Speculative Approximate Adder with Rectification
Saurabh Singh, Vishesh Mishra, Sagar Satapathy, Divy Pandey, Kaustav Goswami, Dip Sankar Banerjee, and Babita Jajodia
23rd International Symposium on Quality Electronic Design (ISQED-22), California, USA. DOI: 10.1109/ISQED54688.2022.9806249
HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications
Divy Pandey, Vishesh Mishra, Saurabh Singh, Sagar Satapathy, Babita Jajodia, and Dip Sankar Banerjee
23rd International Symposium on Quality Electronic Design (ISQED-22), DOI: 10.1109/ISQED54688.2022.9806220 Santa Clara, CA, USA.
SAM: a Segmentation Based Approximate Multiplier for Error Tolerant Applications
Divy Pandey, Saurabh Singh, Vishesh Mishra, Sagar Satapathy, and Dip Sankar Banerjee,
IEEE International Symposium on Circuits and Systems (ISCAS), 2021, Daegu, South Korea. DOI: 10.1109/ISCAS51556.2021.9401266 [Global Flagship Conference of IEEE Circuits and Systems (CAS)]. [paper] [Slides]
An Approximate Carry Estimating Simultaneous Adder with Rectification
Rajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, Kaustav Goswami, and Dip Sankar Banerjee.
Proceedings of 2020 on Great Lakes Symposium on VLSI (GLSVLSI '20). Association for Computing Machinery, New York, NY, USA, 139–144. DOI: 10.1145/3386263.3406928 [Best Paper Award - 2nd place] [paper] [slides]
HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications
Divy Pandey, Vishesh Mishra, Saurabh Singh, Sagar Satapathy, and Babita Jajodia
13th IEEE High-Performance Computing (HiPC), Student Research Symposium (SRS), 2021, Bangalore, India. [Best Poster Award] [link] [slides]
ACEP: An Accuracy-Configurable Carry Estimating Parallel Adder
Rajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, and Kaustav Goswami
12th HiPC Student Research Symposium (SRS), 2019, Hyderabad, India. [Best Poster Award] [link] [poster]
CEAPA: A Carry Estimating Approximate Parallel Adder
Vishesh Mishra, Divy Pandey and Saurabh Singh
Research Conclave, 2020 Edition, IIT Guwahati.