Luna-16
A 16-bit processor based on the eRISC ISA
Collaborators
Divy Pandey, ECE Dept, Indian Institute of Information Technology Guwahati
Vishesh Mishra, ECE Dept, Indian Institute of Information Technology Guwahati
Siddharth Rajawat, ECE Dept, Indian Institute of Information Technology Guwahati
Supervisors
Dr. Babita Jajodia, Assistant Professor, ECE Dept, Indian Institute of Information Technology Guwahati, India
Dr. Dip Sankar Banerjee, Assistant Professor, CSE Dept, Indian Institute of Technology Jodhpur, India
We Intend to open-source this project soon!
Sub-Projects
Luna-16
A 16-bit embedded class soft-core processor based on the eRISC ISA.
Luna is a 16-Bit RISC embedded class processor that is aimed towards microcontroller applications. Luna implements a novel 16-Bit Instruction Set Architecture (ISA) called eRISC. It is a non-pipelined processor that is implemented in Verilog HDL.
LunaSim
A simulator for the Luna-16 processor
LunaSim is a multi-threaded simulation program for the RTL simulation of Luna. It uses Verilator to compile RTL files into a backend object. LunaSim also features an interactive debugging mode that allows users to view register values and bus transactions in real-time as the code is being executed on the processor. It also supports the generation of VCD traces. for Embedded RISC) is a novel royalty-free 16-bit Instruction Set Architecture (ISA) that is set for catering to small-scale embedded applications. eRISC is a complete ISA with almost all the instructions that are found in industry-standard ISAs. eRISC is designed to have high code density and modular architecture.