Publications

Prashanth H C and Madhav Rao. 2022. "Evolutionary Standard Cell Synthesis of Unconventional Designs," In Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI '22). Association for Computing Machinery, New York, NY, USA, 189–192.  https://doi.org/10.1145/3526241.3530353

Open sourced resource : https://sites.google.com/view/evosynthesis/home

Prashanth H C, Soujanya S R, Bindu G Gowda, and Madhav Rao. 2022. "Design and Evaluation of In-Exact Compressor based Approximate Multipliers," In Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI '22). Association for Computing Machinery, New York, NY, USA, 431–436.  https://doi.org/10.1145/3526241.3530320

Open sourced resource : https://sites.google.com/view/approxmul/home

Prashanth H C and Madhav Rao. "Improving Digital Circuit Synthesis of Complex Functions using Binary Weighted Fitness and Variable Mutation Rate in Cartesian Genetic Programming," In Proceedings of the 14th International Joint Conference on Computational Intelligence - ECTA, ISBN 978-989-758-611-8; ISSN 2184-2825, pages 112-120. DOI: 10.5220/0011539000003332

https://doi.org/10.5220/0011539000003332 

Open sourced resource : https://sites.google.com/view/bwf-evar/home 

Prashanth H C and Madhav Rao. “SOMALib : Library of Exact and Approximate Activation Functions for Hardware efficient Neural Network Accelerator”. ICCD 2022.

https://doi.org/10.1109/ICCD56317.2022.00114 

This paper was also accepted as a poster presentation in DAC 2022.

Open sourced resource : 

https://sites.google.com/view/somalib/home 

Mayank Kabra, Prashanth H C and Madhav Rao. Design and Evaluation of Performance-efficient SoC-on-FPGA for Cloud-based Healthcare Applications.  2022 IEEE Nordic Circuits and Systems Conference (NorCAS), 2022, pp. 1-6, doi: 10.1109/NorCAS57515.2022.9934217.

https://doi.org/10.1109/NorCAS57515.2022.9934217 

S. K. Nandigama, H. C. Prashanth and M. Rao, "Design and Evaluation of Inexact Computation based Systolic Array for Convolution," 2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS), Quito, Ecuador, 2023, pp. 1-4, doi: 10.1109/LASCAS56464.2023.10108234.

https://doi.org/10.1109/LASCAS56464.2023.10108234

Open sourced resource :

https://sites.google.com/view/approxsystolic/home 

Prashanth H C, Sriniketh S S, Shrikrishna Hebbar, Chinmaye R and Madhav Rao. "SQRTLIB : Library of Hardware Square Root Designs,"  2023 24th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-5, doi: 10.1109/ISQED57927.2023.10129377.

https://doi.org/10.1109/ISQED57927.2023.10129377

Open sourced resource :

https://sites.google.com/view/sqrtlib/home

Bindu G Gowda, Prashanth H C and Madhav Rao.  "Error Diluted Approximate Multipliers Using Positive And Negative Compressors," 2023 24th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-7, doi: 10.1109/ISQED57927.2023.10129376.

https://doi.org/10.1109/ISQED57927.2023.10129376

Mayank Kabra, Prashanth H C, Kedar Deshpande and Madhav Rao. "HIE-DRAM: High Performance Efficient In-DRAM Computing Architecture for SIMD," 2023 24th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-7, doi: 10.1109/ISQED57927.2023.10129370.

https://doi.org/10.1109/ISQED57927.2023.10129370

Harshita Gupta, Mayank Kabra, Nitin Patwari, Prashanth H C and Madhav Rao. "Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA," 2023 24th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-9, doi: 10.1109/ISQED57927.2023.10129381.

https://doi.org/10.1109/ISQED57927.2023.10129381

Mayank Kabra, Prashanth H C, Kedar Deshpande and Madhav Rao. "eDRAM-OESP: A novel performance efficient in-embedded-DRAM-compute design for on-edge signal processing application," 2023 24th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-7, doi: 10.1109/ISQED57927.2023.10129307.

https://doi.org/10.1109/ISQED57927.2023.10129307

Bindu G Gowda, Prashanth H C, and Madhav Rao. "IMAC:: A Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate Unit," lier And Integrated Reduction Based Multiply-And-Accumulate Unit. In Proceedings of the Great Lakes Symposium on VLSI 2023 (GLSVLSI '23). Association for Computing Machinery, New York, NY, USA, 503–508.

 https://doi.org/10.1145/3583781.3590265

Open sourced resource : https://sites.google.com/view/integratedmac/home

Sai Karthik Nandigama, Bindu G Gowda, Prashanth H C, and Madhav Rao. "EBASA: Error Balanced Approximate Systolic Array Architecture Design ," In Proceedings of the Great Lakes Symposium on VLSI 2023 (GLSVLSI '23). Association for Computing Machinery, New York, NY, USA, 473–476.

 https://doi.org/10.1145/3583781.3590296

Open Sourced resource : https://github.com/saikarthik26/EBASA

Prashanth H C, Prashanth Jonna, and Madhav Rao. "CellFlow: Automated Standard Cell Design Flow ," 

Open Sourced resource : https://sites.google.com/view/cellflow/home

Raghava S N, Prashanth H C, Bindu G Gowda,  Pratyush Nandi, and Madhav Rao. "Design-Space Exploration of Multiplier Approximation in CNNs ," 

H C, P., Rao, M., Eledath, D. et al. Trainable windows for SincNet architecture.

J AUDIO SPEECH MUSIC PROC. 2023, 3 (2023).

https://doi.org/10.1186/s13636-023-00271-0

Open sourced resource :

https://sites.google.com/view/sincnet/home