OSS CAD Suite
Environment setup: source /home/prashanth/Desktop/oss-cad-suite/environment
yosys
OSS CAD Suite
Environment setup: source /home/prashanth/Desktop/oss-cad-suite/environment
yosys
from IPython.display import display, HTML
display(HTML("<style>.container { width:100% !important; }</style>"))
DNN neurosim1.3
conda activate dnnNeurosim1.3
librecell
source ./my-librecell-env/bin/activate
lclayout --output-dir /tmp/mylibrary --tech examples/dummy_tech.py --netlist examples/cells.sp --cell AND2X1
Siliconcompiler
source ./siliconcompiler/bin/activate
EdgeTPU
conda activate coral_edgetpu
Vitis-AI
UART :
dmesg | grep tty
sudo minicom -s
sudo minicom -D /dev/ttyUSB0
ifconfig eth0 192.168.140.239
ssh root@192.168.140.239
Vitis-AI :
./docker_run.sh xilinx/vitis-ai-gpu:latest
conda activate vitis-ai-pytorch
pip install ofa
pip install thop
pip install torchinfo
chmod o+w /opt/vitis_ai/conda/envs/vitis-ai-pytorch/lib/python3.7/site-packages/ofa/imagenet_classification/networks/resnets.py
vim :
:set number --- to enable line numbers
vim /opt/vitis_ai/conda/envs/vitis-ai-pytorch/lib/python3.7/site-packages/ofa/imagenet_classification/networks/resnets.py
--- at line 2: add the following
import torch
--- at line 28: modify the following
from: self.global_avg_pool = MyGlobalAvgPool2d(keep_dim=False)
to: self.global_avg_pool = nn.AdaptiveAvgPool2d(1)
--- after line 37: add new line 31 as the following
x = torch.flatten(x, start_dim=1, end_dim=-1)
:retab! 16
:w --- save
:q! --- exit
vim /opt/vitis_ai/conda/envs/vitis-ai-pytorch/lib/python3.7/site-packages/ofa/imagenet_classification/data_providers/imagenet.py
--- at line 20: modify the following
from: DEFAULT_PATH = '/dataset/imagenet'
to: DEFAULT_PATH = '/workspace/imagenet'
--- at line 183: modify the following
from: return os.path.join(self.save_path, 'train')
to: return os.path.join(self.save_path, 'val')
vim /opt/vitis_ai/conda/envs/vitis-ai-pytorch/lib/python3.7/site-packages/ofa/utils/my_dataloader/my_random_resize_crop.py
--- at line 86: change _pil_interpolation_to_str[self.interpolation] to
_pil_interpolation_to_str[2]
cd /workspace/examples/DPUCZDX8G/ofa_resnet50
mkdir models
jupyter notebook --no-browser --ip=0.0.0.0 --NotebookApp.token='' --NotebookApp.password=''
Genus Legacy
set_attr init_lib_search_path ../lib/
set_attr hdl_search_path ../rtl/
set_attr library slow_vdd1v0_basicCells.lib
read_hdl {}
set_attr syn_generic_effort high
set top_module sqrtA5
elaborate sqrtA5 -parameters {{WL 4}}
syn_generic
syn_map
syn_opt
mkdir -p ./reports/sqrtA5/
report_power > ./reports/sqrtA5/sqrtA5_4bit_power.txt
report_area > ./reports/sqrtA5/sqrtA5_4bit_area.txt
report_timing > ./reports/sqrtA5/sqrtA5_4bit_timing.txt
report_gates > ./reports/sqrtA5/sqrtA5_4bit_gates.txt
check_design > ./reports/sqrtA5/sqrtA5_4bit_design_check.txt
write_hdl > ./reports/sqrtA5/sqrtA5_4bit_hdl_synthesis.v
adapt
./docker/run_docker.sh
ScaleSim
python3 scale.py -c "./configs/scale.cfg" -t "./topologies/conv_nets/Resnet18.csv" -p "./output/"
Chipyard - Docker
sudo docker run -it ucbbar/chipyard-image bash
Nascaps
source activate nascaps
NVDLA docker
docker run -it -v /home/pan/Docker-nvdla:/Docker-nvdla -w /Docker-nvdla nvdla/vp
cp /Docker-nvdla/deploy.prototxt /usr/local/nvdla/
cp /Docker-nvdla/bvlc_alexnet.caffemodel /usr/local/nvdla/
cd /usr/local/nvdla/
./nvdla_compiler --prototxt deploy.prototxt --caffemodel bvlc_alexnet.caffemodel
export SC_SIGNAL_WRITE_CHECK=DISABLE
aarch64_toplevel -c aarch64_nvdla.lua
nvdla login: root
Password: nvdla
mount -t 9p -o trans=virtio r /mnt
cd /mnt
ls
insmod drm.ko
insmod opendla_1.ko
./nvdla_runtime --loadable ./fast-math.nvdla --image ./ILSVRC2012_val_00037719.JPEG --rawdump
poweroff
MAERI_bsv
export PATH=/opt/tools/bsc/latest/bin:$PATH
./MAERI -c all
./MAERI -r
./MAERI -v