CS534: Low Power Design

CS534: Low power design overview

Objective of the course:

A) To introduce the fundamental concepts about power/energy consumption and estimation,

B) To understand various approaches for minimization and optimizations of power.

C) To develop research aptitude in the area of VLSI Design

Course is intended to provide a system wide view of low-power/energy-efficient approaches.

Prerequisite:

Digital design (combination and sequential design)

UG, PG as well PhD students would be allowed to enroll. It is program elective for CS students and open elective for EE students,

Syllabus

Module 1 Introduction: Introduction to CMOS design, need of low power/energy efficient design

Module 2 Power modelling : Estimating power at circuit level, processor level, system level. Tools and techniques for power estimation. Example: McPAT, Cacti. Wattch, GPUWattch, XPE, NoC power, simplepower, DRAM Power calculator

Module 3 Logic level power optimizations: Clock gating, power gating, voltage and frequency scaling

Module 4 System level power optimizations: Communication/data transfer, memory optimizations (cache, main memory, secondary memory), power aware processor design, power aware ASIC design, OS optimization (power management, scheduling)

Module 5 Thermal modelling : Power density, temperature modeling, thermal aware design techniques . Example tools: Hotspot , ThermTap

Module 6 Alternate design techniques : Approx computing

In addition, several case studies (research research papers) will be discussed.

Logistics:

Class timings:

Wednesday 3:00 pm to 3:50 pm
Thursday 3:00 pm to 3:50 pm
Friday 3:00 am to 3:50 pm

Classes would happen in hybrid mode (online over google meet + physical in classroom). Recording would be shared.

Note: We will explore possibilities of two classes in a week of 75 minutes each.

TA:

To be announced

Office hours:

Send an email to get the appointment

Digital platforms

Google classroom for assignment submission, discussions and distribution of notes/videos

This website for general information/announcements

Class Schedule

Week 1 :Jan 3, 2022
- L1 : Introduction to low power design - CMOS power components
- L2 : VLSI Design process - Y chart
- L3 : Design specification - System level power optimizations
Week 2 : Jan 10, 2022
- L4 : ~~Energy efficient software design~~ System design
- L5 : ~~Design options - ASIC/ASIP/GPP/GPU/FPGA~~ Low power processors
- L6: ~~Low power processor design~~ How to read papers
Week 3 : Jan 17, 2022
- L7: ~~How to search papers, read paper, write summary~~ Power efficient software
- L8: ~~Low power interconnect design~~ Memory architecture for low power
- L9: Frequency scaling, power gating, Dynamic power management - DVFS
Week 4: Jan 24, 2022
- Jan 24: Project topic selection deadline
- Jan 26 (Wed) a public holiday
- L10 : Gate level power model
- L11: RTL power model
Week 5 : Jan 31, 2022
- L12: SRAM Memory power model
- L13: DRAM power model
- L14 : Processor power model
Week 6 : Feb 7, 2022
- No class on Feb 11 due to student activity
- L15: topics based on selected projects
- L16: topics based on selected projects
Week 7 : Feb 14, 2022
- Feb 19 (Sat) will work as Friday timetable
- L17 : Multi-processor power model, NoC power model
- L18: Power isolation cells - power gating
- L19: Survey presentations
- L20: Survey presentations
Week 8 : Feb 21, 2022
- Feb 24 (Thu) - buffer day - no class
- Feb 25 - Mid term exam
- L21 - doubt class
Week 9 : Feb 28, 2022
- Mid term exam week
Week 10 : March 7, 2022
- March 11 (Fri) no class
- March 12 (sat) - Friday timetable
- L22: Low power processor design
- L23: Low power processor design
- L24: Low power processor design
Week 11 : March 14, 2022
- March 18 (Friday) - Holi
- L25: Low power memory design
- L26: Low power memory design
Week 12 : March 21, 2022
- March 21, last date for audit/withdrawal
- L27: Low power DRAM design
- L28: Low power interconnect design
- L29: Dynamic power management
Week 13: March 28, 2022
- March 30 (wed) : Friday timetable
- L30 : Power density, thermal modeling
- L31: temperature aware scheduling
- L32: temperature aware design
Week 14: April 4, 2022
- L33 : Approx computing
- L34: Case study - 1
- L35: Case study - 2
Week 15: April 11, 2022
- April 14 - Public holiday
- April 15 - Public holiday
- L36: Case study - 3
Week 16: April 18, 2022
- L37: Case study - 4
- L38: Case study - 5
- L39: Case study - 6
Week 17: April 25, 2022
- L40: Project presentations
- L41: Project presentations
- L42: Project presentations
Week 18: May 2, 2022
- End term exam (May 2 to May 11)

Grading scheme

Mid term (20%)
- Mid term will be based on one/two research paper decided before the exam
End term (30%)
- Based on full syllabus
Paper reading (10%)
- Summary of 8-10 papers need to be submitted
Term paper (30%)
~~Class-participation/In-class Quizzes (10%)~~
- ~~75% of best in-class quizzes will be considered~~
Presentations (10%)
- As per schedule there will be two student presentations, one before mid term, one after mid term. Though project is in group, but presentation will be individual

Project timeline

Course project can be done in team of two. Marks of each team member may be different based on their performance. Marks for different activities:

Topic selection (5 points) - Jan 24, 2022
Literature survey report - 20 points
- Draft report - 10 points - Feb 14, 2022
- Final report - 10 points - March 7, 2022
Weekly discussions - 25 points
Demo : 30 points - April 25, 2022
Final report : 20 points
- Draft report - 10 points - April 25, 2022
- Final report - 10 points - May 12, 2022

General guidelines:

- All the submissions should be on time. Delayed submission will attract penalty at the rate of 10% per day. After delay of 10 days, no marks will be given to a assignment.

- Plagiarism of any sort (from internet resource or from friends) will be heavily penalised. In case, the case of copy is from other students of the course, both parties will get negative marks equal to double the weightage of assignment/submission. In second instance will be given F.

Books

Text Books

None.

Most of the material would be taught from research papers. Papers will be shared with the class.

Reference Books

1. Low-Power CMOS VLSI circuit design by Kaushik Roy, Sharat Prasad, John Wiley

2. High Level Power analysis and Optimizations by Anand Raghunathan, Niraj K Jha, Sujit Dey

3. Recent relevant research papers on low-power, energy efficient designs

4. Digital Integrated Circuits: A design perspective by Jan M Rabaey, Anantha Chandrakasan, Borivoje Nikolic

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