A) To introduce the fundamental concepts about power/energy consumption and estimation,
B) To understand various approaches for minimization and optimizations of power.
C) Hands-on experience with power related tools and software
Course is intended to provide a system wide view of low-power/energy-efficient approaches, right from circuit level to system level.
Prerequisite:
Basic course in digital design that covers both combination and sequential design. Familiarity with CMOS is good but not mandatory.
Module 1 Introduction (1 week): Introduction to CMOS design, need of low power/energy efficient design
Module 2 Power modelling (3 weeks) : Estimating power at circuit level, processor level, system level. Tools and techniques for power estimation. Example: McPAT, Cacti. Wattch, GPUWattch, XPE, DRAM Power calculator
Module 3 Logic level power optimizations (3 weeks) : Clock gating, power gating, voltage and frequency scaling, logic encoding
Module 4 System level power optimizations(4 weeks) : Communication/data transfer, memory optimizations (cache, main memory, secondary memory), power aware processor design, power aware ASIC design, OS optimization (power management, scheduling)
Module 5 Thermal modelling (2 week) : Power density, temperature modeling, thermal aware design techniques . Tools like Hotspot , ThermTap will be covered.
Module 6 Alternate design techniques(2 weeks) : Approx computing, Globally asynchronous locally synchronous design
Monday 3:00 pm to 3:50 pm
Tuesday 3:00 pm to 3:50 pm
Friday 11:00 am to 11:50 am
Priyankar Choudhary
Friday 10:00 am to 11:00 am
Send an email to get the appointment
Piazza for discussion. Ask instructor or TA to get enrolled.
Moodle for assignment submissions
This website for general information/announcements
Mid term (25%)
End term (35%)
Paper reading (10%)
Project and assignments (20%)
2 Quizzes (10%)
- All the submissions should be on time. Delayed submission will attract penalty at the rate of 10% per day. After delay of 10 days, no marks will be given to a assignment.
- Plagiarism of any sort (from internet resource or from friends) will be heavily penalized. In case, the case of copy is from other students of the course, both parties will get negative marks equal to double the weightage of assignment/submission. In second instance will be given F.
Text Books
1. Low-Power CMOS VLSI circuit design by Kaushik Roy, Sharat Prasad, John Wiley
2. High Level Power analysis and Optimizations by Anand Raghunathan, Niraj K Jha, Sujit Dey
3. Recent relevant research papers on low-power, energy efficient designs
Reference Books
1. Digital Integrated Circuits: A design perspective by Jan M Rabaey, Anantha Chandrakasan, Borivoje Nikolic