Publication
[2022]
Haratipour, N., Chang, S.C., Shivaraman, S., Neumann, C., ... Dutta. S. et al., "Hafnia-Based FeRAM: A Path Toward Ultra-High Density for Next-Generation High-Speed Embedded Memory." In 2022 International Electron Devices Meeting (IEDM), pp. 6-7. IEEE, 2022.
Luo Y, Dutta S, Kaul A, Lim SK, Bakir M, Datta S, Yu S. “A Compute-in-Memory Hardware Accelerator Design with Back-end-of-line (BEOL) Transistor based Reconfigurable Interconnect”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2022.
Dutta, S., Ye, H., Khandker, A.A., Kirtania, S.G., Khanna, A., Ni, K. and Datta, S, “Logic Compatible High-Performance Ferroelectric Transistor Memory”, IEEE Electron Device Letters 43, no. 3 (2022): 382-385.
Dutta, S., Detorakis, G., Khanna, A., Grisafe, B., Neftci, E. and Datta, S. “Neural Sampling Machine with Stochastic Synapse allows Brain-like Learning and Inference”, Nature Communications, 13(1), pp.1-10, 2022.
[2021]
Dutta, S., Khanna, A., Assoa, A. S., Paik, H., Schlom, D. G., Toroczkai, Z., Raychowdhury, A., and Datta, S., “An Ising Hamiltonian solver based on coupled stochastic phase-transition nano-oscillators”, Nature Electronics 4, 502–512 (2021).
Dutta, S., Khanna, A., Ye, H., Sharifi, M. M., Kazemi, A., San Jose, M., Aabrar, A. A., Gomez, J., Niemer, M., Hu, X.S. and Datta, S., “Lifelong Learning with Monolithic 3D Ferroelectric Ternary Content-Addressable Memory”, IEEE International Electron Devices Meeting (IEDM) 2021 (pp. 1-4).
Chakraborty W, Saligram R, Gupta A, San Jose M, Aabrar KA, Dutta S, Khanna A, Raychowdhury A, Datta S., “Pseudo-Static 1T Capacitorless DRAM using 22nm FDSOI for Cryogenic Cache Memory”, IEEE International Electron Devices Meeting (IEDM) 2021 (pp. 40-1).
[2020]
Dutta, S., Ye, H., Chakraborty, W., Luo, Y.C., San Jose, M., Grisafe, B., Khanna, A., Lightcap, I., Shinde, S., Yu, S. and Datta, S., “Monolithic 3D Integration of High Endurance Multi-Bit Ferroelectric FET for Accelerating Compute-In-Memory”, IEEE International Electron Devices Meeting (IEDM), 2020, (pp. 36-4).
Ye, H., Gomez, J., Chakraborty, W., Spetalnick, S., Dutta, S., Ni, K., Raychowdhury, A. and Datta, S., “Double-Gate W-Doped Amorphous Indium Oxide Transistors for Monolithic 3D Capacitorless Gain Cell eDRAM”, IEEE International Electron Devices Meeting (IEDM), 2020, (pp. 28-3).
Deng, S., Jiang, Z., Dutta, S., Ye, H., Chakraborty, W., Kurinec, S., Datta, S. and Ni, K., “Examination of the Interplay Between Polarization Switching and Charge Trapping in Ferroelectric FET”, accepted in IEEE International Electron Devices Meeting (IEDM), 2020.
Khanna, A., Elmitwalli, E., Dutta, S., Deng, S., Datta, S., Kose, S. and Ni, k., “A Bias and Correlation Free True Random Number Generator Based on Quantized Oscillator Phase under Sub-Harmonic Injection Locking”, IEEE Symposium on VLSI Technology (VLSI), 2020.
Deng, S., Yin, G., Chakraborty, W., Dutta, S., Datta, S., Li, X. and Ni, K., “A Comprehensive Model for Ferroelectric FET Capturing the Key Behaviors: Scalability, Variation, Stochasticity, and Accumulation”, IEEE Symposium on VLSI Technology (VLSI), 2020.
Ni, K., Dutta, S. and Datta, S., “Ferroelectrics: From Memory to Computing”, 25th IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 401-406, 2020.
Dutta, S., Khanna, A., and Datta, S., “Understanding the Continuous-Time Dynamics of Phase-Transition Nano-Oscillator-based Ising Hamiltonian Solver”, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) 6.2 (2020): 155-163.
Dutta, S., Grisafe, B., Frentzel, C., Enciso, Z., San Jose, M., Smith, J., Ni, K., Joshi, S. and Datta, S., “Experimental demonstration of gate-level logic camouflaging and run-time reconfigurability using ferroelectric FET for hardware security”, IEEE Transactions on Electron Devices 68.2 (2021): 516-522.
Liao, Y. C., Nikonov, D. E., Dutta, S., Chang, S. C., Hsu, C. S., Young, I. A., & Naeemi, A., “Understanding the Switching Mechanisms of the Antiferromagnet/Ferromagnet Heterojunction”, Nano Letters, 20.11 (2020): 7919-7926.
Liao, Y. C., Nikonov, D. E., Dutta, S., Chang, S. C., Manipatruni, S., Young, I. A., & Naeemi, A., “Simulation of the Magnetization Dynamics of a Single-Domain BiFeO₃ Nanoisland”, IEEE Transactions on Magnetics, 56(10), 1-9, 2020.
Dutta S, Schafer C, Gomez J, Ni K, Joshi S, Datta S., “Supervised Learning in All FeFET-Based Spiking Neural Network: Opportunities and Challenges”, Frontiers in Neuroscience 14, 2020.
[2019]
Dutta, S., Khanna, A., Gomez, J., Ni, K, Toroczkai, Z., Datta, S., “Experimental Demonstration of Phase Transition Nano-Oscillator Based Ising Machine”, IEEE International Electron Devices Meeting (IEDM), pp. 37-8, 2019.
Gomez, J., Dutta, S., Ni, K., Smith, J., Grisafe, B., Khan, A. and Datta, S., “Hysteresis-free negative capacitance in the multi- domain scenario for logic applications”, IEEE International Electron Devices Meeting (IEDM), pp. 7-1, 2019.
Detorakis, G., Dutta, S., Khanna, A., Jerry, M., Datta, S., Neftci, E., “Self-normalization in Stochastic Neural Networks”, Advances in Neural Information Processing Systems (NeurIPS), pp. 3291-3302. 2019.
Dutta, S., Saha, A., Panda, P., Chakraborty, W, Gomez, J., Khanna, A., Gupta, S., Roy, K., Datta, S., “Biologically Plausible Ferroelectric Quasi-Leaky Integrate and Fire Neuron”, IEEE Symposium on VLSI Technology (VLSI), pp. T140-T141, 2019
Dutta, S., Chakraborty, W., Gomez, J., Ni, K., Joshi, S., Datta, S., “Energy-Efficient Edge Inference on Multi-Channel Streaming Data in 28nm HKMG FeFET Technology”, IEEE Symposium on VLSI Technology (VLSI), T38-T39, 2019
Dutta, S., Chakraborty, W., Khanna, A., Gomez, J., Joshi, S., Datta, S., “Spoken vowel classification using synchronization of phase transition nano-oscillators”, IEEE Symposium on VLSI Technology (VLSI), T128-T129, 2019.
Gomez, J., Dutta, S., Ni, K., Grisafe, B., Smith, J., Khan, A. and Datta, S., “Significance of Multi and Few Domain Ferroelectric Switching Dynamics for Steep-Slope Non-Hysteretic Ferroelectric Field Effect Transistor”, 77th Device Research Conference (DRC), pp. 247-248, 2019.
Chakraborty, W., Ni, K., Dutta, S., Grisafe, B., Smith, J., and Datta, S., “Experimental Investigation of Sub-threshold Swing Degradation in HKMG MOSFETs at Cryogenic Temperature for Quantum Computing Application”, 77th Device Research Conference (DRC), pp. 115-116, 2019
Gomez, J., Dutta, S., Ni, K., Joshi, S. and Datta, S., “Steep Slope Ferroelectric Field Effect Transistor”, Electron Devices Technology and Manufacturing Conference (EDTM), pp. 59-61, 2019.
Datta, S., Dutta, S., Grisafe, B., Smith, J., Srinivasa, S., and Ye, H., “Back-End-Of-Line Compatible Transistors for Monolithic 3D Integration”, IEEE Micro, 9(6), pp.8-15, 2019.
Dutta, S., Parihar, A., Khanna, A., Gomez, J., Chakraborty, W., Jerry, M., Grisafe, B., Raychowdhury, A., Datta., S., “Programmable Coupled Oscillators for Synchronized Locomotion”, Nature Communications, 10(1), pp.1-10, 2019
Saha, A.K., Ni, K., Dutta, S., Datta, S. and Gupta, S., “Phase field modeling of domain dynamics and polarization accumulation in ferroelectric HZO”, Applied Physics Letters, 114(20), p.202903, 2019.
[2018]
Ni, K., Grisafe, B., Chakraborty, W., Saha, A.K., Dutta, S., Jerry, M., Smith, J.A., Gupta, S. and Datta, S., “In-memory computing primitive for sensor data fusion in 28 nm HKMG FeFET technology”, IEEE International Electron Devices Meeting (IEDM), pp. 16-1, 2018
Jerry, M., Dutta, S., Kazemi, A., Ni, K., Zhang, J., Chen, P.Y., Sharma, P., Yu, S., Hu, X.S., Niemier, M. and Datta, S., “A Ferroelectric field effect transistor based synaptic weight cell” Journal of Physics D: Applied Physics, 51 (43), 434001, 2018
Dutta, S., Nikonov, D., Bourianoff, G., Manipatruni, S., Young, I., Naeemi, A., “Skyrmion nucleation via localized spin current injection in confined nanowire geometry in the presence of low DMI”, arXiv 1801.10525, 2018
Iraei, R., Kani, N., Dutta, S., Manipatruni, S., Nikonov, D. E., Young, I. A., Heron, J. T., and Naeemi, A., “Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation”, IEEE Transactions on Electron Devices (TED), 65 (5), 2040-2046, 2018.
[2017 and Earlier]
Dutta, S., Zografos, O., Gurunarayanan, S., Radu, I.P., Sorée, B., Catthoor, F., Naeemi, A., “Proposal for nanoscale cascaded plasmonic majority logic gates for non-boolean computation”, Nature Scientific Reports, 7(1), 2017.
Dutta, S., Nikonov, D., Manipatruni, S., Young, I., Naeemi, A., “Overcoming thermal noise in non-volatile spin wave logic”, Nature Scientific Reports, 7(1), pp.1-10, 2017.
Zografos, O., Dutta, S., Manfrini, M., Vaysset, A., Sorée, B., Naeemi, A., Raghavan, P., Lauwereins, R. Radu, I.P., “Non-volatile spin wave majority gate at the nanoscale”, AIP Advances, 7(5), p.056020, 2017.
Iraei R.M., Dutta S., Manipatruni S., Nikonov D.E., Young I.A., Heron J.T., Naeemi, A., "A Proposal for a Magnetostriction-Assisted All-Spin Logic Device”, 75th Device Research Conference (DRC), pp. 1-2, 2017.
Zografos,O., Dutta, S., Manfrini, M., Sorée, B., Naeemi, A., Raghavan, P., Lauwereins, R., Radu, I.P., “Non-volatile spin-wave majority gate at the nanoscale”, 61st Annual Conference on Magnetism and Magnetic Materials (MMM), 2016.
Dutta S, Iraei RM, Pan C, Nikonov DE, Manipatruni S, Young IA, Naeemi A., “Impact of spintronics transducers on the performance of spin wave logic circuit”, 16th IEEE International Nanotechnology Conference (IEEE-NANO), pp. 990-993, 2016.
Naeemi A, Chang SC, Dutta S, Pan C, Manipatruni S, Nikonov D, Young I., “Spin-based interconnect technology and design”, IEEE International Interconnect Technology Conference/Advanced Metallization Conference (IITC/AMC), 2016.
Dutta, S., Chang, S.C., Kani, N., Nikonov, D., Manipatruni, S., Young, I., Naeemi, A., "Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines", Nature Scientific Reports, 5, p.9861, 2015.
Dutta, S., Nikonov, D., Manipatruni, S., Young, I., Naeemi, A., “Phase-dependent deterministic switching of magnetoelectric spin wave detector in the presence of thermal noise via compensation of demagnetization”, Applied Physics Letters, 2015.
Dutta, S., Nikonov, D., Manipatruni, S., Young, I., Naeemi, A., “Compact Physical Model for Crosstalk in Spin-Wave Interconnects”,IEEE Transactions on Electron Devices (TED), 62 (11), 3863-3869, 2015.
Kani, N., Chang, S.C., Dutta, S., Naeemi, A., “A Model Study of an Error-Free Magnetization Reversal through Dipolar Coupling in a Two-Magnet System”, IEEE Transactions on Magnetics (TMAG), 52(2), pp.1-12, 2015.
Chang, S.C., Dutta, S., Nikonov, D., Manipatruni, S., Young, I., Naeemi, A., "Interconnects for All-spin Logic using Automotion of Domain Walls", IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC), 1, pp.49-57, 2015.
Kani, N., Dutta, S., Naeemi, A., “Analysis of Coupling Strength in Multi-Domain Magneto-Systems”, 73rd Device Research Conference (DRC), pp. 111-112, 2015.
Dutta, S., Nikonov, D.E., Manipatruni, S., Young, I.A., Naeemi, A., "SPICE Circuit Modeling of PMA Spin Wave Bus Excited Using Magnetoelectric Effect", IEEE Transactions on Magnetics (TMAG), 50 (9), 1-11, 2014.