The rapid growth of artificial intelligence is driving an urgent need for new computing hardware that is faster, more energy-efficient, and capable of processing massive amounts of data with minimal data movement. Our research explores novel oxide semiconductor and ferroelectric technologies that enable the next generation of memory and logic devices, bridging fundamental materials research with practical computing systems.
Amorphous oxide semiconductors (AOS) offer a unique opportunity to rethink electronics beyond crystalline silicon. While their low-temperature processing enables monolithic three-dimensional (3D) integration of logic and memory, their disordered atomic structure also raises fundamental scientific questions that remain largely unanswered.
Our research seeks to understand how structural disorder, atomic bonding, defects, and interfaces govern charge transport, device operation, and long-term reliability. By uncovering these fundamental mechanisms, we establish the scientific principles needed to engineer next-generation oxide electronics while enabling BEOL-compatible transistors, memories, and vertically integrated computing systems.
Ferroelectric materials are redefining the future of memory and computing by enabling devices that can simultaneously store and process information with exceptional energy efficiency. Yet many of the fundamental mechanisms governing ferroelectric behavior at nanometer dimensions remain poorly understood.
Our research seeks to answer fundamental questions about polarization switching, domain dynamics, charge trapping, interface coupling, and reliability in nanoscale ferroelectric devices. By uncovering the physics that governs these phenomena, we aim to establish the scientific foundations for robust ferroelectric memories and logic technologies, including FeFETs, ferroelectric capacitors, logic-in-memory, and compute-in-memory architectures for future AI hardware.
Electronic devices operate far from equilibrium, where defects evolve, interfaces degrade, and materials continuously change under electrical and thermal stress. Understanding these dynamic processes is one of the fundamental challenges in modern nanoelectronics and is essential for translating laboratory discoveries into practical technologies.
Our research seeks to uncover the physical mechanisms that govern defect generation, charge trapping, atomic migration, and degradation in emerging electronic devices. By combining advanced electrical characterization, multiscale physics-based modeling, and AI-driven digital twins, we develop predictive frameworks that connect materials, device physics, and long-term reliability, enabling the rational design of robust next-generation memory and logic technologies.
