Dutta Lab at UT Dallas

NSF CAREER Award

I’m honored and grateful to receive the NSF CAREER Award titled “CAREER: Monolithic 3D Oxide Semiconductor Nanoelectronics for Energy-Efficient Computing”. The recognition is deeply meaningful, not as an individual achievement, but as a reflection of the many mentors, collaborators, students, and colleagues who have shaped this journey. I’ve been fortunate to learn from and work alongside people who constantly push the boundaries of science and engineering. I’m especially thankful to my wonderful students and collaborators, this work is truly a team effort.

Read the full story to learn more about the research, impact and vision behind this: https://lnkd.in/gFPvvKxU

IEDM 2026 Accepted!!!

Very happy to share that our paper, “Insights into Suppression of Hydrogen-Induced PBTI in Nitrogen-Doped Indium Tungsten Oxide Transistors,” has been accepted IEDM 2026. And specially proud of the fact that the entire transistor fabrication, reliability characterization and modeling was done in-house at UTD.

IRPS 2026 Accepted!!!

What if reliability design margins weren’t dictated by over-conservative statistics? Conventional stress-testing requires extensive data across large device populations, often resulting in large guard bands and suboptimal system-level performance. Our paper "Accelerated Reliability Characterization of Ferroelectric Capacitors using Physics-Informed Bayesian Active Learning" combines reliability physics with Bayesian active learning in a closed-loop characterization framework that adaptively selects stress conditions to maximize information gain while minimizing experimental cost—enabling accurate 3σ tail estimation with far less experiments and orders-of-magnitude improvements in bit error rate prediction for emerging memories.

DRC 2025

Our group continues to make effort on understanding the fundamentals at the materials/device level for enabling next-gen emerging memory. Our paper "Impact of Stoichiometric Optimization on Performance and Reliability of Zirconium Doped Hafnium-Based Ferroelectric Capacitors" got accepted in Device Research Conference (DRC) 2025!!

First IEDM paper from our research group

Congrats Tanvir and thanks to all our collaborators. We will be presenting the paper titled "Towards 3D CMOS+X Ising Machines: Addressing the Connectivity Problem with Back-end-of-line FeFETs" at the 70th Annual IEEE International Electron Devices Meeting (IEDM) held in SF in Dec 2024.

First author paper accepted in 2024 ESSERC conference

Congrats to Tanvir on his first conference paper titled "Design Space Exploration of Oxide Semiconductor-Based Monolithic 3D Gain Cell Memory" at the 50th European Solid-State Electronics Research Conference (ESSERC) in Bruges, Belgium. Catch us presenting our work!