CS204: Computer Architecture
Jan - May 2025, IIT Ropar
Jan - May 2025, IIT Ropar
This is a first level course in computer architecture and introduces students to:
Brief history of computers, Types of computers
Instruction Set Architecture - Instruction Encoding - Assembly Programming
Basic processor design - Single cycle - Pipelining - Hazards - O0O execution
Memory Organization - Cache, DRAM, Concept of Virtual Memory
Hardware Aware Software Optimizations
Input and Output Organization
Dr. Venkata Kalyan Tavva - First half.
Computer Organization & Design: The Hardware-Software Interface, RISC-V edition by David A Patterson, John L Hennessy.
Computer Architecture: A Quantitative Approach by David A Patterson, John L Hennessy, 5th edition.
Computer Organization & Embedded Systems by Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, 5th Edition.
Computer Systems: A Programmer’s Perspective by Randal E Bryant, David R O’Hallaron, 3rd edition
Grading scheme:
Daily quiz: 10%
Mid-sem: 25%
End-sem: 35%
Lab: 30%
Under-the-hood of mobile & laptop; 1%
RISC-V lab tests: 5% + 7%
RISC-V simulator: 5% + 5% + 7%
Phase I: RISC-V Assembler
Phase II: RISC-V single/multi cycle datapath & controlpath design
Phase III: RISC-V pipelined datapath & controlpath design
Teaching Assistants:
Pravesh, Prathamesh, Arif, Sajid, Praneeth, Krishna
Class timings:
PCE-1 Slot: 2.00PM-2.50PM on Wednesday, Thursday and Friday
Lab timings:
Monday: 4 to 6PM
On course Google Classroom/Moodle.