Papers

Legend - J: Journal, C: Conference, P: Poster

J5  Diyanesh Babu Chinnakkonda Vidyapoornachary, Venkata Kalyan Tavva and MB Srinivas. Voltage Reduced Self Refresh (VRSR) for Optimized Energy Savings in DRAM Memories. In Elsevier Journal of Memories - Materials, Devices, Circuits and Systems, DOI: https://doi.org/10.1016/j.memori.2023.100058.

J4 Saravanan Sethuraman, Venkata Kalyan Tavva and MB Srinivas. Techniques to Improve Write and Retention Reliability of STT-MRAM Memory Subsystem. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 41, Issue 9, 2901 - 2914, 2021.

J3 Saravanan Sethuraman, Venkata Kalyan Tavva, Karthick Rajamani, Chitra K Subramanian, Kyu-hyoun Kim, Hillery C Hunter and MB Srinivas. Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 39, Issue 12, 4635-4644, 2020.

J2 Praveen Kumar Alapati, Venkata Kalyan Tavva and Madhu Mutyam. A Scalable and Energy-Efficient Concurrent Binary Search Tree with Fatnodes. IEEE Transactions on Sustainable Computing, Volume 5, Issue 4, 468 - 484, 2020.

J1 Venkata Kalyan Tavva, Ravi Kasha and Madhu Mutyam. EFGR: An Enhanced Fine Granularity Refresh Feature for High Performance DDR4 DRAM Devices. ACM Transactions on Architecture and Code Optimization (ACM TACO), Volume 11, Issue 3, Article 31, 2014.


C11 Animan Naskar, Venkata Kalyan Tavva and Subhasis Banerjee. GPU Accelerated Construction of Time Respecting Data Structure for Temporal Graphs in proceedings of 28th IEEE High Performance Extreme Computing (HPEC) 2024. 

C10 Prabuddha Sinha, Krishna Pratik Bv, Shirshendu Das and Venkata Kalyan Tavva. PROLONG: Priority based Write Bypassing Technique for Longer Lifetime in STT-RAM based LLC. In proceedings of MEMSYS 2024.

C9 Waqar Hassan Mir, Neeraj Goel and Venkata Kalyan Tavva. CARDR: DRAM Cache Assisted Ransomware Detection and Recovery in SSDs. In proceedings of MEMSYS2024.

C8 Praseetha M, Madhu Mutyam and Venkata Kalyan Tavva. Cache Line Pinning for Mitigating Row Hammer Attack. In proceedings of ACM International Conference on Parallel Processing (ICPP), 802 - 811, 2024. 

C7 Praveen Kumar Alapati, Venkata Kalyan Tavva and Madhu Mutyam. FatCBST: Concurrent Binary Search Tree with Fatnodes. In proceedings of IEEE Conference on High Performance Computing and Communications (HPCC), 2017.

C6 Pritam Majumder, Venkata Kalyan Tavva and Madhu Mutyam. SFFMap: Set-First Fill Mapping for an Energy Efficient Pipelined Data Cache. In proceedings of IEEE International Conference on Computer Design (ICCD), 2014.

C5 Sudharsan Jagathrakshakan, Venkata Kalyan Tavva and Madhu Mutyam. Data Remapping for an Energy Efficient Burst Chop in DRAM Memory Systems. Received bronze medal in ACM Student Research Competition (ACM SRC), held along with International Conference on Parallel Architectures and Compilation Techniques (PACT), Aug, 2014, pp. 507-508.

C4 Venkata Kalyan Tavva, Ravi Kasha and Madhu Mutyam. Scattered Refresh: An Alternative Refresh Mechanism to Reduce Refresh Cycle Time. In proceedings of IEEE/ACM Asia and South Pacifc Design Automation Conference (ASP-DAC), 2014, pp. 598-603.

C3 Janraj C J, Venkata Kalyan Tavva, Tripti Warrier and Madhu Mutyam. Way Sharing Set Associative Cache Architecture. In proceedings of 25 th IEEE International Conference on VLSI Design and 11 th IEEE International Conference on Embedded Systems (VLSI Design), 2012, pp. 251-256.

C2 Venkata Kalyan Tavva and Madhu Mutyam. Word Interleaved Cache: An Energy Efficient Data Cache Architecture. In proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2008, pp. 265-270.

C1 Venkata Kalyan Tavva, Madhu Mutyam and Sankar Rao P V. Exploiting Variable Cycle Transmission for Energy Efficient On-Chip Interconnect Design. In proceedings of 21 st IEEE International Conference on VLSI Design and 7 th IEEE International Conference on Embedded Systems (VLSI Design), 2008, pp. 235-240.


P1 Saravanan Sethuraman, Hillery Hunter, M B Srinivas, Venkata Kalyan Tavva, Janani Mukundan, Karthick Rajamani, Kyu-hyoun Kim. System Level Exploration of STT-MRAM as Main Memory. In IBM STT-MRAM 20th Anniversary Symposium, held at IBM T J Watson Research Center in Nov 2016.