Research area

The world is analog. Intelligence, today, is digital. Someone has to build the bridge.

Every voice a microphone hears, every photon a camera collects, every bit racing between two GPUs training a language model begins or ends as a continuous physical signal. Our laboratory designs the CMOS circuits that live on that boundary: mixed-signal circuits that turn the physical world into numbers, and numbers back into the physical world, at ever higher speed and ever lower energy.

Why now

Look at the two chips on the left. What makes them one machine is not the silicon inside each package but the dense bundle of high-speed lanes between them, and those lanes are where the AI era has moved the bottleneck. The chart on the right tells the story in numbers. The interconnect bandwidth of a single GPU grew from 0.16 TB/s in 2016 to 1.8 TB/s in 2024, more than tenfold in eight years. But every bit that crosses a wire costs energy. At a few picojoules per bit, the dashed curves show that simply moving data in and out of one accelerator now demands tens of watts, a power budget that rivals the computation it serves and that scales with every new generation.

That energy is spent in exactly three kinds of circuits: the transceivers that drive and receive the lanes, the clocks that keep both ends of every lane in step, and the converters that let the digital world sense and reach the analog one. The frontier of computing is no longer only inside the processor; it is in the links between processors, in the timing that binds them, and in the converters at their edges. That is where our work sits.

Three pillars

High-Speed IO Transceiver IC Design – Connect with efficiency: The lanes that carry tens to hundreds of gigabits per second through lossy channels, at the lowest possible energy per bit.

Phase-Locked Loops and Clock Generation – Synchronize with confidence: The heartbeat that tells the ADC when to sample and the transceiver when to send. Its jitter sets the ceiling on link speed and converter accuracy.

Analog-to-Digital Converter IC Design – Capture with precision: Where a waveform becomes the bit stream everything downstream will trust. Sampling speed, resolution, and energy per conversion decide how well an intelligent system can see, hear, and measure.

Each area is described in depth on its own page below.

Digital circuits speak in two levels, rail to rail, and scale gracefully with every new process node. Analog circuits speak in continuous voltages and currents and must face transistor physics directly: noise, mismatch, linearity, and a supply voltage that keeps shrinking. Neither builds a complete system alone. We think from the analog side, where the hardest constraints live, and borrow digital techniques wherever they make an analog block smaller, smarter, or self-calibrating. Circuits that are analog in spirit and digital in discipline.