Graduate Students

NAME : Minseo Park (M.S. Degree Candidate)

Research interests : Adaptive Digital-to-Time Converter Loop Design and Digital Phase Locked Loop Design 

Current Affiliation : CACDL Reserarcher

NAME : Jinhyeok An (M.S. Degree)

Research interests : Analog Charge Pump-based Phase Locked Loop Design and High-Speed IO Transceiver Design, Automatic Frequency Control Loop Design

Current Affiliation : Leo LSI

NAME : Kihoon Kwon (M.S. Degree)

Research interests : DTC based All Digital Phase Locked Loop Design, Snapshot Phase Detecting Scheme, Fractional Sub-Harmonic Spur Cancellation Algorithm Design

Current Affiliation : LX semicon

NAME : Sangwon Kim (M.S. Degree)

Research interests : Sub-Sampling based Analog Phase Locked Loop Design, Automatic Frequency Gain Control Loop for Clock System Design, SAR Analog-to-Digital Converter Design

Current Affiliation : LX semicon

NAME : Gyuhyeong Jung (M.S. Degree Candidate)

Research interests : Clock and Data Recovery, IO Transceiver

Current Affiliation : CACDL Researcher

NAME : Kyungub Cho (M.S. Degree)

Research interests : All Digital Phase Locked Loop, Gated-Ring Oscillator-based Time-to-Digital Converter Design, Analog Charge-Pump-based Phase-Locked Loop Design

Current Affiliation : Sapien Semiconductors

NAME : Sanggeun Lee (M.S. Degree)

Research interests : Phase Locked Loop, Clock and Data Recovery, IO Transmitter

Current Affiliation : Samsung Electronics Co., Ltd. System LSI Division, Hwaseong (Mixed signal IC designer)

NAME : Kyunghwan Min (M.S. Degree)

Research interests : High-speed Wireline Interface Circuits

Previous Affiliation : Samsung Electronics Co., Ltd. System LSI Division, Hwaseong (Mixed signal IC designer)
Currently, UIUC ECE Dept. Ph.D. Candidate 

NAME : Kyungseok Park (M.S. Degree)

Research interests : High-speed Wireline Interface Circuits

Current Affiliation : Samsung Electronics Co., Ltd. Memory Division, Hwaseong.

NAME : Esther Kim (M.S. Degree)

Research interests : Phase Locked Loop, Duty-Cycle Correction Loop

Current Affiliation : Samsung Electronics Co., Ltd. Memory Division, Hwaseong.

NAME : Seongkwang Kim (M.S. Degree)

Research interests : Phase Locked Loop, Clock and Data Recovery, High-Speed I/O IC Transceiver design

Current Affiliation : LG Display

NAME : Deokgwan Jeong (M.S. Degree)

Research interests : High-speed I/O transceiver, Clock and Data Recovery

Current Affiliation : One Semiconductor, Seongnam (Mixed signal IC designer)