To create an FSM from a known design requirement and implement is using hardware integrated circuits.
1. Design a synchronous finite state machine that produces the following sequence:
0→ 2→ 1→ 3→ 0→ 2→ 1→3→ ... when X is 1
0→0→0→ ... when X is 0.
Provide an asynchronous clear input CLR to reset the machine to 0.
2. To design the state machine:
Create the state diagram
Create the present-state/next-state table
Create the excitation table
Derive the excitation logic for D1 and D2.
3. Find the datasheets, and draw the schematic diagram for the design using the following chips:
74LS74 dual D flip-flop with preset and clear
74LS08 quad 2-input AND
74LS86 quad 2-input XOR
Create a blank transition table with Q1, Q2 and X on the side to be filled in during the lab.
Connection Steps
On all chips connect: Pin 7 to GND, and Pin 14 to +5V
On the D-FlipFlop: 7474 Connect:
Pin 1 (/Clear1) and Pin 13 (/Clear2) to Logic Switch 1
Pin 4 (/Set1) and Pin 10 (/Set2) to Logic Switch 2
Pin 3 (CLK1) and Pin 11 (CLK2) to Debounced Pushbutton 2
Connect Pin 5 (Q1) to LED 1, and Pin 9 (Q2) to LED 0
On the 4x 2-input XOR: 7486 Connect:
Pin 1 (Input 1A) to Pin 5 on the 7474 (Q1)
Pin 2 (Input 1B) to pin 9 on the 7474 (Q2)
Pin 3 (Output 1Y) to Pin 1 on the 7408 (Input 1A).
On the 4x 2-input AND: 7408 Connect:
Pin 2 (Input 1B) to Logic Switch 8 (X)
Pin 3 (Output 1Y) to Pin 2 on the 7474 (D2)
Pin 4 to Logic Switch 8 (X)
Pin 5 to Pin 8 on the 7474 (/Q2)
Pin 6 to Pin 12 on the 7474 (D1)
To Test Circuit
Ensure Set/Clear for both flipflops are set High to disable them (high is when they are in the 1 position).
Set X (Logic Switch 8) Low.
Press CLK (Debounced Pushbutton Switch) to verify that LEDs monitoring Q1 and Q2 show the progression 0→0→0→0→ 0...
Set X (Logic Switch 8) High.
Press CLK (Debounced Pushbutton) to verify that LEDs monitoring Q1 & Q2 show the progression 0→2→1→3→0...
With the LEDs showing any state other than 00 (continue to press CLK if necessary).
Pull the Clear Switch (Data Switch 0) low and verify that the display reverts to state 00.
Comment on the circuit operations. Did it operate as expected?
Compare the ease of the testing/inspection of a state machine with simulation to building the circuit as in this lab.