Digital Systems & Computer Architecture Lab Procedures
LAB 1 - Basic Logic Gates
LAB 2 - Combinational Logic Analysis
LAB 3 - Karnaugh Maps
LAB 4 - Full Adder & Subtractor
LAB 5 - Familiarization with Flip-Flops
LAB 6 - Finite State Machines: Analysis
LAB 7 - Finite State Machine Design
LAB 8 - Field Programmable Gate Arrays
Project - Sequential Synchronous Circuits
The lab sessions for
Digital Systems & Computer Architecture
are conducted from 14:30 to 17:30 on Wednesdays