The Console Line Unit occupies the whole of a two port printed wiring board and provides
The termination for two 4-wire analogue speech circuits
4-wire signalling link which consists of 2 independent 2-wire circuits - one for each direction of transmission between the CEU and the console.
Analogue Speech circuits
Two 4-wire analogue speech circuits are provided between this unit and the console, to enable the operator to speak to both parties on a call, and to have separate access to either party if, and when, required;
The line interfaces on which the two 4-wire speech circuits terminate contain miniature 2-wire transformers to provide conversion from the balanced circuits on the line side to the unbalanced connections through the band limiting filters to the codec. Resistors are connected to the line sides of the transformers to provide DC "wetting" currents for any contacts in the lines. The band limiting filters and the codecs are similar to those in the Inter-PBX Line Circuits. A gain adjustment capability is included to allow compensation for variations in loss due to the tolerances permitted in the codec and filter areas. Only one setting is required for all lengths of console cable, and this is made during manufacture.
A 4-wire circuit is also provided for signalling purposes. Signalling over the links in each direction is effected by means of asynchronous digital transmission at 2.4 kbit/s, with automatic error detection. The same format is used on the signalling link for all messages - one 8 bit information byte from the console to the CEU, and three 8 bit information bytes from the CEU to the console, plus start/stop signals, sequence checks and parity bits. When there is no activity on the link a continuous interchange of "idle" signals takes place between the console and the CEU. If this ceases, calls are directed to alternative answer points. Thus, any failure of the link is automatically detected and appropriate action taken.
The signalling link terminates on a signalling conversion element, a block diagram of which is shown below.
The UART on the console line card is IC3 A a SMC COM8017
IC 21 in the console is the Texas Instruments SN75116J differential transceiver chip, that converts to and from TTL levels.
The heart of the signalling link termination consists of a SMC COM8017 OR General Instrument AY-3-1015D Universal Asynchronous Receiver and Transmitter ( UART).
The heart of the signalling link termination consists of a Universal Asynchronous Receiver and Transmitter ( UART).
Digital signalling from the processor is received via the Shelf Multiplex and converted to parallel form in an SIPO conversion circuit.
The data is then latched and sampled by the UART every 8 ms.
The signalling link consists of two 2-wire circuits, one for each direction of signal transmission. Information is sent in balanced asynchronous digital form in both directions at 2.4 kbit/ s.
Each message consists of a start signal, followed by an 8 bit information byte, followed by a stop signal. A parity bit is also added for error detection purposes. When the circuit is not being used a single ("idle") byte is transmitted from the CEU to the console every 8 ms and a single byte is sent in the opposite direction every 137 ms as long as the console is active. Failure to receive this signal automatically indicates the existence of a fault and appropriate action is taken.
Each message from the CEU to the console consists of three signalling bytes (bits A to H) to each of which start, stop and even parity bits are added by the UART. The data is sent out unchanged, apart from these additions, over the signalling link via the line driver. When no information requires to be sent, a single ("idle") byte is transmitted from the CEU to the console every 8 ms and a single byte is sent every 137 ms in the opposite direction as long as the console is active. Failure to receive this signal automatically indicates the existence of a fault or disconnection of the console.
The total number of information bits in a message of 3 bytes from the CEU to the console is 24. The first 4 bits are used to indicate the type of message in accordance with the code shown in below. The remaining 18 bits provide detailed information within the classifications. Circuit features are included to ensure that no data is lost, or inadvertently repeated, due to asynchronism between the main processor and the Console Line Unit as a result of variations in the nominal 8 ms processor scan period caused by differences in the software run times for different functions within the CPU.
All information from the console to the CEU is sent in single byte messages. Most of the information sent over the link in this direction originates from the various keys available to the operator and the number of messages required is smaller than in the CEU to console direction.
As in the CEU to console direction each byte contains 8 bits, but one bit is used for parity checking within the software and another is used for sequencing. Thus 6 bits are available for information purposes. About 50 of the available combinations have so far been used for signalling information. A UART in the console signalling termination adds start and stop bits, and a further parity bit for use during transmission over the link. The line receiver in the Console Line Circuit accepts the signals and converts them into a form compatible with the input requirements of the UART in that circuit. This UART re-formats the data as an 8 bit parallel word and puts it back into the latch, whence it is taken via a PISO converter circuit to the codec of one of the speech path circuits for multiplexing with the speech signals and forwarding to the processor.
Signalling between the Console Line Unit and the processor in the CEU is effected by using the 8 signalling bits (A to H), coded in the same way as the 8 bit information bytes in the messages sent and received over the asynchronous signalling circuits to and from the console.
--------------------------------------------
I may have damaged a console line card by typing the following on a system running M MEQ N2.4
can that be possible ???
CARD SERIAL NUMBER F274020 8128 EET81/1 R
IC27 8112
EDT 16 306
VALUE
TEST FAILED
? EDT 16 306 1
TEST FAILED