Courses

Description

This course introduces students to CMOS circuits, develops first-order current-voltage and capacitance-voltage models for transistors, transfer characteristics of CMOS inverter, performance estimation for circuits through logical effort, interconnects, combinational circuit design, circuit families, sequential circuit design including clocking and latching techniques, design of datapath subsystems (adders, shifters, multipliers etc.), design of memory subsystems. A course project using state-of-the-art computer aided design (CAD) tools in VLSI gives students hands-on exposure to the most current technology/process.

Course Objectives

At the completion of the course, the students should be able to:

• Evaluate characteristics of CMOS inverter and interconnects specifically in terms of current and capacitance that are essential for estimating delay and power.

• Quickly estimate the best number of stages for a path, the minimum possible delay for the given topology, and the gate sizes that achieve this delay using logical effort.

• Describe various sources of power dissipation in a CMOS chip and apply techniques to minimize that.

• Optimize combinational circuits for lower delay and/or energy;

• Analyze sequential circuits including clocking and latching techniques.

• Use computer aided design (CAD) tools in VLSI and experiment with the current technology/ process, and able to design and lay out Standard Cells.

Credits and Offering

Its a 4 credit course and is available as ECE314 (for UG students) and ECE514 (for PG and PhD students) in Monsoon Semesters. It is a core course for VLSI M.Tech students.

Student Speak

• "The most important and crucial ingredient to gain knowledge is the student-teacher interaction and continuous discussion about the related topics. I think this the best part .of this course , the lectures are engaging and faculty immediately responds to student’s query. All the doubts are cleared and faculty’s target is to make student learn as much as possible."

• "I appreciate Anuj Sir for his teaching skills. The ”hinglish” language of teaching also helped quite a lot, since very few instructors teach in such a natural manner. The courses I have done so far, a very few are there, where we actually learn something. This was one of them! The whole course was planned to be learning-oriented, and the midsem and project were also designed to encourage learning."

Online Presence

The recordings of the last offering of DVD course are available here.

Description

This circuit design course brings students face to face with the challenges in designing a Memory Block. The course will introduce the challenges in designing the most commonly used 6T SRAM cell and then the peripheral circuits like sense amplifiers, decoders, write drivers etc. The course then introduces the cache hierarchy. Then the design specificities linked to DRAM design and NVM Design are covered. The last part of the course introduces the memory test methods, including BIST and test features in embedded memories. A course project using state-of-the-art computer aided design (CAD) tools in VLSI gives students hands-on exposure to design in an industrial technology/process.

Course Objectives

At the end of the course, the students should be able to:

• Evaluate and Design SRAM Cell and peripheral circuits.

• Evaluate impact of different architectures on Power/Performance/ Area (PPA) of Memory and at SoC level and correspondingly choose correct architecture aligned to needs.

• Estimate the impact of Memory choices on Cache subsystem performance.

• Distinguish between design requirements for DRAMs; NVMs and SRAM

• Design NVM centric peripheral circuits like level shifters, charge pumps etc.

• Appreciate the importance of Test and Testability for SRAMs and the concept of BIST

Credits and Offering

Its a 4 credit course and is available as ECE611 in Winter semesters

Student Speak

• "The way the instructor gave us the vision to analyze circuit was very good. Project helped a lot in learning."

• "Instructor is highly experienced and one of the best faculty in IIIT Delhi."

Online Presence

The recordings of the last offering of MDT course are available here.

Description

The goal of this workshop style course is to trigger creative thinking in students and equip them with tools to not only brainstorm, but also to utilize existing knowledge to arrive at inventive solutions to problems. The course establishes basics of creative thinking and throws light on psychological inertia and various blocks to creative thinking. It then introduces formal brainstorming methods. The course then introduces methods for systematic problem solving through modeling of existing system; remodeling for increasing value; and structured solution search and ideation. The course also requires the students to present and sell their inventions in a mock pitch-café.

A quick glimpse of what we cover in the course is available in this lecture recording.

Course Objectives

At the end of the course, the students should be able to:

• Identify a range of creativity enhancement and brainstorming tools and determine the tool most suited for the problem setting.

• Distinguish between different stages of Creativity and Innovation Cycles

• Generate ideas in free brainstorm sessions and organize them in structured manner by using tools like mind-maps

• Construct functional models of engineering systems and modify them to create new problem statements

• Generate ideas using structured brainstorm methods and utilize available knowledge databases to refine solutions.

• Classify ideas on S-curve and identify promising ones.

Credits and Offering

This course is offered as a 4 credit course - ENT416/ 516 starting Winter 2021. This course is offered in the Entrepreneurship Minor.

Online Presence

The recordings of the last offering of CIIPS course are being made available here. Recordings of the ongoing offering are also available on my YouTube channel here.