PDP-9 Restoration Blog 2025

3/29/25

The system booted ADSS and ran OK.

We tried the repaired DECtape drive that is above the console. The motor drive is working OK, but it is getting lots of errors when reading tapes. This needs more testing.

9/17/25

After the system was booted, some ADSS commands could not be entered due to garbled data. The VT-220 terminal used as the serial interface was verified with a loop-back test. An ASR-33 Teletype was used for input and exhibited the same behavior.

To investigate, the D-BS-KD09-A-11 Teletype Control (Sheet 1) schematic was referenced. Walking the serial signal path through the PDP-9 using an oscilloscope, TT KBD IN# was verified at the S107 Flipchip C33 Pin S. The signal was confirmed to have a start bit, 7 data bits, MARK parity (1) and 2 stop bits (correct for the terminal settings). For simplicity, a CTRL-A character (which is the character value 001 in octal) was issued, then CTRL-B (002), etc. Next, the signal and its complement were verified as inputs to the TTI shift register at the S202 Flipchip B34 pins E and L.

The TT KBD IN (B) signal was verified going into the the TT IN ACT flip-flop S202 B38 Pin V.

The TT IN ACT flip-flop was confirmed to change state (roughly) coincident with TT KBD IN.

The TT IN ACT output enables the clock of the R450 Flipchip C40, thereby resetting its phase to match the incoming serial signal. Ten clock pulses were observed (which will turn out to be significant). The corresponding output of the Pulse Amplifier from the R450 C40 Pin E was also confirmed to have the corresponding 10 pulses, each pulse width going to GND (logic 1) for about 200ns. That length of time was later learned to be about half as long as it should have been according to the PDP-9 Maintenance Manual, but this was not related to any problem.

The TTI shift register (TTI0 - TTI7) is comprised of a cascaded chain of S202 flip-flops, with an adjacent pair in each of the S202 flip-chip boards B34, B35, B36 and B37. The data was confirmed to shift properly along all of the register stages. A bit of a tangent was that the signal on TTI7 pin S was found to be weak. The wave shape was square at baud rate time scale, but the voltage attained was about half the expected height. Flip-chips B35 and B37 were swapped to see if this was a driver or overload problem. But after the swap, the problem entirely disappeared. The boards were then switched back, and still the problem was no longer present. Presumably there was a bad connection or possibly a problem with an oscilloscope probe (which were a bit flaky throughout).

Regrouping from the dead end, the lights of the front panel were selected to show the TTI register and control characters were again sent. After trying many different characters a pattern was noted that the faulty data was consistent with an extra shift of the serial shift register. Every two adjacent character codes read the same on the TTI register. The expected data/parity bits showed up shifted one to the right in the right-most seven bits. For example, capital A (301 Octal) showed up as 011 100 000, so did B (302 Octal) and C (303 Octal) appeared as 011 000 001.

We reviewed section 3.9.1.1 Keyboard Control in the PDP-9 Maintenance Manual. This section states that the ninth TTI LOAD pulse disables subsequent TTI LOAD pulses. After more review of the operation of the IN LAST UNIT and TT IN ACT flip-flop functions, it was found that a tenth TTI LOAD clock was occurring, despite the IN LAST UNIT signal at S202 C40 Pin M seen to change state after nine pulses. This should have inhibited further clocks, so only nine TTI LOAD clock pulses should have been allowed. So the DCD gate in Flipchip R450 C40 was in question. That last pulse should not have passed through, and that is what caused the extra shift of the TTI register.

The R450 Flipchip in C40 was removed. All of the diodes were checked for correct voltage drop, and diode D7 was found to be open circuit. This diode is part of a voltage regulation circuit that provides bias voltages for other parts of the circuit. After this diode was replaced with a new D-662 device, the flip-chip was reinstalled in the PDP-9. After that point, the serial communications worked properly. And nine pulses were confirmed with the oscilloscope for good measure.

10/2/25

We disassembled the system and packed it for shipment to the new RICM Lab space at 1051 Ten Rod Road in North Kingstown.

Maindec Diagnostics

MAINDEC-9A-D0BA ISZ Test, 1/6/24

MAINDEC-9A-D0CA Memory Address Test, 1/17/24

MAINDEC-9A-D0DB JMP Self Test, 1/6/24

MAINDEC-9A-D0EA JMP-Y Interrupt Test, 1/6/24

MAINDEC-9A-D0FA JMS-Y Interrupt Test, 1/6/24

MAINDEC-9A-D01A Instruction Test Part 1, 1/17/24

MAINDEC-9A-D02A Instruction Test Part 2, 1/17/24

MAINDEC-9A-D1AA PDP-9 Basic Memory Checkerboard Test, 1/6/24

MAINDEC-9A-D1BA PDP-9 Extended Memory Checkerboard Test, 1/6/24

MAINDEC-9A-D1FA PDP-9 Extended Memory Address Test, 1/17/24

MAINDEC-9A-D2BA PDP-9 TTY Test, 1/17/24

MAINDEC-9A-D3BB TC02 Basic Exerciser, 1/1/22

MAINDEC-9A-D3RB TC02 DECtape Random Exerciser, 12/14/19

MAINDEC-9A-D7AD PDP-9 Basic Exerciser (no punch or tape reader), 5/18/19

MAINDEC-15-D4AF TC-59 Instruction Test, 12/3/22

The boards replaced in the PDP-9 Memory, Processor, and I/O so far are:

B131 Adder in slot A23 of the processor, replaced Q4, 2N3669, 3/17/19

B131 Adder in slot A21 of the processor, replaced Q1, Fairchild 2N3009, 7/24/21

B169 Inverter (Multiplexor) in slot B26 of the processor with a spare, 3/30/19

B169 Inverter (Multiplexor) in slot B31 of the processor with a spare, 12/8/20

B310 Delay Line in slot EF29 of the processor with a spare, 5/11/13

B310 Delay Line in slot EF29 of the processor with a repaired module, 6/15/13

B213 JAM Flip-Flop in slot H33 of the processor with a spare, 2/2/13

B213 JAM Flip-Flop in slot C39 of the processor with a spare, 3/23/19

B213 JAM Flip-Flop in slot C18 of the processor with a spare, 6/29/13

B213 JAM Flip-Flop in slot C35 of the processor with a spare, 10/5/13

B213 JAM Flip-Flop in slot C35 of the processor with a spare, 10/14/13

B213 JAM Flip-Flop in slot D20 of the processor with a spare, 6/22/13

B213 JAM Flip-Flop in slot D21 of the processor with a spare, 4/13/19

B213 JAM Flip-Flop in slot D27 of the processor with a spare

B213 JAM Flip-Flop in slot D28 of the processor with a spare, 3/16/13

B213 JAM Flip-Flop in slot H33 of the processor with a spare, 2/2/13

B213 JAM Flip-Flop in slot E20 of the I/O controller with a spare, 8/31/13

B213 JAM Flip-Flop in slot A16 of the Memory controller with a spare 7/29/23

B310 Delay Line in slot EF29 of the processor with a spare, 5/11/13

B301 Delay Line in slot H22 with a spare, 10/5/22

B310 Delay Line in slot EF36 of the Core Memory with a spare, put the original repaired board back 8/10/19

B360 Adjustable Delay Line in slot D33 of the Core Memory with a spare, 7/6/13

G009 Sense Amplifier in slot C25 of the Core Memory with a spare, 2/16/20

G009 Sense Amplifier in slot B24 of the Core Memory with a spare, 8/30/23

G009 Sense Amplifier in slot B25 of the Core Memory with a spare, 8/30/23

G219 Memory Selector in slot AB09 of the Core Memory with a spare, 2/2/13

G219 Memory Selector in slot HJ24 of the Core Memory with a spare, 2/16/13

G219 Memory Selector in slot AB07 of the Core Memory with a spare, 2/3/24

G920 Repaired, and repaired again. Replaced a diode with a 1N4149 for Microword 74, 5/18/19

R111 Diode Gate in slot H23 of the processor with a spare, 5/4/13

R111 NAND Gate in slot J20 of the I/O controller with a spare 9/14/22

R123 Diode Gate in slot D15 in the I/O controller, 7/13/13

R401 Clock Flip-Flop module in slot KD09-E03 of the I/O controller with a spare, 3/30/13

R450 Variable Clock module in slot C40, Replaced D7 with a new D662 diode, 9/19/25

S107 Inverter in slot H9, replaced Q4 with a NOS 2N3639, 12/3/22

S202 Dual Flip-Flop module in slot J7 of the I/O controller, Replaced Q1-Q4 with new 2N3639 transistors, 12/15/21

S202 Dual Flip-Flop module in slot J18 of the I/O controller, Replaced Q3 & Q4 with new 2N3639 transistors, 1/1/22

S202 Dual Flip-Flop module in slot J18 of the I/O controller, Replaced with a spare, 10/15/22

S203 Dual Flip-Flop module in slot E18 of the I/O controller, Replaced Q5 & Q6 with new 2N3639 transistors, 9/17/22

S205 Dual Flip-Flop module in slot D7 of the I/O controller with a lower drive R205 spare. We need to repair the S205 and put it back in the system, 3/30/13

S603 Triple Pulse Amplifier in slot J23 with a spare. Diode D42 on the original conducted in both directions, 2/10/14

S603 Triple Pulse Amplifier in slot J10 with a spare, 12/7/19

W040 Solenoid Driver in slot B33 of the processor, 2/1/20 replaced D2 & D7 with new 1N3606 diodes

The boards replaced in the TU20 Tape Drive so far are:

2N1304 transistor in the EOT circuit on the Photosense Amplifier in the tape transport

G287 Write Driver in slots A02-A06, replaced 2x 2N3500 transistors for tracks B, 8, 2, and Parity. Some of the diodes on theses modules have small cracks

R113 Diode Gate in slot B20 with a spare

R123 Diode Gate in slot B17 has poor drive to pin P. Working OK, but should be checked further. The R123 Diode Gate in slot B17 was actually an R203 flip-flop. It was replaced with the correct spare

R203 Triple Flip-Flop in slot B27 with a spare

R205 Dual Flip-Flop in slot B04 with a spare

R205 Dual Flip-Flop in slot B05 with a spare

R302 Dual Delay in slot B09 with a spare. Set trimpots to the same values as on the original

R302 Dual Delay in slot D29 with a spare. Set trimpots to the same values as on the original

R303 Integrating One-Shot in slot A21, replaced the open Trimpot

R401 Clock module in slot A15 with a spare

R602 Pulse Amplifier in slot B13 with a spare

R602 Pulse Amplifier in slot B16 with a spare

R603 Pulse Amplifier in slot A09 with a spare

W501 Schmitt Trigger in slot C10 with a spare

W501 Schmitt Trigger in slot D09 with a spare

The boards replaced in the TC59 Magnetic Tape Controller so far are:

R602 Pulse Amplifier in slot A21 with a repaired module, 8/17/13

W640 Pulse Amplifier in slot F22, replaced R17, Q8, and Q9, 11/2/13

W640 Pulse Amplifier in slot F30, replaced with a spare, 4/26/22

The boards replaced in the TC02 DECtape Tape Controller so far are:

G882 Reader/Writer in C23 with a donation from Anders, 4/20/19

R201 Flip-Flop in slot C02 with a spare, 8/10/19

S107 Inverter in slot C18 with a spare, 7/7/19

S107 Inverter in slot F18 replaced Q5, 7/21/19

S123 Diode Gate in slot F14 replaced Q3, 9/20/19

S202 Dual flip-flop from slot A5 needs repair, 8/10/19

S205 Dual flip-flop from slot B8 replaced D21 on 12/14/19

S603 Pulse Amplifier in slot C17, replaced D20 8/10/19

4918 18-Bit Indicator Bracket, replaced Q7 DEC6534 12/24/22

The boards replaced in the TU55 DECtape Tape Drives so far are:

G850 in slot A12 in the the top right drive, 11/29/19

G850 in slot A12in the the drive in the processor cabinet, replaced Q4, D14, D15, and the MDA 942-5 bridge, 1/4/23

G850 in slot A12in the the drive in the processor cabinet, replaced Q4, 11/27/24

To-Do:

Test all of the spare G009 FlipChips to segregate and repair the defective ones.

Check the length of the screws that are pushing the front panel overlay out of position.

Write a DECtape handler for UNIX V0 so we can boot UNIX from DECtape.

Increase the delay on the M output in the R302 in slot A24 from 40 us to 100 us so the DATA indicator on the console will light. (Done)

Fix Register lamp #6. (Done)

The system was disassembled for shipment and needs to be reassembled. (Done)

Find the four BC09 I/O cables to connect the TC59 to the PDP-9. (Don't have them. Maybe we can get some BC10 cables from the LCM)

If we don't have the cables we might be able to use seven cables from a PDP-8 or borrow some from another PDP-9/10/15 collector.

There is some unconfirmed information that when this system was in its last days of service they had problems with the ROPE memory for the microcode. There a rubber sheet that compresses the "E" cores together. We will need to replace it. We have several spare ROPE memory boards. We have no idea if they are good, or what microcode is programmed.

We have two spare 8k core stacks if we find problems with the core in the system. (Didn't, works OK)

We were also told that when someone was trying to fix the system they pulled modules while the power was still on. That may make it challenging to revive this system. (Nope)

This system uses some of the same transistor only R series Flip-chips as the PDP-8/S so we have some spares for the modules.

It also uses quite a bit of the faster B series modules. We have just a few spare B modules.

Fix the drive select for Unit 1 not working problem in the TC02 or TU55 (Done)

Find out why swapping the B141 flip-chips in slots B11 & B13 breaks the paper tape reader

Rewind the coil in the paper tape punch (Have the wire and a coil winder)

Fix the second 709 power supply and connected it to the paper tape punch

Fix the second TU55 DECtape drive (Done)

Determine why the PIE light doesn't go off when the I/O RESET switch is pressed. (Fixed 12/7/19)

Collect enough flipchips so we can add the EAE feature for SpaceWar! and UNIX V0

Collect the flipchips so we can add the 34H graphics option, also for Spacewar!

6x A601 3-Bit DAC, We have 4x, there are three in the AF01
2x A604 2-Bit DAC, We have 2x, there are two in the AF01
1x A704 10V Precision Power Supply, bought one from Will on eBay
1x R002 Diode Cluster
5x R111 Diode Cluster
2x R302 One Shot
1x S107 Inverter
1x S202 Dual Flip-Flop
7x S203 Triple Flip-Flop
1x S603 Pulse Amplifier
1x W681 Scope Intensifier

The rough restoration plan:

Reform the capacitors in the 709 power supply for the processor and test the power supply. (Done)

Reconnect the I/O cables for the paper tape reader/punch. (Done)

Find and connect the Teletype interface cable. This is actually on the PDP-11/23 that was connected to this system.

Power up the system and see what works. (Done)

There was some discussion that many of the light bulbs in the front panel were burned out.

(All of the Register, Memory Buffer, and Interrupt lights work.)

Reform the capacitors in the TU20 power supply and test the power supply. (Done)

Power up the TU20 and see what works. (Done)

Reform the capacitors in the TC59 power supply and test the power supply. (Done)

Connect the TC59 tape controller to the I/O section of the PDP-9 and to the TU20. (Done using borrowed PDP-8 I/O cables)

Debug the TC59 and the TU20. (In process)

Wire the DC power to the TC02 DECtape controller and connect the I/O cables between the processor and the TC02. (Done)

See if the TC02 responds to any IOT instructions. (Done)

Try the TC02 diagnostics. (Done)

Install a TU55 in the rack with the TC02 and TU59. (Done)

See if the DECtape works. (Done)

Once we get a DECtape working we can make an OS DECtape. (Done)

If the PDP-9 actually runs the OS, it will be the only one on the planet that can. (It is)

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