UMBC VLSI-SOC GROUP

The primary research areas include digital, analog, and mixed-signal CMOS ICs/SOCs for a variety of applications, verification and testing techniques for analog, digital and mixed-signal ICs, CAD tools for design and analysis of microprocessors and FPGAs, Automobile electronics, and biochips, as well as interdisciplinary research projects.

News:

  • January 14, 2020: Prof. Riadul will be serving as a Technical Program Committee (TPC) member of the IEEE/ACM DAC 2020 LBR Session, San Francisco, CA, USA.
  • January 5, 2020: Prof. Riadul will be serving as a Technical Program Committee (TPC) member of the IEEE TENSYMP 2020, Dhaka, Bangladesh.
  • December 10, 2019: Prof. Riadul will be serving as a Technical Program Committee (TPC) member of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI), Beijing, China.
  • August 25, 2019: New position available: I will be hiring fully-funded Ph.D. student in Fall 2020 in the area of VLSI, hardware security, neuromorphic computing, computer architecture, non-Von-Neumanm architecture, Quantum computing, machine learning, and related area. Please feel free to inform people if anyone interested in pursuing a Ph.D. at UMBC.
  • August 23, 2019: Dr. Islam joined UMBC as a tenure track assistant professor.
  • May 10, 2019: Our Conference article "Soft Voting-Based Ensemble Approach to Predict Early Stage DRC Violations" accepted for oral presentation at the IEEE 62nd International Midwest Symposium on Circuits & Systems MWSCAS19. Congratulations to the corresponding graduate student!!
  • March 26, 2019: Our Conference article "Predicting DRC Violations Using Ensemble Random Forest Algorithm" accepted in DAC19 Late Breaking Results (LBR) Session. Congratulations to the corresponding graduate student!!
  • March15, 2019: Prof. Riadul is invited to attend the upcoming NSF CAREER CISE Workshop at NSF Headquarters in Alexandria, VA.
  • March13, 2019: Call for paper Semiconductor Science and Information Devices Journal (.pdf), all submitted papers for the first 2 issues will be waived of Article Processing Charges (APC).
  • February 1, 2019: Our research highlighted in ACM SIGDA E-NEWSLETTER "Researcher Spotlight" section, published on 1 February 2019, Vol. 49, No. 2 .
  • January 21, 2019: Our Journal article "Low-Power Highly Reliable SET-Induced Dual-Node Upset Hardened Latch and Flip-Flop" accepted in IEEE Transactions on CJECE (CJECE) as a Regular Paper.
  • December 6, 2018: Our proposal entitled "Single Event Transient Induced Double Node Upset Hardened Memory System" received the Michigan space Grant Consortium (MSGC) grant Sponsored by NASA, Project period (1st January 2019 - 30 June 2020)!!
  • November 30, 2018: Our proposal entitled "Application of Machine Learning in CAN Bus Security" received the competitive ORSP Seed grant, Project period (1st January 2019 - 30th June 2020)!!
  • November 19, 2018: Our IEEE MWSCAS Conference article "TSPC-DICE: A single phase clock high performance SEU hardened flip-flop" reached more than "1000" downloads from IEEE Xplore Digital Library!!
  • October 5, 2018: Our Journal article "Negative Capacitance Clock Distribution" accepted in IEEE Transactions on Emerging Topics in Computing (TETC) as a Regular Paper.
  • October 1, 2018: Our Journal article "High-Speed On-Chip Signaling: Voltage or Current-Mode?" accepted in IETE Transactions on Journal of Research (TIJR) as a Regular Paper.
  • September 5, 2018: Our work highlighted in STMicroelectronics blog "UM-Dearborn Students Put ST in the Driver Seat of their Driverless Car."
  • August 16, 2018: Our Journal article "HCDN: Hybrid-Mode Clock Distribution Networks" accepted in IEEE Transactions on Circuits and Systems I (TCAS-I) as a Regular Paper.
  • August 9, 2018: Our IEEE TCAS-I Journal article "Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop" reached more than "1000" downloads from IEEE Xplore Digital Library!!
  • July 14, 2018: Prof. Riadul is in University of California Santa Cruz (UCSC) Alumnus News (Link).
  • June 12, 2018: Our Journal article "Low-Power Resonant Clocking Using Soft Error Robust Energy Recovery Flip-Flops" accepted in Springer Nature Journal of Electronic Testing: Theory and Applications (JETTA) as a Regular Paper.
  • May 14, 2018: Our Journal article "DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis" accepted in IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI) as a Regular Paper.
  • February 20, 2018: Our Conference article "Low-Jitter Hybrid-Mode Clock Distribution Networks " accepted in DAC18 WIP Session.
  • January 16, 2018: Dr. Riadul awarded with UCSC inventor IRP 2017 award (news).
  • December 8, 2017: Our MOSIS proposal got accepted.
  • October 10, 2017: Our US patent "Current-Mode Clock Distribution," issued.
  • September 1, 2017: Dr. Riadul Islam joined University of Michigan Dearborn ECE Department as an Assistant Professor.