9/1995 – 1/2001  STANFORD UNIVERTY, Stanford, CA
Ph.D. degree in Materials Science and Engineering (Advisor: Robert Sinclair)
Thesis title: Reactions and microstructural behavior at the Cu/Ta interfaces.

4/1998 – 1/2000 STANFORD UNIVERSITY, Stanford, CA.
Master of Science degree in Electrical Engineering (Advisor: S. Simon Wong)
- Analog/mixed circuit design,
- Device physics and silicon technology. 

3/1988 – 2/1990 KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, Seoul, Korea
Master of Science degree in Materials Science and Engineering (Advisor: Jai-Young Lee)
– Hydrogen storage metals and their applications to the heat pump.

3/1984 – 2/1988 SEOUL NATIONAL UNIVERSITY, Seoul, Korea
Bachelor of Science degree in Metallurgical Engineering
- Physical metallurgy and solid state physics.

3/2007 – present Sungkyunkwan University, Suwon, Korea
Professor, College of Information and Communication Engineering
– High Speed Serial Interface: USB, HDMI, LVDS, Inductive Link
– Energy Harvesting System, PMIC/BMIC
– Design for Testability (DFT) of 3-D IC.
– Standards and Specification.
– Cross-Point Memory Architecture with Resistive Memory Cells
– Non-Volatile Memory IP.

3/2006 – 2/2007 Hanyang University, Ansan, KOREA.
Assistant Professor, Division of Materials and Chemical Engineering
– Electronic Materials and Devices Lab.

1/2001 – 3/2006 SAMSUNG ELECTRONICS CO., LTD, Hwaseong, KOREA.
Principal Design Engineer in Advanced Technology Development Team (2/2005 – 2/2006)
– In charge of low power technology (Transistor, circuit & logic level approaches)
Principal Design Engineer in DRAM Design Team (1/2001 – 2/2005)
– Super High Performance DRAM design (tRC of 10ns, 10Gbps Data Rate)
– Advanced DRAM design including Direct Rambus DRAM and XDR DRAM.
– New memory development (PRAM, Scalable Gain-Cell Memory, Multimedia DRAM)
– Core circuit design for DRAM.

6/2000 – 1/2001 MAXIM INTEGRATED PRODUCTS, Sunnyvale, CA
Associate Member of Technical Staff
– 16-bit D/A converter design.
– Digital potentiometer design

6/1999 – 9/1999 INTEL Corporation, Portland, OR,
Summer Intern
– Diffusion and drift of copper in intermetallic dielectrics.
– Life time test (Bias Temperature Stressing) of intermetallic dielectrics.
– Copper/tantalum interaction at high temperature.

2/1990 – 7/1995 SAMSUNG ELECTRONICS CO., Semiconductor R&D Center, Kiheung, Korea
Staff Engineer
– In charge of developing thin capacitor dielectric films (SiO2, SiN, Ta2O5 and [BaSr]TiO3)
– Process modules to fabricate three dimensional capacitor structures for DRAM applications.
– Maintenance of chemical vapor deposition systems, furnaces, and sputters.
Leading member
– Joint development project with LAM RESEARCH CO., Fremont, CA (5/1991 – 11/1992)
– Development of CVD system for Ta2O5 thin film.
Acting member
– Joint 256Mb DRAM development project with NEC, Tokyo, Japan (1/1994 – 6/1995).
– Members: D. Chin, C.-G. Hwang, M.-Y. Lee, S.-T. Ahn, S.-W. Kim, E.S. Kim, & myself