Wonjae Lee (이원재)
PH.D. Candidates, School of EE, KAIST
Office: Woojungdang 104, Department of Semiconductor Systems Engineering, Science and Technology, 209, Neungdong-ro, Gwangjin-gu, Seoul, Republic of Korea / School of Elerical Engineering (E3-2), 5219, KAIST
Personal Information
Date of Birth : 1995.04.27
Place of Birth : Daegu
Hobby : Running
E-mail : wonjaelee@kaist.ac.kr
Education
Sangsan High School (Mar. 2011 - Feb. 2014)
KAIST, School of Electrical Engineering B.S. (Mar. 2014 - Aug. 2018)
KAIST, School of Electrical Engineering M.S. (Sep. 2018 - Aug. 2020)
KAIST, School of Electrical Engineering PH.D. (Sep. 2020 - Present)
Honors
Young Fellow Award @ 58th DAC (Dec. 2021)
Journal Papers
Daijoon Hyun, Wonjae Lee, Jinhyeong Park, and Youngsoo Shin, “Integrated power distribution network synthesis for mixed macro blocks and standard cells,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, issue 6, pp. 2211-2215, June 2023.
Conference Papers
Seunggyu Lee, Wonjae Lee, and Youngsoo Shin, “Integrated netlist synthesis and in-memory mapping for memristor-aided logic,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), Jun. 2024.
Wonjae Lee, Insu Cho, Gangmin Cho, and Youngsoo Shin, “Routability-driven power distribution network synthesis with IR-drop budgeting,” Proc. Workshop on Machine Learning for CAD (MLCAD), Sep. 2023.
Yoonsang Song, Gangmin Cho, Wonjae Lee, and Youngsoo Shin, “Simultaneous clock wire sizing and shield insertion for minimizing routing blockage,” Proc. Workshop on Machine Learning for CAD (MLCAD), Sep. 2023.
Wonjae Lee, Yonghwi Kwon, and Youngsoo Shin, “Fast ECO leakage optimization using graph convolutional network,” Proc. Great Lakes Symp. on VLSI (GLSVLSI), Sep. 2020. (Best Paper Award Candidate)