Members

Yebin Kim (김예빈)

B.S. Candidates, VLSi CAD Lab., Sejong UNIV.

Office: Chungmugwan 501B, Department of Semiconductor Systems Engineering, Science and Technology, 209, Neungdong-ro, Gwangjin-gu, Seoul, Republic of Korea

Personal Information

• • Date of Birth : January, 22th, 2003

  • Place of Birth : Yongin, Korea

  • Hobby : Reading books

  • E-mail : kyb030122@gmail.com

Education

• • Hyunam high school (Mar. 2019 - Feb. 2022)

  • B.S. Sejong University, Dept of Electronic and Telecommunication Engineering (Mar. 2022 - )

Publications

• • Yebin Kim, Jinil An, and Daijoon Hyun, "Circuit similarity based initial parameter sampling for tool parameter extraction," Proc. Int'l Symp. on Circuits and Systems (ISCAS), accepted.

Patents

• • Yebin Kim and Daijoon Hyun, "Circuit similarity based initial parameter sampling for tool parameter extraction," Korea patent 10-2025-0211658, Dec. 2025.