2021

[Oct. 2021] Two papers (including one collaborative work) have been accepted for regular presentation at IEEE International Solid-State Circuits Conference (ISSCC) 2022, Feb. 20-24, 2022 in San Francisco, CA!!!

[Oct. 2021] Prof. Kim will co-chair an Educational Session on Analog Automation Techniques at IEEE Custom Integrated Circuits Conference (CICC) 2022, Apr. 24-27, 2022 in Newport Beach, CA.

[Sep. 2021] Chengshuo has successfully presented our research work on zero-skipping reconfigurable in-memory computing macro at 2021 IEEE European Solid-State Circuits Conference (ESSCIRC).

[Sep. 2021] Henry Chang (MS student) joined Kim Group at UCSB! Welcome!!

[Sep. 2021] We have submitted our 17th (SQA) and 18th (TSA) test chips for fabrication using 65nm technology. Great job, Jahyun and Wonsik!

[Jul. 2021] Prof. Kim is guest-editing a Special Issue on Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS). Click here for more details. Submission deadline is Dec. 7, 2021.

[Jul. 2021] Prof. Kim has started serving on the Technical Program Committee (TPC) of the IEEE Custom Integrated Circuits Conference (CICC).

[Jul. 2021] Our work on Colonnade: Reconfigurable SRAM-based digital compute-in-memory has been published at IEEE Journal of Solid-State Circuits (JSSC), Jul. 2021!

[Jun. 2021] Junjie has successfully presented our research work on hybrid analog-digital CMOS annealer at 2021 Symposia on VLSI Technology and Circuits (VLSI).

[Jun. 2021] Two new PhD students, Siqi Li and Boxun Xu, will join Kim Group at UCSB starting in this Fall quarter of 2021! Welcome!!

[Jun. 2021] We have submitted our 16th test chip on the hardware accelerator for image processing. Great job, Zhengzhe and Junjie!

[May 2021] Our work on zero-skipping SRAM-based in-memory computing with binary-searching ADC has been accepted for presentation at IEEE European Solid-State Circuits Conference (ESSCIRC), September 6-9, 2021 in Grenoble, France! Congrats, Chengshuo!! This year, we present our research works at all four major IC design conferences (ISSCC, VLSI, CICC, and ESSCIRC)!

[May 2021] Our CICC paper (sparse and reconfigurable CMOS Ising chip) has been invited to the IEEE Journal of Solid-State Circuits (JSSC), March 2022 - the Special Issue of CICC 2021!

[May 2021] Four of our group members (Hyunjoon Kim, Junjie Mu, Yuqi Su, and Chengshuo Yu) have passed their PhD qualification exams at NTU, Singapore. Congratulations!

[Apr. 2021] Yuqi and Chengshuo have successfully presented our research works on CMOS annealing processor and time-domain wavefront computing at the IEEE CICC 2021.

[Apr. 2021] We have submitted 14th and 15th test chips on scalable hardware accelerators for fabrication using 65nm. Great job, Junjie and Yuqi! And, thanks a lot for leading the full-chip integration, Hyunjoon!

[Apr. 2021] Prof. Kim gave an invited virtual seminar on the Design of CMOS Annealing Processor for Solving Combinatorial Optimization Problems at the Department of Electrical Engineering, POSTECH (Pohang, South Korea) on April 23, 2021.

[Apr. 2021] Prof. Kim will give a tutorial on CMOS annealing processors at IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), June 6-9, 2021.

[Apr. 2021] Prof. Kim will give a tutorial on SRAM-based in-memory computing at IEEE International Symposium on Circuits and Systems (ISCAS), May 22-28, 2021.

[Apr. 2021] Jinesh Jhonsa (PhD student, UCSB) joined Kim Circuit Research Group. Welcome!

[Mar. 2021] Our work on hybrid analog-digital annealing computer has been accepted for presentation at 2021 Symposia on VLSI Technology and Circuits (VLSI), June 13-19, 2021!!! Congrats, Junjie and Yuqi!!

[Feb. 2021] Jahyun Koo (postdoc) and Wonsik Oh (PhD student) will join Kim Circuit Research Group @ UC Santa Barbara in March 2021. Welcome, Jahyun and Wonsik!!

[Feb. 2021] Prof. Kim has been elevated to the grade of IEEE Senior Member.

[Feb. 2021] Junjie has successfully presented our research work on bit-serial computing accelerator for solving partial differential equations at IEEE ISSCC 2021.

[Feb. 2021] Our work on sparse and reconfigurable Ising chip has been selected as one of the best student paper candidates at IEEE CICC 2021!

[Feb. 2021] Our work on SRAM-based digital compute-in-memory has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Hyunjoon!!

[Jan. 2021] Two papers (time-domain wavefront computing & sparse and reconfigurable Ising chip) have been accepted for presentation at IEEE CICC 2021, Apr 25-30, 2021!! Congrats, Chengshuo, Yuqi, and other co-authors!

[Jan. 2021] Prof. Kim joined Department of Electrical and Computer Engineering (ECE) at the UC Santa Barbara.

2020

[Nov. 2020] Our work on logic-compatible embedded DRAM based compute-in-memory has been accepted for publication at IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)! Congrats, Chengshuo!!

[Oct. 2020] Prof. Kim serves as technical program committee (TPC) member of Design Automation Conference (DAC) 2021. Research paper abstract/manuscript submission deadline for DAC'21 (San Francisco, Jul. 2021) is 16 & 23 Nov. 2019. Check out DAC'21 website (http://dac.com).

[Oct. 2020] Our work on bit-serial computing graph accelerator for solving partial differential equations has been accepted for regular presentation at IEEE ISSCC 2021, Feb. 14-18, 2021 in San Francisco!! Congratulations, Junjie!!!

[Aug. 2020] We have submitted 11th (CO2), 12th (GAL), and 13th (SRT) test-chips for fabrication using 65nm. Great job, Hyunjoon, Jaeho, and Chengshuo!

[Jul. 2020] Zhengzhe Wei joins Kim Circuit Research Group as a PhD student starting Jul. 2020. Welcome, Zhengzhe!

[Apr. 2020] We have submitted 9th (PDE) and 10th (TKP) test-chips for fabrication using 65nm technology.

[Apr. 2020] Our stochastic computing paper and its presentation is now available online at the virtual DATE 2020 conference. You can also find the DATE paper in publication tab.

[Mar. 2020] Chengshuo has successfully presented our research work on current-mode 8T SRAM-based compute-in-memory at IEEE CICC 2020. Both paper and slides are available in publication tab.

[Feb. 2020] Yuqi has successfully presented our research work (CIM-Spin) on digital compute-in-memory annealing processor at IEEE ISSCC 2020. Both paper and slides are available in publication tab.

[Feb. 2020] Hyunjoon has successfully presented our research work on reconfigurable digital compute-in-memory at tinyML Summit 2020.

[Jan. 2020] Our 7th and 8th test-chips have been submitted for fabrication using 65nm technology. Great job, Junjie!

[Jan. 2020] Our current-mode 8T SRAM based compute-in-memory work has been accepted for regular oral presentation at IEEE CICC 2020, Mar. 22-25, 2020 in Boston, MA. Congratulations, Chengshuo and Taegeun!!

[Jan. 2020] Our embedded Flash based compute-in-memory work has been accepted for lecture presentation at IEEE ISCAS 2020, May 17-20, 2020 in Seville, Spain. Congrats, Junjie! A collaboration work with Prof. T. Kim on ReRAM based compute-in-memory also has been accepted for presentation.

2019

[Dec. 2019] Yuqi has been selected as a recipient of 2020 ISSCC Student Travel Grant Award sponsored by IEEE Solid-State Circuits Society (SSCS).

[Nov. 2019] We will present our reconfigurable digital compute-in-memory (Colonnade) work at tinyML Summit 2020, Feb. 12-13, 2020 in San Jose, CA.

[Nov. 2019] Hyunjoon has successfully presented our research work on SRAM-based voltage-mode in-memory computing (ACCURA) at IEEE ASSCC 2019. Both paper and slides are available in publication tab.

[Nov. 2019] Our first MRAM test-chip, a collaborative work with IME, A*STAR, has been submitted for fabrication. Great job, Junjie and Yuqi!

[Oct. 2019] Our work on stochastic-binary computing has been accepted for presentation at DATE 2020, Mar. 9-13, 2020 in Grenoble, France!!

[Oct. 2019] Our work (CIM-Spin) on CMOS digital compute-in-memory annealing processor for solving combinatorial optimization problems has been accepted for regular presentation at IEEE ISSCC 2020, Feb. 16-20, 2020 in San Francisco!!! Congrats, Yuqi and Hyunjoon!

[Oct. 2019] Prof. Kim gave invited talks on memory-centric computing at Samsung Research (SR) in Seoul and POSTECH in Pohang, South Korea.

[Oct. 2019] Prof. Kim has presented an invited special session paper on reconfigurable digital in-memory computing at ISOCC 2019 in Jeju, South Korea.

[Sep. 2019] Prof. Kim has started serving as a technical program committee (TPC) member of Design Automation Conference (DAC). Research paper abstract/manuscript submission deadline for DAC'20 (San Francisco, Jul. 2020) is 21 & 27 Nov. 2019. Please check out DAC'20 website (http://dac.com).

[Sep. 2019] Hyunjoon has successfully presented our research work on reconfigurable digital in-memory computing (Colonnade) at IEEE ESSCIRC 2019. Both paper and slides are available in publication tab.

[Sep. 2019] Nine (4 URECA and 5 Research Interns) NTU undergrad students joined our research projects on smart design automation and GAN hardware accelerator. Welcome!

[Sep. 2019] Prof. Kim has presented a special session paper on mixed-signal in-memory computing at IEEE SOCC 2019 in Singapore.

[Aug. 2019] Nabeel Najeeb and Shicheng Lyu join Mixed-Signal Lab for their MS dissertation projects starting Aug. 2019. Welcome!

[Aug. 2019] We are looking for a postdoc who will work on "memory-centric computing circuits/architecture for machine learning hardware". Please contact Prof. Kim via email (bjkim AT ntu.edu.sg) with your CV.

[Aug. 2019] We are looking for undergrad/master students (in Singapore) who will join our research projects. If you are interested, please contact Prof. Kim via email (bjkim AT ntu.edu.sg) with your CV or brief self-introduction.

[Aug. 2019] We are looking for NTU undergrad students who will join our NTU student research programs (URECA, UROP, and FYP). If interested, please send email to Prof. Kim (bjkim AT ntu.edu.sg).

[Aug. 2019] Our paper on SRAM-based mixed-signal in-memory computing (ACCURA) has been accepted to IEEE ASSCC 2019! Congrats, Hyunjoon! The paper will be presented as a regular lecture on November in Macao, China.

[Jul. 2019] Taegeun has successfully presented our research work on eDRAM based in-memory computing at ISLPED 2019.

[Jul. 2019] Prof. Kim will present an invited special session paper on mixed-signal in-memory computing at IEEE SOCC 2019 on September in Singapore.

[Jul. 2019] Jaeho Lee joins Mixed-Signal Lab as a research staff (project officer) starting Aug. 2019. Welcome, Jaeho!

[Jun. 2019] Chengshuo Yu joins Mixed-Signal Lab and starts his PhD study starting July 2019. Welcome, Chengshuo!

[May 2019] Our sixth test-chip (FTT) has been submitted for fabrication using 65nm technology.

[May 2019] Our fifth test-chip (ANN) has been submitted for fabrication using 65nm technology.

[May 2019] Our paper on reconfigurable digital in-memory computing (Colonnade) has been accepted to IEEE ESSCIRC 2019! Congrats, Hyunjoon! The paper will be presented as a regular lecture on September in Krakow, Poland.

[May 2019] Our paper on eDRAM based in-memory computing has been accepted to ACM/IEEE ISLPED 2019! Congrats, Taegeun! The paper will be presented as a regular lecture on July in EPFL, Switzerland.

[Mar. 2019] We are looking for a Research Associate (with MS degree and IC design experience) who will work on mixed-signal circuit designs. Please e-mail me with your CV.

[Feb. 2019] Hyunjoon has successfully presented his research preview on analog in-memory computing work at ISSCC 2019.

[Jan. 2019] Hyunjoon has been selected as a recipient of the 2019 ISSCC Student Travel Grant Awards (STGA). Congrats!

2018

[Dec. 2018] Yuqi Su joins Mixed-Signal Lab and starts his PhD study starting January 2019. Welcome, Yuqi!

[Nov. 2018] Hyunjoon (co-author: Qian) will present our analog in-memory computing work in ISSCC 2019 Student Research Preview (SRP). Congrats!

[Sep. 2018] Our fourth test-chip (QUEEN) has been submitted for fabrication using 65nm technology.

[Aug. 2018] Prof. Kim is currently serving as an editorial review board for IEEE Solid-State Circuits Letter (SSC-L).

[Jul. 2018] We have 1 PhD student opening (with full scholarship) for January 2019 intake. If interested, please contact me via e-mail with your CV.

[Jul. 2018] Hyunjoon Kim and Junjie Mu start their PhD study starting August 2018

[Jul. 2018] Junjie Mu joined Mixed-Signal Lab as a Research Associate. Welcome!

[Jun. 2018] We are actively looking for a passionate PhD student (Jan. 2019 intake) who are interested in both Machine Learning and Integrated Circuit design. If you're interested, please contact me via e-mail (bjkim AT ntu.edu.sg) with your CV.

[Apr. 2018] Our third test-chip (ConvSensor), a collaborative work on DNN with Prof. Tony T. Kim, has been submitted for fabrication using 65nm technology.

[Apr. 2018] Hyunjoon Kim joined Mixed-Signal Lab as a Research Associate. Welcome!

[Apr. 2018] Our first (VTRON) and second (MECA) test-chips have been submitted for fabrication using 65nm technology.

2017

[Nov. 2017] Prof. Kim gave an invited talk on "Efficient Binary Neural Network Array" at Samsung Advanced Institute of Technology (SAIT) in Suwon, South Korea.

[Sep. 2017] Qian Chen joined Mixed-Signal Lab as a PhD student. Welcome!

[Sep. 2017] Prof. Bongjin Kim joined Nanyang Technological University (NTU) in Singapore as an Assistant Professor in School of Electrical and Electronic Engineering (EEE) on Sep. 2017.