2024

[Announcement] VLSI Research Lab develops Circuits & Systems for Sustainable Computing & Communication. Members page features the great achievements of our previous and current group members.

[Announcement] 2025년 가을학기 대학원 및 봄/여름학기 학부 개별연구/인턴 지원자는 CV+성적표와 함께 이메일로 연락주세요. 국비, 카이스트, 반도체 산학프로그램 (KEPSI, EPSS), 일반 (학술연수) 장학생등 다양한 대학원 프로그램에 대한 정보는 학부 및 입학처 홈페이지에서 확인해주세요.

[Oct. 2024] Prof. Kim will co-chair Session 2 (ML, Cryogenic, and Ising Machine) of ISSCC 2025 Student Research Preview (SRP), which will be held in San Francisco, CA, on Sunday, Feb. 16, 2025.

[Oct. 2024] Yihao Wu will present a preview of his research work on Digital Ising Computing in ISSCC 2025 Student Research Preview (SRP).

[Sep. 2024] Kim Circuit Research Lab will move to the School of Electrical Engineering (EE) of Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in January 2025.

[Aug. 2024] Prof. Kim will give a tutorial on "ASIC Hardware Solvers for Compute-Intensive Optimization Problems" at the 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 18-21, 2024, in Hiroshima, Japan. Here's the link to the tutorial webpage.

[Aug. 2024] Prof. Kim has been invited to serve as a Student Research Preview (SRP) committee member of the 2025 IEEE International Solid-State Circuits Conference (ISSCC), which will be held in San Francisco, CA, on Feb. 2025.

[Aug. 2024] Our work on a new type of mixed-signal Ising machine (ROC-Spin) using a novel Ring-Oscillator-Collapse spin circuit has been accepted for presentation at the 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC), November 18-21, 2024, in Hiroshima, Japan!! Congrats, Yuqi!

[Aug. 2024] We have completed the design of our 31st test chip (in collaboration with SLAC), which will be fabricated using 28nm technology.

[Jul. 2024] Prof. Kim has been invited and will serve as a Technical Program Committee (TPC) member of the IEEE European Solid-State Electronics Conference (ESSERC) 2025, which will be held in Munich, Germany, on Sep. 2025.

[Jun. 2024] Junjie Mu will join Huawei Technologies in Shanghai, China, as an Architecture Engineer in July 2024. Congratulations, Dr. Mu!

[Jun. 2024] A TCAS-I paper entitled, "A Dual 7T SRAM-Based Zero-Skipping Compute-In-Memory Macro With 1-6b Binary Searching ADCs for Processing Quantized Neural Networks" has been published and is now available in IEEE Xplore Early Access.

[Jun. 2024] Our work on a dual 7T analog SRAM-based Compute-in-Memory macro for quantized neural networks has been accepted for publication in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)! Congratulations, Chengshuo!!

[May 2024] We have submitted the 30th test chip (MAY) for fabrication using 65nm technology.

[May 2024] Chengshuo Yu passed his final oral Ph.D. defense! Congratulations!! Dr. Yu will join the Zhangjiang Lab of the Chinese Academy of Science in Shanghai, China.

[Apr. 2024] We have submitted the 29th test chip (ONE) for fabrication using 65nm technology.

[Mar. 2024] Yuqi Su has been selected as one of the IEEE SSCS Rising Stars 2024.

[Feb. 2024] A paper on Quantized Context-based Neurons for Recurrent Spiking Neural Networks has been accepted for presentation at the NICE (Neuro-Inspired Computational Elements) Conference 2024, Apr. 23-26, 2024, to be held in La Jolla, CA. This work is an outcome of the ECE 224A (VLSI Project Design) class I taught in the Fall quarter of 2023. Congrats, Sai and other co-authors!

[Feb. 2024] Jooyoung and Chaeyun have successfully presented our research works on Ising Computing (Session 15. Embedded Memories & Ising Computing) and a Boolean Satisfiability Solver (Session 30. Domain-Specific Computing & Digital Accelerators) at IEEE ISSCC 2024. 

[Feb. 2024] Yuqi Su has joined the School of Electronic and Computer Engineering at Peking University as a Tenure-Track Assistant Professor. Many Congratulations, Professor Su!!!

[Feb. 2024] A JSSC paper entitled "A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations" has been published and is now available in IEEE Xplore Early Access.

[Jan. 2024] Our work on a bit-serial compute-near-memory hardware accelerator for solving 2D/3D PDEs has been accepted for publication in the IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Junjie!! This marks our 10th JSSC paper since we published our first JSSC paper in July 2021. JSSC is considered the foremost journal in the IEEE Solid-State Circuits Society (SSCS). We are proud of our previous/current group members!

[Jan. 2024] A JSSC paper entitled "FlexSpin: A CMOS Ising Machine with 256 Flexible Spin Processing Elements with 8b Coefficients for Solving Combinatorial Optimization Problems" has been published and is now available in IEEE Xplore Early Access.

[Jan. 2024] Prof. Kim has received the recognition of an Outstanding Reviewer by the IEEE Solid-State Circuits Society (SSCS).

[Jan. 2024] Our work on a reconfigurable Ising machine (FlexSpin) has been accepted for publication in the IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Yuqi!!

[Jan. 2024] We have an incoming group member, Doeun Sim, a visiting MS student from EE, POSTECH, South Korea. Welcome to Santa Barbara!

2023

[Dec. 2023] Prof. Kim has received a prestigious NSF CAREER Award. We will develop unconventional ASIC hardware accelerators for scalable Ising computing to solve computationally intensive problems.

[Dec. 2023] Prof. Kim has visited the ARTIC lab (Prof. Masato Motomura) at the Tokyo Institute of Technology (Tokyo Tech) and the Kuroda lab (Prof. Tadahiro Kuroda) at the University of Tokyo for research discussions and presentations.

[Dec. 2023] Chengshuo has been awarded a prestigious IEEE SSCS Pre-Doctoral Achievement Award for 2024! Congratulations, Chengshuo!!

[Nov. 2023] Prof. Kim has been invited and will serve as the Associate Editor of the IEEE Solid-State Circuits Letters (SSCL) starting Jan. 1, 2024.

[Oct. 2023] Three papers (VIP-Sat, e-Chimera, and LISA) have been accepted for presentation at IEEE International Solid-State Circuits Conference (ISSCC) 2024, Feb. 18-22, 2024 in San Francisco, CA!!! Congratulations, Jooyoung, Chaeyun, and Jahyun!

[Oct. 2023] An invited JSSC paper (ISSCC 2023 Special Issue), entitled "CTLE-Ising: A Continuous-Time Latch-Based Ising Machine Featuring One-Shot Fully Parallel Spin Updates and Equalization of Spin States," has been published and is now available in IEEE Xplore Early Access.

[Sep. 2023] Our invited paper on the Continuous-Time Latch-based Ising Machine (CTLE-Ising) has been accepted for publication at the IEEE Journal of Solid-State Circuits (JSSC), Special Issue of ISSCC 2023! Congratulations, Jooyoung!!

[Aug. 2023] Yuqi has successfully passed his Ph.D. defense! Congratulations, Dr. Su!!

[Aug. 2023] An SSCL paper, "A Reconfigurable CMOS Ising Machine with ThreeBody Spin Interactions for Solving Boolean Satisfiability with Direct Mapping," has been published and is now available in IEEE Xplore Early Access.

[Aug. 2023] Our invited paper on the Reconfigurable Ising machine for solving Boolean Satisfiability (SAT) Problems has been accepted for publication at IEEE Solid-State Circuits Letter (SSCL)! Congratulations, Yuqi!!

[Jun. 2023] Junjie has successfully presented our work on Bit-Serial Coupled PDE Solver (Circuits Session 7. Digital Systems) at the 2023 Symposium on VLSI Technology and Circuits (VLSI) in Kyoto, Japan.

[Jun. 2023] We have many incoming group members in Summer/Fall 2023 quarter. Yihao Wu (Ph.D. student), Chanwho Park, Beomseok Hah, Hyosik Kim (MS student), Edward Choi (Visiting Ph.D. student from KAIST) who will join in Fall, as well as Yudong Zhou (Remote intern, Zhejiang University), Jaebum Yoo (UCSB with MS degree), Ryan Hsieh, Haechan Park (UCSB BS students) who will work with us starting this Summer. Welcome everyone!

[Jun. 2023] Our CICC paper (Reconfigurable Ising Machine for Boolean Satisfiability Problems) has been invited to the IEEE Solid-State Circuits Letters (SSCL), Special Issue of CICC 2023!

[May 2023] Chaeyun has received the Outstanding ECE Teaching Assistant Award for Spring 2022 - Winter 2023! Great job, Chaeyun!!

[May 2023] Hyunjoon and Junjie have successfully passed their Ph.D. defenses! Congratulations, Dr. Kim and Dr. Mu!!!

[Apr. 2023] Our CTLE-Ising paper presented at the ISSCC 2023 has been featured as one of the highlighted papers in the IEEE Computer magazine article "Semiconductor Architectures Enable Compute in Memory." Read the article here. 

[Apr. 2023] Prof. Kim presented a special seminar on "Mixed-Signal/Digital Memory-Centric Computing" hosted by KAIST AI PIM Research Center.

[Apr. 2023] We have successfully presented two quantum-inspired Ising machine papers (reconfigurable digital and continuous-time analog) at the IEEE CICC 2023 in San Antonio, TX.

[Apr. 2023] Our ISSCC paper (CTLE-Ising: A Continuous-Time Latch-based Ising Machine) has been invited to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue of ISSCC 2023!

[Mar. 2023] Our work on bit-serial computing coupled PDE solver has been accepted for presentation at 2023 Symposia on VLSI Technology and Circuits (VLSI), June 11-16, 2023, in Kyoto, Japan!!! Congrats, Junjie and Chengshuo!!

[Mar. 2023] Prof. Kim will chair Session 7 (Compute in Memory and Ising Machines) together with Prof. Yongpan Liu from Tsinghua University at the upcoming IEEE Custom Integrated Circuits Conference (CICC) 2023 on Apr. 24 (Monday), 2023, in San Antonio, TX. See the detailed schedule for the session here.

[Mar. 2023] We have submitted 27th and 28th test-chips for fabrication on memory-centric/quantum-inspired computing using 65nm technology.

[Feb. 2023] Jooyoung has successfully presented our work on CTLE-Ising: A Continuous-Time Latch-based Ising Machine (Session 7. SRAM Compute-in-Memory) at IEEE ISSCC 2023 in San Francisco, CA. The paper is selected as one of the top papers of ISSCC 2023 by the Memory Subcommittee.

[Jan. 2023] A JSSC paper entitled, "A Time-Domain Wavefront Computing Accelerator With a 32x32 Reconfigurable PE Array," has been published and is now available in IEEE Xplore Early Access.

[Jan. 2023] Two papers (SAT solver and Ising machine) have been accepted for lecture presentations at the IEEE Custom Integrated Circuits Conference (CICC) 2023, Apr. 23-26, 2023, in San Antonio, TX. Congratulations, Yuqi, Chengshuo, and all other co-authors!!

[Jan. 2023] A TCAS-I paper entitled, "A 1-16b Reconfigurable 80Kb 7T SRAM-Based Digital Near-Memory Computing Macro for Processing Neural Networks," has been published and is now available in IEEE Xplore Early Access.

[Jan. 2023] Our work on a time-domain wavefront computing accelerator has been accepted for publication in the IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Chengshuo!!

2022

[Dec. 2022] Yuqi has been awarded a prestigious IEEE SSCS pre-doctoral achievement award for 2023! Congratulations, Yuqi!!!

[Dec. 2022] Our work on SRAM-based digital near-memory computing macro has been accepted for publication at IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)! Congrats, Hyunjoon!! 

[Dec. 2022] Yuqi (PhD) started working at IME (Institute of Microelectronics), A*STAR, Singapore as a full-time researcher. Congratulations, and wish you all the best in your new journey!

[Nov. 2022] We are going to work on a new research project on DRAM interface circuits for AI/ML applications supported by Samsung Electronics.

[Oct. 2022] Our SRC AI Hardware proposal has been selected for funding for 3 years! We are going to work on a research project on the design of a reconfigurable digital compute-in-memory macro/processor for edge/cloud DL acceleration.

[Oct. 2022] Our work on a continuous-time latch-based Ising machine has been accepted for regular presentation at the IEEE International Solid-State Circuits Conference (ISSCC) 2023, Feb. 19-23, 2023 in San Francisco, CA!!! Congratulations, Jooyoung, Wonsik, and Jahyun!

[Sep. 2022] Chengshuo has successfully presented our research work on Bit-Serial Computing Accelerator for Solving 2D/3D PDEs based on Numerical Methods at IEEE ESSCIRC 2022.

[Sep 2022] Hyunjoon (PhD) will join SLAC National Accelerator Lab at Stanford University (CA) as a full-time researcher, and Junjie (PhD) will work as a postdoc at Nanyang Technological University (Singapore). Congratulations, and wish you all the best for your next journey!

[Jul 2022] We have submitted our 26th test chip with IME (Institute of Microelectronics), A*STAR, Singapore, using 28nm technology.

[Jul 2022] Prof. Kim's co-edited book, "Processing-in-Memory for AI: From Circuits to Systems" has been published and is currently available at Springer and other online bookstores including Amazon. The front book cover is available here.

[Jun 2022] We have 3 incoming group members in the Fall 2022 quarter at the UCSB. Chaeyun Shim (Ph.D. student), Jong Hyun Park (MS student), and Aditya Ramakrishnan (Undergraduate Project student). Look forward to working with our new group members!

[Jun 2022] A Special Issue on Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) has been published. Prof. Kim has served as a Guest Editor for the Special Issue. Guest Editorial is available here.

[May 2022] Our work on a scalable bit-serial computing hardware accelerator for solving 2D/3D partial differential equations has been accepted for presentation at IEEE European Solid-State Circuits Conference (ESSCIRC), September 19-22, 2022 in Milan, Italy! Congrats, Junjie!!

[May 2022] A JSSC paper entitled, "A Dynamic-Precision Bit-Serial Computing Hardware Accelerator for Solving Partial Differential Equations Using Finite Difference Method," has been published and is now available in IEEE Xplore Early Access.

[May 2022] Our work on Bit-Serial Computing Hardware Accelerator for solving Partial Differential Equations has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Junjie!! This year, we have four JSSC papers published/accepted, so far!

[May 2022] Jooyoung Bae (PhD student, UCSB) joined Kim Circuit Research Group. Welcome!

[Apr. 2022] Prof. Kim will chair the Educational Session 1 (Analog Automation Techniques) at the upcoming IEEE Custom Integrated Circuits Conference (CICC) 2022. The Educational session will be held in a hybrid model (both in-person and online) on Apr. 24 (Sunday), 2022 in Newport Beach, CA. See the detailed schedule for the session here.

[Apr. 2022] We have submitted the 24th/25th test chips on in-memory computing and analog Ising machine for fabrication using 65nm technology.

[Apr. 2022] We have submitted the 22nd/23rd test chips on quantum-inspired computing for fabrication using 65nm technology.

[Apr. 2022] A JSSC paper entitled, "A 65nm 8T SRAM Compute-in-Memory Macro With Column ADCs for Processing Neural Networks," has been published and is now available in IEEE Xplore Early Access.

[Mar. 2022] Our work on 8T SRAM Compute-In-Memory Macro with Column ADCs has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Chengshuo!! 

[Mar. 2022] A JETCAS paper entitled, "An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning," has been published and is now available in IEEE Xplore Early Access.

[Mar. 2022] A TCAS-I paper entitled, "SRAM-Based In-Memory Computing Macro Featuring Voltage-Mode Accumulator and Row-by-Row ADC for Processing Neural Networks," has been published and is now available in IEEE Xplore Early Access.

[Feb. 2022] Yuqi has successfully presented our research work on FlexSpin: Scalable CMOS Ising Machine with Flexible Spin Processing Elements at IEEE ISSCC 2022. The recorded presentation video is currently available for your watching on the virtual ISSCC platform if you're registered.

[Feb. 2022] We have submitted the 20th/21st test chips on the Maxwell equation solver and Ising machine for fabrication using 65nm.

[Feb. 2022] Our work on SRAM-based voltage-mode in-memory computing has been accepted for publication at IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)! Congrats, Junjie!! 

[Jan. 2022] An invited JSSC paper (CICC 2021 Special Issue) entitled, "A Scalable CMOS Ising Computer Featuring Sparse and Reconfigurable Spin Interconnects for Solving Combinatorial Optimization Problems," has been published and is now available in IEEE Xplore Early Access.

[Jan. 2022] A JSSC paper entitled, "CIM-Spin: A Scalable CMOS Annealing Processor with Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems," has been published and is now available in IEEE Xplore Early Access.

[Jan. 2022] Our invited paper on Sparse and Reconfigurable Ising machine has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC) in March, the Special Issue of CICC 2021! Congratulations, Yuqi!! 

2021

[Dec. 2021] Our work on CIM-Spin: CMOS Ising machine (annealing processor) has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Yuqi!! 

[Dec. 2021] Prof. Kim serves as a Track Chair for New Memory Technology and Processing in Memory for AI at IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) 2022, Jun. 13-15, 2022 in Incheon, South Korea.

[Nov. 2021] We have submitted our 19th (ISA) test chip for fabrication using 65nm technology. Great efforts, Jinesh and Jahyun!

[Oct. 2021] Two papers (including one collaborative work) have been accepted for regular presentation at IEEE International Solid-State Circuits Conference (ISSCC) 2022, Feb. 20-24, 2022 in San Francisco, CA!!!

[Oct. 2021] Prof. Kim will co-chair an Educational Session on Analog Automation Techniques at IEEE Custom Integrated Circuits Conference (CICC) 2022, Apr. 24-27, 2022 in Newport Beach, CA.

[Sep. 2021] Chengshuo has successfully presented our research work on zero-skipping reconfigurable in-memory computing macro at 2021 IEEE European Solid-State Circuits Conference (ESSCIRC).

[Sep. 2021] Henry Chang (MS student) joined Kim Group at UCSB! Welcome!!

[Sep. 2021] We have submitted our 17th (SQA) and 18th (TSA) test chips for fabrication using 65nm technology. Great job, Jahyun and Wonsik!

[Jul. 2021] Prof. Kim is guest-editing a Special Issue on Revolution of AI and Machine Learning with Processing-in-Memory (PIM): from Systems, Architectures, to Circuits of the  IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS). Click here for more details. Submission deadline is Dec. 7, 2021.

[Jul. 2021] Prof. Kim has started serving on the Technical Program Committee (TPC) of the IEEE Custom Integrated Circuits Conference (CICC).

[Jul. 2021] Our work on Colonnade: Reconfigurable SRAM-based digital compute-in-memory has been published at IEEE Journal of Solid-State Circuits (JSSC), Jul. 2021!

[Jun. 2021] Junjie has successfully presented our research work on hybrid analog-digital CMOS annealer at 2021 Symposia on VLSI Technology and Circuits (VLSI).

[Jun. 2021] Two new PhD students, Siqi Li and Boxun Xu, will join Kim Group at UCSB starting in this Fall quarter of 2021! Welcome!!

[Jun. 2021] We have submitted our 16th test chip on the hardware accelerator for image processing. Great job, Zhengzhe and Junjie!

[May 2021] Our work on zero-skipping SRAM-based in-memory computing with binary-searching ADC has been accepted for presentation at IEEE European Solid-State Circuits Conference (ESSCIRC), September 6-9, 2021 in Grenoble, France! Congrats, Chengshuo!! This year, we present our research works at all four major IC design conferences (ISSCC, VLSI, CICC, and ESSCIRC)!

[May 2021] Our CICC paper (sparse and reconfigurable CMOS Ising chip) has been invited to the IEEE Journal of Solid-State Circuits (JSSC), March 2022 - the Special Issue of CICC 2021!

[May 2021] Four of our group members (Hyunjoon Kim, Junjie Mu, Yuqi Su, and Chengshuo Yu) have passed their PhD qualification exams at NTU, Singapore. Congratulations!

[Apr. 2021] Yuqi and Chengshuo have successfully presented our research works on CMOS annealing processor and time-domain wavefront computing at the IEEE CICC 2021.

[Apr. 2021] We have submitted 14th and 15th test chips on scalable hardware accelerators for fabrication using 65nm. Great job, Junjie and Yuqi! And, thanks a lot for leading the full-chip integration, Hyunjoon!

[Apr. 2021] Prof. Kim gave an invited virtual seminar on the Design of CMOS Annealing Processor for Solving Combinatorial Optimization Problems at the Department of Electrical Engineering, POSTECH (Pohang, South Korea) on April 23, 2021.

[Apr. 2021] Prof. Kim will give a tutorial on CMOS annealing processors at IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), June 6-9, 2021.

[Apr. 2021] Prof. Kim will give a tutorial on SRAM-based in-memory computing at IEEE International Symposium on Circuits and Systems (ISCAS), May 22-28, 2021.

[Apr. 2021] Jinesh Jhonsa (PhD student, UCSB) joined Kim Circuit Research Group. Welcome!

[Mar. 2021] Our work on hybrid analog-digital annealing computer has been accepted for presentation at 2021 Symposia on VLSI Technology and Circuits (VLSI), June 13-19, 2021!!! Congrats, Junjie and Yuqi!!

[Feb. 2021] Jahyun Koo (postdoc) and Wonsik Oh (PhD student) will join Kim Circuit Research Group @ UC Santa Barbara in March 2021. Welcome, Jahyun and Wonsik!!

[Feb. 2021] Prof. Kim has been elevated to the grade of IEEE Senior Member.

[Feb. 2021] Junjie has successfully presented our research work on bit-serial computing accelerator for solving partial differential equations at IEEE ISSCC 2021.

[Feb. 2021] Our work on sparse and reconfigurable Ising chip has been selected as one of the best student paper candidates at IEEE CICC 2021!

[Feb. 2021] Our work on SRAM-based digital compute-in-memory has been accepted for publication at IEEE Journal of Solid-State Circuits (JSSC)! Congrats, Hyunjoon!!

[Jan. 2021] Two papers (time-domain wavefront computing & sparse and reconfigurable Ising chip) have been accepted for presentation at IEEE CICC 2021, Apr 25-30, 2021!! Congrats, Chengshuo, Yuqi, and other co-authors!

[Jan. 2021] Prof. Kim joined Department of Electrical and Computer Engineering (ECE) at the UC Santa Barbara. 

2020

[Nov. 2020] Our work on logic-compatible embedded DRAM based compute-in-memory has been accepted for publication at IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)! Congrats, Chengshuo!!

[Oct. 2020] Prof. Kim serves as technical program committee (TPC) member of Design Automation Conference (DAC) 2021. Research paper abstract/manuscript submission deadline for DAC'21 (San Francisco, Jul. 2021) is 16 & 23 Nov. 2019. Check out DAC'21 website (http://dac.com).

[Oct. 2020] Our work on bit-serial computing graph accelerator for solving partial differential equations has been accepted for regular presentation at IEEE ISSCC 2021, Feb. 14-18, 2021 in San Francisco!! Congratulations, Junjie!!!

[Aug. 2020] We have submitted 11th (CO2), 12th (GAL), and 13th (SRT) test-chips for fabrication using 65nm. Great job, Hyunjoon, Jaeho, and Chengshuo!

[Jul. 2020] Zhengzhe Wei joins Kim Circuit Research Group as a PhD student starting Jul. 2020. Welcome, Zhengzhe!

[Apr. 2020] We have submitted 9th (PDE) and 10th (TKP) test-chips for fabrication using 65nm technology.

[Apr. 2020] Our stochastic computing paper and its presentation is now available online at the virtual DATE 2020 conference. You can also find the DATE paper in publication tab.

[Mar. 2020] Chengshuo has successfully presented our research work on current-mode 8T SRAM-based compute-in-memory at IEEE CICC 2020. Both paper and slides are available in publication tab.

[Feb. 2020] Yuqi has successfully presented our research work (CIM-Spin) on digital compute-in-memory annealing processor at IEEE ISSCC 2020. Both paper and slides are available in publication tab.

[Feb. 2020] Hyunjoon has successfully presented our research work on reconfigurable digital compute-in-memory at tinyML Summit 2020.

[Jan. 2020] Our 7th and 8th test-chips have been submitted for fabrication using 65nm technology. Great job, Junjie!

[Jan. 2020] Our current-mode 8T SRAM based compute-in-memory work has been accepted for regular oral presentation at IEEE CICC 2020, Mar. 22-25, 2020 in Boston, MA. Congratulations, Chengshuo and Taegeun!!

[Jan. 2020] Our embedded Flash based compute-in-memory work has been accepted for lecture presentation at IEEE ISCAS 2020, May 17-20, 2020 in Seville, Spain. Congrats, Junjie! A collaboration work with Prof. T. Kim on ReRAM based compute-in-memory also has been accepted for presentation.

2019

[Dec. 2019] Yuqi has been selected as a recipient of 2020 ISSCC Student Travel Grant Award sponsored by IEEE Solid-State Circuits Society (SSCS). 

[Nov. 2019] We will present our reconfigurable digital compute-in-memory (Colonnade) work at tinyML Summit 2020, Feb. 12-13, 2020 in San Jose, CA.

[Nov. 2019] Hyunjoon has successfully presented our research work on SRAM-based voltage-mode in-memory computing (ACCURA) at IEEE ASSCC 2019. Both paper and slides are available in publication tab.

[Nov. 2019] Our first MRAM test-chip, a collaborative work with IME, A*STAR, has been submitted for fabrication. Great job, Junjie and Yuqi!

[Oct. 2019] Our work on stochastic-binary computing has been accepted for presentation at DATE 2020, Mar. 9-13, 2020 in Grenoble, France!!

[Oct. 2019] Our work (CIM-Spin) on CMOS digital compute-in-memory annealing processor for solving combinatorial optimization problems has been accepted for regular presentation at IEEE ISSCC 2020, Feb. 16-20, 2020 in San Francisco!!! Congrats, Yuqi and Hyunjoon!

[Oct. 2019] Prof. Kim gave invited talks on memory-centric computing at Samsung Research (SR) in Seoul and POSTECH in Pohang, South Korea.

[Oct. 2019] Prof. Kim has presented an invited special session paper on reconfigurable digital in-memory computing at ISOCC 2019 in Jeju, South Korea.

[Sep. 2019] Prof. Kim has started serving as a technical program committee (TPC) member of Design Automation Conference (DAC). Research paper abstract/manuscript submission deadline for DAC'20 (San Francisco, Jul. 2020) is 21 & 27 Nov. 2019. Please check out DAC'20 website (http://dac.com).

[Sep. 2019] Hyunjoon has successfully presented our research work on reconfigurable digital in-memory computing (Colonnade) at IEEE ESSCIRC 2019. Both paper and slides are available in publication tab.

[Sep. 2019] Nine (4 URECA and 5 Research Interns) NTU undergrad students joined our research projects on smart design automation and GAN hardware accelerator. Welcome!

[Sep. 2019] Prof. Kim has presented a special session paper on mixed-signal in-memory computing at IEEE SOCC 2019 in Singapore.

[Aug. 2019] Nabeel Najeeb and Shicheng Lyu join Mixed-Signal Lab for their MS dissertation projects starting Aug. 2019. Welcome!

[Aug. 2019] We are looking for a postdoc who will work on "memory-centric computing circuits/architecture for machine learning hardware". Please contact Prof. Kim via email (bjkim AT ntu.edu.sg) with your CV.

[Aug. 2019] We are looking for undergrad/master students (in Singapore) who will join our research projects. If you are interested, please contact Prof. Kim via email (bjkim AT ntu.edu.sg) with your CV or brief self-introduction.

[Aug. 2019] We are looking for NTU undergrad students who will join our NTU student research programs (URECA, UROP, and FYP). If interested, please send email to Prof. Kim (bjkim AT ntu.edu.sg).

[Aug. 2019] Our paper on SRAM-based mixed-signal in-memory computing (ACCURA) has been accepted to IEEE ASSCC 2019! Congrats, Hyunjoon! The paper will be presented as a regular lecture on November in Macao, China.

[Jul. 2019] Taegeun has successfully presented our research work on eDRAM based in-memory computing at ISLPED 2019.

[Jul. 2019] Prof. Kim will present an invited special session paper on mixed-signal in-memory computing at IEEE SOCC 2019 on September in Singapore.

[Jul. 2019] Jaeho Lee joins Mixed-Signal Lab as a research staff (project officer) starting Aug. 2019. Welcome, Jaeho!

[Jun. 2019] Chengshuo Yu joins Mixed-Signal Lab and starts his PhD study starting July 2019. Welcome, Chengshuo!

[May 2019] Our sixth test-chip (FTT) has been submitted for fabrication using 65nm technology.

[May 2019] Our fifth test-chip (ANN) has been submitted for fabrication using 65nm technology.

[May 2019] Our paper on reconfigurable digital in-memory computing (Colonnade) has been accepted to IEEE ESSCIRC 2019! Congrats, Hyunjoon! The paper will be presented as a regular lecture on September in Krakow, Poland.

[May 2019] Our paper on eDRAM based in-memory computing has been accepted to ACM/IEEE ISLPED 2019! Congrats, Taegeun! The paper will be presented as a regular lecture on July in EPFL, Switzerland.

[Mar. 2019] We are looking for a Research Associate (with MS degree and IC design experience) who will work on mixed-signal circuit designs. Please e-mail me with your CV.

[Feb. 2019] Hyunjoon has successfully presented his research preview on analog in-memory computing work at ISSCC 2019.

[Jan. 2019] Hyunjoon has been selected as a recipient of the 2019 ISSCC Student Travel Grant Awards (STGA). Congrats!

2018

[Dec. 2018] Yuqi Su joins Mixed-Signal Lab and starts his PhD study starting January 2019. Welcome, Yuqi!

[Nov. 2018] Hyunjoon (co-author: Qian) will present our analog in-memory computing work in ISSCC 2019 Student Research Preview (SRP). Congrats!

[Sep. 2018] Our fourth test-chip (QUEEN) has been submitted for fabrication using 65nm technology.

[Aug. 2018] Prof. Kim is currently serving as an editorial review board for IEEE Solid-State Circuits Letter (SSC-L).

[Jul. 2018] We have 1 PhD student opening (with full scholarship) for January 2019 intake. If interested, please contact me via e-mail with your CV.

[Jul. 2018] Hyunjoon Kim and Junjie Mu start their PhD study starting August 2018

[Jul. 2018] Junjie Mu joined Mixed-Signal Lab as a Research Associate. Welcome!

[Jun. 2018] We are actively looking for a passionate PhD student (Jan. 2019 intake) who are interested in both Machine Learning and Integrated Circuit design. If you're interested, please contact me via e-mail (bjkim AT ntu.edu.sg) with your CV.

[Apr. 2018] Our third test-chip (ConvSensor), a collaborative work on DNN with Prof. Tony T. Kim, has been submitted for fabrication using 65nm technology.

[Apr. 2018] Hyunjoon Kim joined Mixed-Signal Lab as a Research Associate. Welcome!

[Apr. 2018] Our first (VTRON) and second (MECA) test-chips have been submitted for fabrication using 65nm technology.

2017

[Nov. 2017] Prof. Kim gave an invited talk on "Efficient Binary Neural Network Array" at Samsung Advanced Institute of Technology (SAIT) in Suwon, South Korea.

[Sep. 2017] Qian Chen joined Mixed-Signal Lab as a PhD student. Welcome!

[Sep. 2017] Prof. Bongjin Kim joined Nanyang Technological University (NTU) in Singapore as an Assistant Professor in School of Electrical and Electronic Engineering (EEE) on Sep. 2017.