Yuqi Su Ph.D. 2019 - 2023 (NTU), Kim Group Alumni, PhD #3

Employment

Assistant Professor, School of Electronic and Computer Engineering, Peking University, China, 2024- (Current)

Scientist, Institute of Microelectronics (IME), Agency for Science, Technology, and Research (A*STAR), Singapore, 2023-2024

Awards & Honors

IEEE Solid-State Circuits Society (SSCS) Rising Star Award, 2024

Invitation to SSCL Special Issue based on his presentation at IEEE Custom-Integrated Circuits Conference (CICC), 2023

IEEE Solid-State Circuits Society (SSCS) Pre-Doctoral Achievement Award, 2022

Best Paper Nomination & Invitation to JSSC Special Issue, IEEE Custom-Integrated Circuits Conference (CICC), 2021

IEEE ISSCC Student Travel Grant Award for his presentation at ISSCC 2020

Publications

1. [JSSC'24] Y. Su, T. Kim, and B. Kim, "FlexSpin: A CMOS Ising Machine with 256 Flexible Spin Processing Elements with 8b Coefficients for Solving Combinatorial Optimization Problems," IEEE Journal of Solid-State Circuits, 2024 (Early Access) [PAPER]

2. [SSCL'23] Y. Su, T. Kim, and B. Kim, "A Reconfigurable CMOS Ising Machine with Three-Body Spin Interactions for Solving Boolean Satisfiability with Direct Mapping," IEEE Solid-State Circuits Letter, Aug. 2023 [PAPER]

3. [JSSC'23] C. Yu, J. Mu, Y.Su, K. Chai, T. Kim, and B. Kim, "A Time-Domain Wavefront Computing Accelerator with a 32×32 Reconfigurable PE Array," IEEE Journal of Solid-State Circuits, Aug. 2023 [PAPER]

4. [CICC'23] Y. Su, T. Kim, and B. Kim, "A Reconfigurable Ising Machine for Boolean Satisfiability Problems Featuring Many-Body Spin Interactions," IEEE Custom Integrated Circuits Conference, Apr. 2023 [PAPER]

5. [JSSC'22] Y. Su, H. Kim, and B. Kim, "CIM-Spin: A Scalable CMOS Annealing Processor with Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems," IEEE Journal of Solid-State Circuits, Jul. 2022 [PAPER]

6. [JSSC'22] Y. Su, J. Mu, H. Kim, and B. Kim, "A Scalable CMOS Ising Computer Featuring Sparse and Reconfigurable Spin Interconnects for Solving Combinatorial Optimization Problems," IEEE Journal of Solid-State Circuits, Mar. 2022 [Invited: CICC 2021 Special Issue]. [PAPER]

7. [ISSCC'22] Y. Su, T. Kim, and B. Kim, "FlexSpin: A Scalable CMOS Ising Machine with 256 Flexible Spin Processing Elements for Solving Complex Combinatorial Optimization Problems," IEEE International Solid-State Circuits Conference, Feb. 2022 [PAPER]

8. [VLSI'21] J. Mu, Y. Su, and B. Kim, "A 20x28 Spins Hybrid In-Memory Annealing Computer Featuring Voltage-Mode Analog Spin Operator for Solving Combinatorial Optimization Problems," Symposia on VLSI Technology and Circuits, Jun. 2021 [PAPER]

9. [CICC'21] C. Yu, Y. Su, J. Lee, K. Chai, and B. Kim, "A 32x32 Time-Domain Wavefront Computing Accelerator for Path Planning and Scientific Simulations," IEEE Custom Integrated Circuits Conference, Apr. 2021 [PAPER]

10. [CICC'21] Y. Su, J. Mu, H. Kim, and B. Kim, "A 252 Spins Scalable CMOS Ising Chip Featuring Sparse and Reconfigurable Spin Interconnects for Combinatorial Optimization Problems,"  IEEE Custom Integrated Circuits Conference, Apr. 2021 [Best Student Paper Candidate] [Invited to JSSC Special Issue] [PAPER]

11. [DATE'20] Q. Chen, Y. Su, H. Kim, T. Yoo, T. Kim, and B. Kim, "A 16×128 Stochastic-Binary Processing Element Array for Accelerating Stochastic Dot-Product Computation Using 1-16 Bit-Stream Length," Design, Automation and Test in Europe Conference, Mar. 2020 [PAPER]

12. [ISSCC'20] Y. Su*, H. Kim*, and B. Kim, "CIM-Spin: A 0.5-1.2V Scalable Annealing Processor Using Digital Compute-In-Memory Spin Operators and Register-Based Spins for Combinatorial Optimization Problems," IEEE International Solid-State Circuits Conference, Feb. 2020 (*equal contribution) [PAPER]