Bongjin Kim, PhD 

E-mail: bongjin (AT) kaist.ac.kr / Office: E3-2, Room 5228 / Tel: +82-42-350-7479 / Google Scholar / LinkedIn

Bongjin received a PhD degree from the University of Minnesota in 2014. After his PhD, He worked on design techniques and methodologies for communication circuits and microarchitectures at Rambus and Stanford University as a senior staff member and a postdoctoral research fellow. After working as an Assistant Professor for 3 years (from 2017 to 2020) at Nanyang Technological University in Singapore and 4 years (from 2021 to 2024) at the University of California Santa Barbara in California, he joined Korea Advanced Institute of Science and Technology (KAIST) in Jan. 2025 and is now an Associate Professor at the School of Electrical Engineering and Department of Semiconductor System Engineering.

His research team is working on Cutting-edge ASIC Hardware Accelerator Research for Computing and communication, covering a broad spectrum of emerging topics & applications. (1) Generative AI Training/Inference (2) AI/ML Formal Verification & Adversarial Training (3) Wireless/Wireline Communication Circuit/System (MIMO Detection, Equalization, Crosstalk Cancellation) (4) Next-Gen Link Designs (for HBM, UCIe, CXL) (5) Emerging Memory & Processing-in-Memory (6) Other Emerging Topics (Protein Design, Medical/Physical AI).

He received the NSF CAREER Award, the NRF Outstanding Young Scientist Grant, the Doctoral Dissertation Fellowship Award, and the ISLPED International Low Power Design Contest Award. His research works have been published in 70+ peer-reviewed major conferences and journals, including the IEEE International Solid-State Circuits Conference (ISSCC), Symposium on VLSI Technology and Circuits (VLSI), Custom Integrated Circuits Conference (CICC), European Solid-State Electronics Conference (ESSERC), and Journal of Solid-State Circuits (JSSC). He currently serves as a technical program committee (TPC) member of the IEEE International Solid-State Circuits Conference (ISSCC), Custom Integrated Circuits Conference (CICC), European Solid-State Electronics Conference (ESSERC), Asian Solid-State Circuits Conference (A-SSCC), and a student research preview (SRP) committee member of the IEEE International Solid-State Circuits Conference (ISSCC). He was a previous TPC member of the IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) and the ACM/IEEE Design Automation Conference (DAC). He served as a Guest Editor of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) and is currently an Associate Editor of the IEEE Solid-State Circuits Letters (SSC-L).