Mamunar Rahoman

Md. Mamunar Rahoman RotonVLSI Engineer | IC Physical Design | Digital Systems Design

Highly interested in VLSI and digital system design, with a strong commitment to contributing to technological advancements. Continuously engaged in learning and self-development through diverse resources to enhance my technical expertise and professional growth.

About Me

Hi, I'm Md. Mamunar Rahoman Roton — a passionate VLSI engineer with hands-on industry experience in IC Physical Design and backend implementation flows. My long-term goal is to advance VLSI backend technologies and contribute to the development of automated, efficient design methodologies. I am particularly interested in understanding the performance and limitations of EDA tools within the physical design flow and leveraging that insight to improve backend automation, enhance tool utilization, and optimize the overall design process.

Key Highlights

Nearly 1 year industry experience in IC Physical Design. (Hands-on tapeout experience on TSMC 3nm node, specializing in Physical Design Verification and advanced-node sign-off methodologies.)
Worked as an Assistant Engineer at Ulkasemi Pvt. Ltd. on a Synopsys contract project.
Strong knowledge of VLSI backend flows, digital design, and CMOS systems.

Featured Projects

Full-chip design of a unidirectional data transmitter using serial and parallel data communication modes.

Tool used: ModelSim, Xilinx Vivado, Cadence Genus, Cadence Innovus. | (Project details↗)

28-Transistor-based CMOS Full-Adder using only Metal-1 to keep other metal layers available for further implementation as an instance.

Tool used: Cadence Virtuoso | (Project details↗)

Schematic and Layout Design of a Low-Power Multiplexer-Based 1-Bit Full Adder Circuit.

Tool used: Cadence Virtuoso. | (Project details↗)

RTL Design, functional verification of Serial to parallel and Parallel to serial data communication system using verilog.

Tool used: Xilinx Vivado, ModelSim | (Project details↗)

Over Voltage, Under Voltage, and Over Load Protection of Power System using NodeMCU Mega WiFi R3 (ATmega 2560).

Tool used: Arduino IDE, EasyEDA (for schematic drawing). | (Project details↗)

Skill Overview

Experience

Assistant Engineer

IC Physical Design, IC Physical Implementation EngineeringUlkasemi Pvt. Limited , Bangladesh (On contract project of Synopsys Inc.)

Research

Undergraduate Thesis: Applications to Rectilinear Steiner Minimum Trees for Higher Degree Nets with Advanced Net-breaking Techniques.

Compressed and optimized the existing RSMT (Rectilinear Steiner Minimum Tree) database using orientation-based methodologies to improve efficiency and reduce redundancy.
Applied advanced net-breaking techniques to enable scalable and accurate routing for higher-degree nets in Physical Design Automation.
Developed a methodology to generate multiple routing solution paths from placement data instead of relying on a single reference solution, expanding design flexibility.
Enhanced routing efficiency and runtime performance by introducing alternative routing strategies for critical paths using the newly developed multi-solution database.

Interested Fields

Improvement of VLSI back-end design flow.
Automation tool efficiency improvement.
FPGA/Embedded systems.

Contact

Please feel free to contact me if you wish to discuss any ideas or explore professional collaboration. I am always open to collaborating with others in my areas of interest.

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