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Nowadays tasks of genomic data processing are mostly performed on CPU or GPU platforms. Because of the characteristics of input reads, we found that the process can be greatly accelerated using dedicated hardware with parallel and pipelining schemes. We have successfully built several dynamic-programming-based accelerator on Altera DE-5 FPGA, and used PCIe interface to exchange genomic data between the device and solid-state disk. Using the results in [1-3] as an example, the proposed FPGA design can achieve over 200X speed-up when compared to the software version.
Dynamic Programming Accelerator
[1-1] C. Y. Chang, Y. C. Li, N. C. Chen, X. X. Huang, and Y. C. Lu, "A special processor design for nucleotide Basic Local Alignment Search Tool with a new banded two-hit method," in 2016 IEEE Nordic Circuits and Systems Conference, 2016, pp. 1-5.[1-2] M. J. Lin, C. Y. Chang, Y. C. Li, N. C. Chen, and Y. C. Lu, "A hybrid flow for multiple sequence alignment with a BLASTn based pairwise alignment processor," in 2018 IEEE International Symposium on Circuits and Systems, 2018, pp. 1-5.[1-3] Y. L. Liao, Y. C. Li, N. C. Chen, and Y. C. Lu, "Adaptively banded Smith-Waterman algorithm for long reads and its hardware accelerator," in 2018 IEEE International Conference on Application-specific Systems, Architectures and Processors, 2018, pp. 1-9.[1-4] R. T. Chien, Y. L. Liao, C. A. Wang, Y. C. Li, and Y. C. Lu, "Three-dimensional dynamic programming accelerator for multiple sequence alignment," in 2018 IEEE Nordic Circuits and Systems Conference, 2018, pp. 1-5.
Index Calculators/Liquid Association Calculators
[2-1] N. C. Chen, T. Y. Chiu, Y. C. Li, Y. C. Chien, and Y. C. Lu, "Power efficient special processor design for burrows-wheeler-transform-based short read sequence alignment," in 2015 IEEE Biomedical Circuits and Systems Conference, 2015, pp. 1-4.[2-2] C. A. Wang, S. J. Huang, Y. C. Li, and Y. C. Lu, "An FPGA-based liquid association calculator for genome-wide co-expression analysis," in 2018 IEEE International Conference on Digital Signal Processing, 2018.
Hardware Filter and De Novo Assembler
[3-1] Y. H. Kuo, C. S. Liu, Y. C. Li, and Y. C. Lu, "Parallel architecture and hardware implementation of pre-processor and post-processor for sequence assembly," in 2013 IEEE International Conference on Acoustics, Speech and Signal Processing, 2013, pp. 1158-1161.[3-2] Y. L. Huang, C. S. Liu, Y. C. Li, and Y. C. Lu, "Architecture and circuit design of parallel processing elements for de novo sequence assembly," in 2013 IEEE International SOC Conference, 2013, pp. 50-54.[3-3] C. S. Liu, N. C. Chen, Y. C. Li, and Y. C. Lu, "An FPGA-based quality filter for de novo sequence assembly pipeline," in 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016, pp. 139-142.
Fluorescence Data Processing
[4-1] X. X. Huang, C. H. Ho, Y. C. Li, N. C. Chen, and Y. C. Lu, "Step shift: a fast image segmentation algorithm and its hardware implementation for next-generation sequencing fluorescence data," in 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016, pp. 202-205.Google Sites
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