♦️資料處理與硬體計算(I) --- 基因資料Data Processing and Hardware Computing (I) --- Genomic Data
曾泓瑜 Hung-Yu Tseng Hardware Acceleration for Genome Sequence Alignment with Bloom Filter Seeding and Lookahead Adaptive Banded Aligning Techniques. (MS, 2025)
黃政勛 Jheng-Syun Huang A Hardware Accelerator for Sequence-to-Graph Alignment with an Affine Gap Penalty Model. (MS, 2025)
林克帆 Ke-Fan Lin A Hardware Acceleration Platform Design for Protein to Genome Alignment. (MS, 2025)
蔡承佑 Cheng-You Tsai Hardware Acceleration of Deep Neural Network Stages Required in the Basecalling Flow for Oxford Nanopore Sequences. (MS, 2024)
黃士豪 Shih-Hao Huang A Hardware Acceleration Platform Design for Long-Read Sequence-To-Graph Alignment Based on Myers' Bit-Vector Algorithm. (MS, 2024)
沈哲瑋 Zhe-Wei Shen A Parallel Hardware Accelerator Design for Sequence-to-Graph Alignment in Variant-Enriched Regions. (MS, 2023)
葉陽明 Yang-Ming Yeh Exploiting Temporal Information in Basecalling Oxford Nanopore Sequences by Integrating Multi-Scale Complementarity in Deep Neural Networks. (Ph.D., 2023)
陳傳諭 Chuan-Yu Chen A Parallel Hardware Accelerator for Long Sequence Alignment Based on the Bit-Vector Algorithm. (MS, 2022)
戴靖軒 Ching-Hsuan Tai A Hardware Acceleration Platform Design for Long-Read Sequence Alignment. (MS, 2021)
翁士軒 Shih-Shiuan Weng A Parallel Hardware Accelerator for Rapid Prediction of RNA Secondary Structure Using Dynamic Programming. (MS, 2021)
李育誠 Yu-Cheng Li BLAST-Based Protein Sequence Alignment: Hardware Accelerator Design and Automatic Function Annotation Studies. (Ph.D., 2020)
林茂然 Mao-Jan Lin A Parallel Design of Dynamic Programming Sequence Aligner with Affine Gap Traceback. (MS, 2019)
王健安 Chien-An Wang A Long Read Structure-Variation-Aware Aligner with High-Accurate Sequence Splitting. (MS, 2019)
陳乃群 Nae-Chyun Chen A Novel Long Read Aligner Using Fast Seeding and Linking Strategies. (MS, 2017)
柳皓瑋 Hao-Wei Liu Design of a Variant Calling Method and its Hardware Analyzer with Nucleotide-Position-Based Data Compression Algorithm. (MS, 2017)
劉浚升 Chun-Shen Liu A Parallel Algorithm and its Hardware Architecture Design for De Novo Sequence Assembly. (MS, 2013)
黃玉龍 Yu-Long Huang Architecture Design of the Parallel Processing Element and Interconnection Network for De Novo Sequence Assembly. (MS, 2012)
郭垣翔 Yuan-Hsiang Kuo Parallel Architecture and Hardware Implementation of the Pre-Filter and Post-Processor for Sequence Assembly. (MS, 2012)
黃筱漩 Xiao-Xuan Huang An Algorithm and Hardware Accelerator Design for Image Segmentation of Raw Sequencing Data. (MS, 2011)
李育誠 Yu-Cheng Li Parallel Architecture and Hardware Implementation of Biological Sequence Alignment Processors. (MS, 2011)
♦️資料處理與硬體計算(II) --- 偏微分方程解算器Data Processing and Hardware Computing (II) --- Partial Differential Equation Solvers
董濟昀 Chi-Yun Tung A Quasi-Monte-Carlo Hardware Accelerator for Pricing Zero Coupon Callable Bonds under the Hull-White Interest Rate Model. (MS, 2023)
吳書帆 Shu-Fan Wu Monte Carlo Simulation for Option Pricing with Two-Factor and Jump Diffusion Stochastic Models on a Hardware Accelerator. (MS, 2022)
吳諺倫 Yan-Lun Wu A Hardware Acceleration Platform Design for Option and Bond Pricing with Two-Factor Stochastic Models. (MS, 2021)
謝世暐 Shih-Wei Hsieh An Energy-Efficient Hardware Accelerator for Pricing Two-Asset European and American Options Based on Operator Splitting Methods. (MS, 2020)
莊政彥 Cheng-Yen Chuang Multigrid-based Poisson Equation Solver: Algorithm and Hardware Design. (MS, 2019)
♦️資料處理與硬體計算(III) --- 視覺資料Data Processing and Hardware Computing (III) --- Visual Data
張柏彥 Po-Yen Chang A Hardware-Accelerated Incomplete Cholesky Preconditioned Conjugate Gradient Solver for Retinex Models. (MS, 2025)
王惇立 Dun-Li Wang Design and Implementation of a Hardware-Accelerated Depth-Image-Based Rendering Platform. (MS, 2024)
黃家翰 Chia-Han Huang An FPGA-based Accelerator for a Computation-Reduced Image Denoising Algorithm with the Guidance Image. (MS, 2021)
邱冠杰 Kuan-Chieh Chiu SVM Architecture Using Vector Free L-BFGS Algorithm for Image Classification. (MS, 2021)
江東霖 Tung-Lin Chiang Hardware Accelerator for NUFFT Based Computer Generated Hologram. (MS, 2018)
楊其昀 Chi-Yun Yang Hardware Architecture and Implementation of Tensor Approximation for Multi-Dimensional Visual Data. (MS, 2018)
黃聖睿 Sheng-Jui Huang A Real Time Video Stabilizer Based on Feature Trajectories and Global Mesh Warping. (MS, 2018)
曾纓喻 Ying-Yu Tseng Design of Algorithms and Hardware Accelerators for Video Compressive Sensing. (MS, 2017)
高鈺翔 Yu-Hsiang Kao Hardware Accelerator Design for Parabolic-Photography-Based Deblurring. (MS, 2016)
陳晉凱 Chin-Khai Tang Layout Data Compression Algorithm and its Hardware Decoder Design for Multiple Electron-Beam Direct-Write Systems. (Ph.D., 2015)
葉陽明 Yang-Ming Yeh Hardware Architecture and Implementation for Sparse Representation Based Light Field Data Compression. (MS, 2015)
何俊憲 Chun-Hsein Ho Depth Estimation and Digital Refocusing Algorithms for Lensless Light Field Camera Data. (MS, 2014)
林奕憲 Yi-Hsien Lin A Super Resolution Algorithm and Its Hardware Design for Light Field Images. (MS, 2014)
江擎帆 Ching-Fan Chiang Colorization of High-Frame-Rate Monochrome Videos using Synchronized Low-Frame-Rate Color Data. (MS, 2014)
陳滿蓉 Man-Rong Chen A Frequency-Based Digital Refocusing Algorithm and its Hardware Implementation for Light Field Data. (MS, 2014)
陳奕翔 Yi-Hsiang Chen Depth Estimation Algorithm with Queue-Based Segmentation and Its Hardware Implementation for Light Field Data. (MS, 2014)
許博翔 Po-Hsiang Hsu A High Dynamic Range Light Field Camera and its Built-In Data Processor Design. (MS, 2013)
林暘曜 Yang-Yao Lin A Stereo Vision Algorithm and its Hardware Design for Multiple Object Deblurring. (MS, 2013)
張哲維 Che-Wei Chang Design of Pinhole Array Masks and Image Processing Algorithms for Light Field Cameras. (MS, 2012)
陳敏弘 Min-Hung Chen A Depth Estimation Algorithm and Hardware Design for Light Field Cameras under Low Light Conditions. (MS, 2012)
潘家弘 Jia-Hong Pan An Algorithm and Hardware Design for Fourier Slice Theorem Based Digital Refocusing. (MS, 2011)
范姜士傑 Shih-Chieh Fan Chiang Light Field Based Depth Estimation Algorithm and Hardware Design. (MS, 2011)
陳致傑 Chih-Chieh Chen An Algorithm and Architecture Design for Light Field Based Digital Refocusing. (MS, 2010)
郭俊良 Chun-Liang Kuo Analysis and Implementation of Architecture of Discrete Wavelet Transform for Processing Four-Dimensional Light Field. (MS, 2010)
♦️影像/點雲資料處理與電腦視覺Image/Point Cloud Data Processing and Computer Vision
陳恩庭 En-Ting Chen Deep Unfolding Netowrk for Spatially Invariant and Spatially Variant Chromatic Aberration Corrention. (MS, 2025)
謝承恩 Cheng-En Hsieh Real-Time Monocular Novel View Synthesis via Disparity-Based Inpainting and Depth Image Rendering. (MS, 2024)
陳力豪 Li-Hao Chen Real-Time Multi-View Generation via Integration of Stereo Matching Network and Depth Image Rendering. (MS, 2024)
何承叡 Cheng-Jui Ho Coarse-to-Fine Two-Pass Single Image Reflection Removal with a Weighted Color Fusion Scheme. (MS, 2024)
舒泓諭 Hung-Yu Shu Deep Plug-and-play Nighttime Non-blind Deblurring with Saturated Pixel Handling Schemes. (MS, 2023)
温正玉 Cheng-Yu Wen Video Colorization with Image-Quality-Assessment-Based Initialization and Superpixel-Level Occlusion Handling Schemes. (MS, 2022)
陳柏帆 Bo-Fan Chen CF-Net: Complementary Fusion Network for Rotation-Invariant Point Cloud Completion. (MS, 2022) 楊智翔 Chih-Hsiang Yang Image Dehazing Based on a Physically Valid Illumination Estimator and a Luminance-Guided Coloring Model. (MS, 2022)
翁齊宏 Chi-Hung Weng Adaptive Normal Consistency Regularizers for Point Cloud Denoising. (MS, 2021)
葉騏銘 Chi-Ming Yeh Stereo Matching Algorithm Using Image-Guided Graph-Cut. (MS, 2021)
徐千涵 Chien-Han Hsu A Primal-dual Super-Resolution Algorithm for Light Field Images. (MS, 2020)
林彥伯 Yen-Bo Lin Attention Mechanism and Neural Architecture Search for Three-Dimensional Point Cloud Classification. (MS, 2020)
周育辰 Yu-Chen Chou 3D-GFE: A 3D Geometric-Feature Extractor for 3D Point Cloud Data. (MS, 2020)
楊茜雯 Chien-Wen Yang Example-Based Image Colorization Using Primal-Dual Algorithm and Saliency Screening. (MS, 2020)
杜韋頤 Wei-Yi Duh RGBNIR Demosaicking Using First Order Primal Dual Algorithm. (MS, 2019)
蕭芳宗 Fang-Zong Siao Summarization-Based Image Resizing with Planar Structure Guidance for Repeated Pattern Removal. (MS, 2019)
吳岳霖 Yueh-Lin Wu Fast Single Image Dehazing Using Critical Channel Scaling with Air-Light Angle Adjustment. (MS, 2019)
劉承曄 Cheng-Yeh Liou HDR Deghosting Using Motion-Registration-Free Fusion in Luminance Gradient Domain. (MS, 2018)
肖璐 Lu Xiao A Pipeline Design for Non-Photorealistic Image and Video Rendering. (MS, 2015)
♦️高速數位電路/三維處理器電路High Speed Digital Circuits/3D ICs
水沼仁志 Hitoshi Mizunuma Thermal Modeling, Analysis and Management in 3D ICs. (Ph.D., Co-advised, 2013)
黃勇叡 Yong-Ruei Huang Thermal-Aware Router-Sharing Architecture for 3D Network-on-Chip Designs. (MS, 2010)
林政宏 Cheng-Hong Lin Simulation Flow and Circuit Analysis of NBTI Effects on 3D Integrated Circuits. (MS, 2010)
陳晉凱 Chin-Khai Tang An Asynchronous Circuit Design with Fast Forwarding Technique at Advanced Technology Node. (MS, 2009)
陳勝堯 Sheng-Yao Chen An MSB-First Asynchronous Add-Compare-Select Unit. (MS, 2009)
林俊彥 Chun-Yen Lin Through Silicon Via and Static Random Access Memory. (MS, 2008)
♦️類比數位轉換器/電腦輔助設計/其他Analog Digital Converter/Computer Aided Design/Others
王世和 Shih-Ho Wang Dual-Unit-Capacitance Split-Capacitor-Array SAR ADC Design and Analysis. (MS, 2011)
謝易穎 Yi-Ying Hsieh Voltage-Controlled Oscillators and Process Variation Monitors. (MS, 2010)
謝為丞 Wei-Cheng Hsieh Analysis and Design of Low Power SAR ADCs. (MS, 2010)
李政鴻 Cheng-Hung Li Noise Decoupling System and Low Noise Amplifier. (MS, 2010)
葉人榜 Ren-Bang Yeh High Speed AC Coupled Interconnection Systems and SI/PI Effects on I/O Circuits with Decoupling Capacitors. (MS, 2010)
郭仲宇 Chung-Yui Kuo The Design and Implementation of Spread Spectrum Clock Generators Using a Novel Capacitance Multiplication Method. (MS, 2009)