Overview 

In recent studies, the three-level buck converter has become increasingly attractive because of its high power density as well as high efficiency over a wide input voltage range. In addition, in a 3-Level Buck converter (3-LBC), the voltage stress on power switches and the inductor can be reduced significantly, and the output can be regulated with smaller current ripple compared to other topologies. However, a limit of 3-LBC is the intrinsic imbalance of flying capacitor voltage VCf ly due to timing mismatch among control signals. Consequently, this issue can lead to many problems, such as system instability, large inductor current ripple, and high voltage stress on power switches, defeating the main purposes of using 3-LBC.

Purpose

An integrated modified three-level buck converter (M3-LBC) is demonstrated to alleviate the inherent imbalance issue in the traditional three-level buck converter (3-LBC). In particular, the converter concentrates on tackling issues of unbalanced flying-capacitor voltages owing to timing mismatch.

Development Direction 

An integrated modified three-level buck converter (M3-LBC) is demonstrated to alleviate the inherent imbalance issue in the traditional three-level buck converter (3-LBC). In particular, the converter concentrates on tackling issues of unbalanced flying-capacitor voltages owing to timing mismatch.

Related Knowledge 

• ·        Basic knowledge of Analog IC Design.

• ·        Good understanding of Hybrid DC-DC Converter.

• ·        Useful skills: Plecs, Cadence.

Poster