Shinya Takamaeda-Yamazaki, Ph.D.

Associate Professor

Laboratories for Advanced LSI Engineering (LALSIE),

Division of Electronics for Informatics,

Faculty of Information Science and Technology,

Hokkaido University, Japan,

Research Center of Mathematics for Social Creativity,

Research Institute for Electronic Science (Concurrent Post),

Hokkaido University, Japan, and

JST PRESTO Researcher (Concurrent Post)

Research Interests

    • Computer Architecture
    • FPGA System
    • High-level Synthesis
    • Machine Learning and Deep Learning
    • Ising Computer

Active Project

    • Veriloggen: Python-based High-level Hardware Development Framework
    • Pyverilog: Python-based Hardware Design Processing Toolkit for Verilog HDL
    • PyCoRAM: Python-based Portable IP-core Synthesis Framework for FPGA-based Computing
      • Available at GitHub and PyPI.
      • CARL2013 slide is here.
      • The website of the original CoRAM memory architecture developed at CMU is here.
    • Tutorial of how to create a custom hardware on Xilinx Zynq with Debian Linux
      • Available at Slideshare
      • It can be applied to Altera DE1-SoC with OpenCL.


    • E-mail: takamaeda_at_ist_hokudai_ac_jp
    • Access to our laboratory
    • Slideshare: my presentation and tutorial slides
    • GitHub: my public software repository