CASYS
Laboratory for Computer Architecture and Systems
Department of Computer Science, Graduate School of Information Science and Technology, The University of Tokyo
CASYS is a laboratory for computer architecture and systems. The center of our research interests is computer architecture (computer organization, design methodology, and ideal way of being of computers). We are pursuing various researches on highly-efficient next generation computers, such as custom computing employing FPGA and domain-specific hardware, algorithm/hardware co-design for machine learning, and high-level synthesis compilers for productive hardware design environment. We are also pursuing software researches on compilers, programming models, and frameworks for user/programmer friendly computers.
News
Prof. Takamaeda will have an invited talk at IEICE-CPSY workshop. (May 23, 2023)
Prof. Takamaeda received The Young Scientists’ Award, The Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology, FY 2023! (April 7, 2023)
Project Assistant Professor Tatsuya Kaneko has joined our laboratory. Welcome! (April 1, 2023)
A new research grant project "Probabilistic Computing Platform based on Stochastic Thermodynamics" lead by Prof. Takamaeda has been accepted by KAKENHI KIBAN-A. We pursue researches on low-energy and reliable approximate computing technologies based on physics. (April 1., 2023)
Kuga-san, Koike-san, Hashimoto-san, Fujiwara-san (M2), and Fukami-san (B4) have graduated! (March 31, 2023)
Our paper about a high-performance integrity verification mechanism for non-volatile memory systems has been accepted by COOL Chips 26! (March 29, 2023)
Our paper about a hardware-friendly activation function for accurate binary neural networks (by Zhang-san) presented at CSA 2022 has received CSA Best Paper Award! (November 22, 2022)
Our paper about an FPGA-based acceleration method for video depth estimation (by Hashimoto-san) has been accepted by FPT 2022! (October 13, 2022)
Daichi Murakami (M2), Masayuki Usui, Keisuke Kamahori, Kotaro Shimamura, Sun Tanaka, Tasuku Fukami (B4), and Stefan Dangl (Internship) have joined our laboratory. Welcome! (October 3, 2022)
Our paper about a lottery-ticket based federated learning (by Tsutsui-san) has been accepted by CCNC 2023! (October 1, 2022)
Our paper about a hardware-friendly activation function for accurate binary neural networks (by Zhang-san) has been accepted by CSA 2022! (September 28, 2022)
Our paper about an efficient federated reinforcement learning method has been accepted by GLOBECOM 2022! (August 2022)
Koike-san won the IPSJ Computer Science Research Award for Young Scientists! (August 3, 2022)
Our paper about an acceleration method based on the microarchitectural support of approximate computing for decision tree ensemble (by Kamahori-san) has been accepted by HEART 2022! (May 11, 2022)
Akira Iga has joined our laboratory as a Master course student. Tatsuya Kubo, Kengo Suga, Masayoshi Tsutsui, and Sefutsu Ryu have become Master course students. Welcome! (April 1, 2022)
Tsutsui-san won the young excellent presentation award from IEICE-CPSY for his presentation about the communication reduction method for federated learning. (March 24, 2022)
Kubo-san won the young excellent presentation award from IEICE-CPSY for his presentation about the integrity verification scheme for non-volatile main memory. (March 24, 2022)
Hirayama-san will present his research activity on efficient Bayesian deep learning at SIG-FPAI. (March 2, 2022)
Kuga-san, Hashimoto-san, Kubo-san, Suga-san, Tsutsui-san, Ryu-san, and Kamahori-san will present their research activities at ETNET 2022. (February 23, 2022)
A WIP paper on the processor microarchitecture for approximate computing by Kamahori-san is accepted by YArch 2022! (February 23, 2022)
Hashimoto-san won the young excellent presentation award from IEICE-RECONF (Reconfigurable System) for his presentation about the FPGA-based acceleration method for Bilateral filter. (October 8, 2021)
Yinghao Ren (Master course student), Tatsuya Kubo, Kengo Suga, Masayoshi Tsutsui, and Sefutsu Ryu (Undergraduate student) have joined. Welcome! (October 4, 2021)
A new research grant project "D3-AI: Distributed AI for Dynamic and Diverse Environments" lead by Prof. Takamaeda has been accepted by JST CREST "Core technologies for trusted quality AI systems". We pursue researches on distributed machine learning and federated learning. (September 21, 2021)
Koike-san won the young excellent presentation award from IPSJ SIG-ARC (System Architecture) for his presentation about the fast and secure non-volatile memory mechanism. (August 3, 2021)
Our paper about the acceleration method for Bayesian neural networks by algorithm-hardware co-design is accepted by ASAP 2021 as a Full Paper! (June 3, 2021)
Out paper about the high-performance and lightweight FPGA implementation of Bilateral Filter is accepted by FPL 2021 as a Full Paper! (May 14, 2021)
Zhang-san has been accepted for Fellowship for Creation of Intelligent World. (April 30, 2021)
Koike-san, Hashimoto-san, and Fujiwara-san have become Master course students. Kuga-san (Master course student) have joined. Welcome! (April 1, 2021)
Hirayama-san has become a Ph.D student of The University of Tokyo. (April 1, 2021)
Ikeda-kun won the young excellent presentation award from IEICE SIG-DC (Dependable Computing) for his presentation about the DNN acceleration method based on the dead neuron prediction. (October 20, 2020)
Zhang-san (Ph.D. student), Koike-san, Hashimoto-san, and Fujiwara-san (Undergraduate student) have joined. Welcome! (September 24, 2020)
Ikebe-san (Technical Staff) has joined. Welcome! (September 1, 2020)
Our paper about an efficient hardware architecture for Bayesian neural network processing has been accepted for International Journal of Networking and Computing. (May 12, 2020)
Hirayama-kun won the excellent presentation award from JSAI for his presentation about variational Bayesian neural network at SIG-FPAI. (May 12, 2020)
Our paper about an FPGA-based acceleration method of random forest has been accepted for ARC 2020! (March 4, 2020)
NNgen (A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network) is available on GitHub. (December 6, 2019)
Secretary Yamaura-san has joined. (December 4, 2019)
Our paper about the annealing processor with Tokyo Tech, Hokkaido Univ., and Hitachi has been accepted for ISSCC 2020! (November 19, 2019)
CASYS Web page just opened! (October 8, 2019)
CASYS just started! (October 1, 2019)
Research Keywords
Computer Architecture
Algorithm/Hardware Co-design
Machine Learning Acceleration
Processor Architecture and Memory System
High-Level Synthesis Compiler
FPGA System
Member
Faculty
Shinya Takamaeda-Yamazaki (Associate Professor, PI)
Tatsuya Kaneko (Project Assistant Professor)
Staff
Fumiko Yamaura (Secretary)
Graduate Student (Ph.D. Course)
Peiqi Zhang (D3, Fellowship for Creation of Intelligent World)
Yuki Hirayama (D3, JSPS Research Fellow DC1)
Shogo Yamazaki (D2)
Graduate Student (Master Course)
Yinghao Ren (M2)
Daichi Murakami (M2)
Akira Iga (M2)
Kohei Asano (M2)
Tatsuya Kubo (M2)
Kengo Suga (M2)
Masayoshi Tsutsui (M2)
Sefutsu Ryu (M2)
Masayuki Usui (M1)
Keisuke Kamahori (M1)
Kotaro Shimamura (M1)
Sun Tanaka (M1)
Undergraduate
TBD
Alumni
Kota Kuga (March 2023, Master's Degree)
Ryo Koike (March 2021, Bachelor's Degree, March 2023, Master's Degree)
Nobuho Hashimoto (March 2021, Bachelor's Degree, March 2023, Master's Degree)
Yoshiki Fujiwara (March 2021, Bachelor's Degree, March 2023, Master's Degree)
Tasuku Fukami (March 2023, Bachelor's Degree)
Stefan Dangl (March 2023, Internship, TU Wein)
Kazutoshi Hirose (March 2022, Ph.D., Tokyo Institute of Technology, and JSPS Research Fellow DC1)
Hikaru Ikebe (June 2021, Technical Staff)
Taiga Ikeda (March 2020, Master's Degree, Hokkaido University)
Kasho Yamamoto (March 2020, Ph.D., Hokkaido University, and JSPS Research Fellow DC2)
Yuka Oba (March 2020, Master's Degree, Hokkaido University)
Takumi Kudo (March 2020, Master's Degree, Hokkaido University)
Contact and Address
Address
4th floor, Faculty of Science Bldg. 7, The University of Tokyo,
7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
Room 401: Takamaeda's room
Room 402 and 403: Student room
Contact
Takamaeda: shinya_at_is_s_u-tokyo_ac_jp
Secretary: casys-secretary_at_is_s_u-tokyo_ac_jp
Replace _at_ and _ appropriately.