CASYS is a laboratory for computer architecture and systems. The center of our research interests is computer architecture (computer organization, design methodology, and ideal way of being of computers). We are pursuing various researches on highly-efficient next generation computers, such as custom computing employing FPGA and domain-specific hardware, algorithm/hardware co-design for machine learning, and high-level synthesis compilers for productive hardware design environment. We are also pursuing software researches on compilers, programming models, and frameworks for user/programmer friendly computers.


  • Hashimoto-san won the young excellent presentation award from IEICE-RECONF (Reconfigurable System) for his presentation about the FPGA-based acceleration method for Bilateral filter. (October 8, 2021)

  • Yinghao Ren (Master course student), Tatsuya Kubo, Kengo Suga, Masayoshi Tsutsui, and Sefutsu Ryu (Undergraduate student) have joined. Welcome! (October 4, 2021)

  • A new research grant project "D3-AI: Distributed AI for Dynamic and Diverse Environments" lead by Takamaeda has been accepted by JST CREST "Core technologies for trusted quality AI systems". We pursue researches on distributed machine learning and federated learning. (September 21, 2021)

  • Koike-san won the young excellent presentation award from IPSJ SIG-ARC (System Architecture) for his presentation about the fast and secure non-volatile memory mechanism. (August 3, 2021)

  • Our paper about the acceleration method for Bayesian neural networks by algorithm-hardware co-design is accepted by ASAP 2021 as a Full Paper! (June 3, 2021)

  • Out paper about the high-performance and lightweight FPGA implementation of Bilateral Filter is accepted by FPL 2021 as a Full Paper! (May 14, 2021)

  • Zhang-san has been accepted for Fellowship for Creation of Intelligent World. (April 30, 2021)

  • Koike-san, Hashimoto-san, and Fujiwara-san have become Master course students. Kuga-san (Master course student) have joined. Welcome! (April 1, 2021)

  • Hirayama-san has become a Ph.D student of The University of Tokyo. (April 1, 2021)

  • Ikeda-kun won the young excellent presentation award from IEICE SIG-DC (Dependable Computing) for his presentation about the DNN acceleration method based on the dead neuron prediction. (October 20, 2020)

  • Zhang-san (Ph.D. student), Koike-san, Hashimoto-san, and Fujiwara-san (Undergraduate student) have joined. Welcome! (September 24, 2020)

  • Ikebe-san (Technical Staff) has joined. Welcome! (September 1, 2020)

  • Our paper about an efficient hardware architecture for Bayesian neural network processing has been accepted for International Journal of Networking and Computing. (May 12, 2020)

  • Hirayama-kun won the excellent presentation award from JSAI for his presentation about variational Bayesian neural network at SIG-FPAI. (May 12, 2020)

  • Our paper about an FPGA-based acceleration method of random forest has been accepted for ARC 2020! (March 4, 2020)

  • NNgen (A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network) is available on GitHub. (December 6, 2019)

  • Secretary Yamaura-san has joined. (December 4, 2019)

  • Our paper about the annealing processor with Tokyo Tech, Hokkaido Univ., and Hitachi has been accepted for ISSCC 2020! (November 19, 2019)

  • CASYS Web page just opened! (October 8, 2019)

  • CASYS just started! (October 1, 2019)

Research Keywords

  • Computer Architecture

  • High-Level Synthesis Compiler

  • FPGA System

  • Algorithm/Hardware Co-design

  • Machine Learning Acceleration

  • Processor Architecture and Memory System




  • Fumiko Yamaura (Secretary)

  • Postdoc positions will be available. Please contact.

Graduate Student (Ph.D. Course)

  • Peiqi Zhang (D2, Fellowship for Creation of Intelligent World)

  • Yuki Hirayama (D1, JSPS Research Fellow DC1)

  • Kazutoshi Hirose (D3, Tokyo Institute of Technology, and JSPS Research Fellow DC1)

Graduate Student (Master Course)

  • Kota Kuga (M1)

  • Ryo Koike (M1)

  • Nobuho Hashimoto (M1)

  • Yoshiki Fujiwara (M1)

  • Yinghao Ren (M1)


  • Tatsuya Kubo (B4)

  • Kengo Suga (B4)

  • Masayoshi Tsutsui (B4)

  • Sefutsu Ryu (B4)


  • Hikaru Ikebe (June 2021, Technical Staff)

  • Taiga Ikeda (March 2020, Master Degree, Hokkaido University)

  • Kasho Yamamoto (March 2020, Ph.D., Hokkaido University, and JSPS Research Fellow DC2)

  • Yuka Oba (March 2020, Master Degree, Hokkaido University)

  • Takumi Kudo (March 2020, Master Degree, Hokkaido University)

Contact and Address


4th floor, Faculty of Science Bldg. 7, The University of Tokyo,

7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan

  • Room 401: Takamaeda's room

  • Room 402: Lab (Student)


  • Takamaeda: shinya_at_is_s_u-tokyo_ac_jp

  • Secretary: casys-secretary_at_is_s_u-tokyo_ac_jp

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