Master Thesis : “A Study on Generation of Control Signals in High-Level Synthesis from SDL Specification”, Sang-Hoon Kwak, Gwangju Institute of Science and Technology, Nov. 1999.
PhD Thesis: “Optimization Methodology of Binary Adder Using Integer Linear Programming and Its Application to Multimedia System”, Sanghoon Kwak, Gwangju Institute of Science and Technology, Dec. 2008.
1. “A Performance-aware Yield Analysis and Optimization of Manycore Architectures", JeongGun Lee and Sanghoon Kwak , Computers and Electrical Engineering, Vol. 54, pp. 40-52, Aug. 2016
2. “Architectural Design Issues on a Clockless 32-bit Processor Using an Asynchronous HDL", Myeong-Hoon Oh, Young Woo Kim, Sanghoon Kwak, Chi-Hoon Shin, and Sung Nam Kim", ETRI Journal, Vol. 25, No. 3, pp. 480-490, Jun. 2013
3. “Synthesis of Adaptable Hybrid Adders for Area Optimization under Timing Constraint", Yonghwan Kim, Sanghoon Kwak, Taewhan Kim, ACM Transactons on Design Automation of Electronic Systems, Vol. 17, No. 4, pp. 43:1-29, Oct. 2012
4. “Exploration of Power-Delay Tradeoffs with Heterogeneous Adders by Integer Linear Programming”, Sanghoon Kwak, Eun-Gu Jung, Dongsoo Har, Jeong-gun Lee, Milos D. Ercegovac, Jeong-A Lee, Journal of Circuits, Systems and Computers , Vol. 18, No. 4, pp.787-800, Jun. 2009
5. “Novel Hardware Architecture of Intra-Predictor Generator for H.264/AVC Codec”, Sanghoon Kwak, Jinwook Kim, Dongsoo Har, IEICE Trans. On Information and Systems, Vol. E91-D, No. 7, pp.2083-2086, Jul. 2008.
6. “Asynchronous Multiple-Issue On-Chip Bus with in-Order/Out-of-Order Completion”, Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Son Jhang, Jeong-a Lee, Dong-Soo Har, IEICE Trans. on Electronics, Vol.E88-C, pp. 2395-2399, Dec. 2005.
1. “Partition-based Task Mapping for Communication Energy Minimization in 3D Network-on-Chip”, Sanghoon Kwak , In EKC 2019 Conference Proceedings, Dec. 2020
2. “GALS Network-on-Chip Architecture for Power-Efficiency in FPGA Device”, Sanghoon Kwak, Kanghoon Kim, Younglok Kim, In Proc. of 2012 IEEE/ACM Workshop on CAD for Multi-Synchronous and Asynchronous Circuits and Systems, Nov. 2012
3. “Design of Power-Efficient GALS Network-on-Chip Architecture in FPGA Device,” Sanhoon Kwak, Kanghoon Kim, Younglok Kim, In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2012), Jul. 2012
4. “FPGA based Asynchronous FIFO Designs and Its Performance Analysis”, Seung-Joon Lee, Sanghoon Kwak, Jeong-Gun Lee, In Proceedings of the 26th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2011), Jun. 2011
5. “Design of Asynchronous MSP430 Microprocessor Using Balsa Back-End Retargeting”, Sanghoon Kwak, Hyung-Woo Lee, Yousaf Zafar, Myeong-Hoon Oh, Dongsoo Har, In Proceedings of IEEE Vth Southern Conference on Programmable Logic (SPL 2009), pp. 223-228, Apr. 2009
6. “Design of Heterogeneous Adders Based on Power-delay Tradeoffs”, Sanghoon Kwak, Dongsoo Har, Jeong-Gun Lee, Jeong-A Lee, In Proceedings of IEEE International Symposium on Embedded Computing (SEC 2008), pp. 223-226, Oct. 2008
7. “Fast Quarter-Pixel Motion Estimation by Adaptive Searching Point Selection”, Sanghoon Kwak, Hyunsup Shin, Dongsoo Har, In Proceeding of International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC 2007), pp. 797-798, 2007
8. “Implementation of High-Performance Intra-Predictor In H.264”, Jinwook Kim, Eungu Jung, Eonpyo Hong, Sanghoon Kwak, Dongsoo Har, In Proceedings of IBERCHIP XII Workshop (IBERCHIP 2007), pp. 343-344, 2007
9. “High Performance Architecture for Intra Predictor in H.264”, Jinwook Kim, Eungu Jung, Sanghoon Kwak, and Dongsoo Har, In Proceedings of The Korea-Russia Joint-Workshop, pp. 149-152, Oct. 2006
10. “A Detection-Driven Watermarking Technique for VLSI IP Protection”, Sanghoon Kwak, Jeong-A Lee, Dongsoo Har, In Proceedings of International MultiConference of Engineers and Computer Scientists 2006 (IMEC 2006), pp. 249-251, Jun. 2006 (Best Paper Nominated)
11. “An Effective Scheduling Algorithm Targeting High Utilization of Reconfigurable Devices in Reconfigurable Co-synthesis System”, Jihan Park, Sanghoon Kwak, Fahad Ali Mujahid, Jeonga Lee, Dongsoo Har, In Proceedings of IBERCHIP XII Workshop (IBERCHIP 2006), pp. 310-311, Mar. 2006
12. “Reconfigurable Co-synthesis System Architecture”, Ji-han Park, Sang-Hoon Kwak, Jeong-Gun Lee, Jeong-A Lee, and Dong-soo Har, In Proceedings of International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC 2005), pp. 445-446, 2005
13. “High Performance Asynchronous On-Chip Bus with Multiple Issue and Out-of-Order/In-Order Completion”, Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Sun Jhang, Jeong-A Lee, Dong-Soo Har, In Proceedings of Proceedings of ACM Great Lakes symposium on VLSI (GLSVLSI 2005), pp. 152-155, Apr. 2005
14. “Generation of Control Signals in High-Level Synthesis from SDL Specification” Sang-Hoon Kwak, Dong-Ik Lee, In Proceedings of International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC 2000), Vol. 1, pp. 410-413, Jul. 2000
1. “Power-Delay Product Optimization of Heterogeneous Adder Using Integer Linear Programming", Sanghoon Kwak, Jeong-Gun Lee, Jeong-A Lee, Journal of KSCI, Vol. 15, No. 10, pp.1-9, Oct. 2010 (Written in English)
2. “Automatic SDL to embedded C Code Generation Considering uC/OS-II OS Environment”, Sanghoon Kwak, Jeong-Gun Lee, Journal of KSCI, Vol. 13, No. 3, pp.45-55, May 2008
1. “FPGA based GALS Network-on-Chip Architecture”, Sanghoon Kwak, Kanghoon Kim, Jeonggun Lee, In Proceedings of KIISE/KIPS Gangwon Branch Joint Conference, pp. 44-47 , Jun. 2012
2. “Synthesis of Area-Efficient Delay-Insensitive Asynchronous Circuit Using Balsa”, Sanghoon Kwak, Hyung-Woo Lee, Gyudong Choi, Myeong-Hoon Oh, Sungnam Kim, Sungwoon Kim, Dongsoo Har, In Proceedings of IEEK Fall Conference, Vol. 31, No. 2. pp. 989-990 , Nov. 2008
3. "Synthesis of Asynchronous Circuits from C Language Using Syntax Directed Translation," Sang-Hoon Kwak, Jeong-Gun Lee and Dong-Ik Lee, In Proceedings of IEEK Summer Conference, pp. 353-356, Jun. 2002
4. “Generation of C Code from SDL Specification Considering Real-Time Operating System”, S. H. Kwak, D.I. Lee, In Proceedings of KISS Fall Conference”, pp. 469-471, Oct. 2001.