Sanghoon Kwak

Research Interests

• Efficient Hardware Processing of Deep Neural Network

      Acceleration of DNN (Deep Neural Network) in FPGA and ASIC

      Optimized model (by pruning, quantization, and novel technique such as 1-bit LLM)-aware ML accelerator architecture

• Front/Back-End Digital Design

      RTL design, micro-architecture design

      Floorplanning, Placement & Routing, Design Verification based on UVM

• Classic VLSI/CAD Issues 

      High-Level Synthesis, Low-Power Design, Network-on-Chip, Arithmetic Circuit, etc