Publications

Journals

• 1. Khoa Van Pham, Tien Van Nguyen, and Kyeong-Sik Min, “Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training,” Micromachines, vol. 10, 245, April 2019. (SCIE)

  2. Nguyen, T.V.; Pham, K.V.; Min, K.-S. Memristor-CMOS Hybrid Circuit for Temporal-Pooling of Sensory and Hippocampal Responses of Cortical Neurons. Materials 2019, 12, 875. (SCIE)

  3. Khoa Van Pham, Son Bao Tran, Tien Van Nguyen, and Kyeong-Sik Min, “Asymmetrical Training Scheme of Binary-Memristor-Crossbar-Based Neural Networks for Energy-Efficient Edge-Computing Nanoscale Systems,” Micromachines, vol. 10, 141, Feb. 2019. (SCIE)

  4. Khoa Van Pham, Tien Van Nguyen, Son Bao Tran, HyunKyung Nam, Mi Jung Lee, Byung Joon Choi, Son Ngoc Truong, and Kyeong-Sik Min, “Memristor Binarized Neural Networks,” Journal of Semiconductor Technology and Science, vol. 18, no. 5, Oct. 2018. (SCIE)

  5. Son Ngoc Truong, Khoa Van Pham, and Kyeong-Sik Min, “Spatial-Pooling Memristor Crossbar Converting Sensory Information to Sparse Distributed Representation of Cortical Neurons,” IEEE Transactions on Nanotechnology, vol. 17, iss. 3, pp. 482 – 491, May 2018. (SCI)

  6. Pham, K.V.; Truong, S.N.; Yang, W.; Min, K. In-DRAM bitwise processing circuit for low-power and fast computation. Electron. Lett., 53, 1514–1516, 2017. (SCI)

  7. Son Ngoc Truong, Khoa Van Pham, Wonsun Yang, Anjae Jo, Huan Minh Vo, Mi Jung Lee, and Kyeong-Sik Min, “Experimental Demonstration of Sequence Recognition of Serial Memristors,” Electronic Materials Letters, vol. 13, no. 1, pp. 86-90, Jan. 2017. (SCIE)

  8. Khoa Van Pham, Son Ngoc Truong, Wonsun Yang, and Kyeong-Sik Min, “A Thermoelectric Energy Harvesting Circuit for A Wearable Application,” Journal of Institute of Korean Electrical and Electronics Engineers, vol. 21, no. 1, pp. 66-69, Mar. 2017.

  9. Son Ngoc Truong, Khoa Van Pham, Wonsun Yang, Sangho Shin, Ken Pedrotti, and Kyeong-Sik Min, “New Pulse Amplitude Modulation for Fine Tuning of Memristor Synapses,” Microelectronics Journal, vol. 55, pp. 162–168, Sep. 2016. (SCIE)

Conferences

1. Khoa Van Pham and Kyeong-Sik Min, “Non-Ideal Effects of Memristor-CMOS Hybrid Circuits for Realizing Multiple-Layer Neural Networks,” to be presented in IEEE International Symposium on Circuits and Systems (ISCAS), Japan, May. 2019.

2. Khoa Van Pham, Son Bao Tran, Tien Van Nguyen, and Kyeong-Sik Min, “Computation-In-DRAM Circuits for Quantized Neural Networks,” Korean Conference on Semiconductors (KCS), Korea, p. 248, Feb. 2019.

3. Khoa Van Pham, Tien Van Nguyen, Son Bao Tran, and Kyeong-Sik Min, “A Memristor-Crossbar-Based Circuit for Binarized Neural Networks,” VNUHCM Scientific Conference, Vietnam, Nov. 2018.

4. Khoa Van Pham, Son Bao Tran, Tien Van Nguyen, HyunKyung Nam, and Kyeong-Sik Min, “Memristor Crossbar for Spatiotemporal Pattern Recognition,” International SoC Design Conference (ISOCC), Korea, Nov. 2018.

5. Khoa Van Pham, Son Bao Tran, Tien Van Nguyen, HyunKyung Nam, and Kyeong-Sik Min, “Bitwise Convolution Circuit for Processing-In-DRAM,” Korean Conference on Semiconductors (KCS), Korea, p. 491, Feb. 2018.

6. Son Ngoc Truong, Khoa Van Pham, Wonsun Yang, and Kyeong-Sik Min, “Statistical Analysis on Variation Tolerance of Time-Shared Twin Memristor Crossbar for Pattern Matching,” International Conference System Science and Engineering (ICSSE), Vietnam, July 2017.

7. Son Ngoc Truong, Khoa Van Pham, Wonsun Yang, and Kyeong-Sik Min, “Memristor Circuits and Systems for Future Computing and Bio-inspired Information Processing,” Proceeding of 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS), Shanghai in China, pp. 456-459, Oct. 2016.

8. Khoa Van Pham, Son Ngoc Truong, Wonsun Yang, and Kyeong-Sik Min, “Thermoelectric Energy Harvesting Circuit With 60-mV Input Voltage,” IEEE Autumn Conference, Nov. 2016.