The ICE FPGA motherboard and backplanes are designed to meet the requirements of our radio astronomy correlator and mm-wave TES bolometer readout system. It is unique in its IO bandwidth, processing capabilities, and its clocking scheme.
A user manual, describing the motherboard, is kept at http://icecore-docs.readthedocs.org .
The blue Motherboard (Figure 1 - ICE Motherboard with CHIME data acquisition boards) has a high end ARM CPU and a cutting edge Xilinx K7 FPGA to perform the real-time data processing and high speed communications. In the image you see two red CHIME data acquisition boards mounted onto the motherboard. Together the system shown will sample 16 antenna signals with an 8 bit resolution at 800 mega samples per second and fast fourier transform the incoming data.
16 ICE motherboards can be plugged into a backplane (Figure 2 - Topside view of ICE backplane). This backplane boasts a 10gbit/s full mesh (each slot can communicate directly with any other slot). This corresponds to a total of 4.8 Terabits/second. This rate of data transfer is comparable with some of the fiber links crossing from the USA to Europe, see Transatlantic communications cable.
The backplane has 2 additional powered slots for miscellaneous hardware and provides multiple clock distribution to each slot.
The image on the right, Figure 3 , shows a backplane mounted onto a subrack with one ICE board plugged in. Additionally, 8 double height QSFP cages can be seen. A fully populated crate can steam a total of 640 Gbit/second through these cages.
The ICE system is extremely flexible and compatible with alternative mezzanine boards, including those purchased off the shelf. In the image below, see figure 4, you can see the digital frequency multiplexing mezzanine board (DfMux mezzanine) designed for use in an ICE system.
The extremely low noise digital to analog conversion and analog to digital conversion circuitry allows a single DfMux mezzanine to monitor 64 cryogenically cooled bolometers on each of its 4 Frequency Multiplexed combs (a total of 256 bolometers). The board supports channel frequencies up to 10Mhz. With further research and development, it is expected that number of channels will vastly extend, with no hardware modifications required. To ensure peak performance, the onboard switching power supplies are synchronised with the main system clock. A unique identification code stored in onboard memory enables the ICE system to self-discover connected hardware. Experiments that will use this mezzanine shortly include Polarbear 2 (located in Chile) and SPT3G (located at the South pole) .
Figure 4 - DfMux Data Acquisition and frequency comb generator board
Summary of ICE Motherboard Specifications: