MEC 1103 VLSI DESIGN AND APPLICATIONS

Module -1:

Introduction to VLSI:

Fundamental of VLSI, CMOS Devices Modeling, Simple MOS Large Signal Model (SPICE) Parameters, Small Signal Model for the MOS Transistor, Computer Simulation Model, Sub threshold MOS Model, MOS Switch, MOS Diode/ Active resistor, Current Sink and Sources, Current Mirrors, Current and Voltage Reference, Bandgap Reference, Differential Amps, Cascode Amps, Current Amps.                                                                                                             

Module -2:

CMOS Operational Amplifiers and Comparators:

Design of CMOS Op Amps, Compensation of Op Amps, Design of Two stage Op Amps, Power Rejection Ratio of Two Stage Op Amps, Cascode of Op Amps, Buffered Op Amps, High Speed/ Frequency Op Amps, Differential Output Op Amps, Micro Power Op Amps, Low Noise and Low Voltage Op Amp, Characteristics of Comparator, Two stage Open Loop Comparators, Discrete Time Comparators, High Speed Comparators.                                                    

Module -3:

Switched Capacitor Circuits, D/A and A/D:

Switched Capacitor Circuits, Amplifiers  and Integrators, Two Phase Switched Capacitor Circuits, First and Second Order Switched Capacitor Circuits, Switched Capacitor Filters, Comparative study of D/A,  Parallel and Serial Digital Analog Converters, Serial Analog-Digital Converter, Medium, High Speed Analog-Digital Converter, Over sampling Converter.

Module -4:

Layout Design of CMOS Cell:

Schematic and Layout Design of Basic Gates and Universal Gates & Flip-Flop,  Layout Representation, CMOS-N-Well Rules, Design Rules, Backgrounder, Layout Assignments, Latch-Up Problems, Analogue Design Layout Considerations, Transistor Design, Centroid Design, Capacitor Matching, Resistor Layout, Noise Considerations.                                                 

Module -5:

VLSI Design Issues:

Design Captures Tools, HDL Design, Schematic Design, Layout design, Floor planning, Chip Composition, Design Verification Tools, Circuit Level Simulation, and Logic Level Simulation, Mixed Mode Simulators. Timing Verification, Network Isomorphism, Netlist Comparison, Layout Extraction, Back Annotation, Design Rule Verification, Pattern Generation, Data Sheets, Pin-out, Description Operation, DC Specification, AC Specification, Package Diagram.

Module –6 :

Digital Subsystem Design:   

Design of Universal Gate using Pseudo-nMOS Logic, Clocked CMOS Single Bit Adder,  Parallel Adder, Transmissions Gate Adders,  Carry Look Ahead Adders, Other High Speed Adders, Multipliers, Asynchronous Counter,  Synchronous Counter, SRAM Arrays, DRAM, ROM Array,  Finite Stets Machines, Multilevel Logic.

Module –7 :

Design Economics and Testing:

NRE’s, Engineering Costs, Prototype Manufacturing Cost, Recurring Costs, Fixed Costs , Schedule , Processor Example, Need for Testing, Functionality Tests, Manufacturing Tests, Manufacturing Tests Principles, Fault Modules, Struck-at-Faults, SC and OC Faults, Observability, Controllability, Fault Coverage, ATPG, Delay Fault Testing, Scan Based Techniques, BLIBO, IDDQ Testing. 

Text Books:

1. “CMOS Analog Circuit Design” by Phillip E. Allen & Douglas R. Holberg, Second Edition.

2. “Design of Analog CMOS Integrated Circuits” by Behzad Razavi.

3. Analogue Integrated Circuit Design, John. D. and Martin K, John Wiley and     Sons, 1997.

4. Principle of CMOS VLSI Design A System Prospective, Weste Neil, H. E. & Eshraghian K, Pearson Edu. 1993.

5. Digital Integrated Circuit Design, Ken Martin, Oxford University Press, 2000.

6. “Introduction to VLSI Circuits and Systems” by John P. Uyemura, Willey Student Addition.

Reference Book:

1- “CMOS Digital Logic Design with VHDL & Verilog (Theory & Practical),” by             Vijay Nath, ACM Learning, New Delhi, 2011.