#corresponding author, *first author
2024
[14] Seungmin Woo, Jisung Im, Hansol Kim, Taeseong Kwon, Jinsu Kim, Wonjun Song, Hojin Moon, Nagyong Choi, Sung-Tae Lee, and Sung Yun Woo, "3D NAND Compatible Vertical Three Word Lines Gate-Controlled Thyristor (GCT) DRAM", 32회 한국반도체학술대회, 2025.
[13] Jinsu Kim, Hansol Kim, Jisung Im, Taeseong Kwon, Seungmin Woo, Do Yeon Park, Nagyong Choi, Sung-Tae Lee, and Sung Yun Woo,"Analysis of the Impact of Grain Boundary in Diode-Type 3-D NAND Flash Memory Cell ", 32회 한국반도체학술대회, 2025.
[12] Jisung Im, Hansol Kim, Haesung Kim, Yu-Mi Kim, Sung-Jin Choi, Dae Hwan Kim, Dong Myong Kim, Young Jun Yoon, Kwanseo Park, Jong-Ho Bae, and Sung Yun Woo, "Analysis of Proton-Irradiation Effects on 28nm MOSFETs ", 32회 한국반도체학술대회, 2025.
[11] Hansol Kim, Jisung Im, Taeseong Kwon, Jinsu Kim, Seungmin Woo, Jahyun Gu, Sung-Tae Lee, Dongkyu Jang, Yoonki Hong, and Sung Yun Woo, "Analysis of Work-function Engineering in a Vertical Channel DRAM Cell Transistor ", 32회 한국반도체학술대회, 2025.
[10] Tae Seong Kwon, Jeong Hyun Moon, Moonkyong Na, Park Do Yeon, Wook Bahng, Young Jun Yoon, Sung Yun Woo, and Jae Hwa Seo, "Design Optimization of SiC CMOS FinFET for next-generation system on chip logic applications", 32회 한국반도체학술대회, 2025.i
[9] S. Kim, H.-N. Lee, H. Yang, H. J. Kim, H. Jeong, Y. Choi, S.-J. Choi, D. H. Kim, D. M. Kim, S. Y. Woo, and J.-H. Bae, "Analysis of Leakage-Current-Assisted Polarization Mechanism for Memory Window Expansion in Ferroelectric a-InGaZnOx Thin Film Transistor ", 32회 한국반도체학술대회, 2025.i
[8] Y. Choi, H. Kim, H. Yang, J. Park, H. Jeong, S. Kim, H. J. Kim , S.-J. Choi, D. H. Kim, D. M. Kim, S. Y. Woo, and J.-H. Bae, "Analysis of Proton–Induced Electrical Degradation in a-IGZO TFTs under Aerospace Environments ", 32회 한국반도체학술대회, 2025.i
[7] E. Kim, H. Jeong, Y. Choi, J. Park, H. Kim, H. Yang, S.-J. Choi, D. H. Kim, D. M. Kim, S. Y. Woo, and J.-H. Bae, "Analysis on Effect of Proton Irradiation on Schottky-Barrier a-IGZO TFTs using TCAD Simulation", 32회 한국반도체학술대회, 2025.i
[6] SY Woo*#, "Investigation of the Row Hammer and Pass Gate Effects According to the Design of the BCAT Structure in DRAM Arrays", 2024 반도체공학회 하계학술대회, 2024. (Invited)
[5] SY Woo*#, "Analysis of Row Hammer and Passing Gate Effect in DRAM Cells by BCAT Structural Design", 2024 전자공학회 하계학술대회, 2024. (Invited)i
[4] 김영조, 문영부, 문정현, 김형우, 방욱, 우성윤, 윤영준, 서재화, "SiC와 b-Ga2O3 Vertical Schottky Barrier Diodes (SBDs)의 양성자 조사에 의한 Displacement Damage 특성 분석", 전기전자재료학회 하계학술대회 SiC 반도체 컨퍼런스, 2024.
[3] SY Woo*#, "BCAT 구조에 DRAM 셀의 Row Hammer 및 Passing Gate 영향 분석", 2024 SoC 학술대회, 2024. (Invited)i
[2] SY Woo*#, "Analog Neuron Devices for Hardware-Based Spiking Neural Networks", 31회 한국반도체학술대회, 2024. (Invited)i
2023
[1] SY Woo*#, "Analysis of Computing Device for High-Density Low-Power Neuron Circuits in Hardware Neural Networks", 2023 SoC 학술대회, 2023. (Invited)i