C. Ji†, M. Han†, B. Ishdorj, and T. Na*, “Offset reduction of latch NMOS mismatch in current-latched sense amplifier using dummy and coupling capacitors,” submitted to TCAS-I.
U. Saha†, B. Ishdorj†, J. Jang, and T. Na*, “Double-node-upset fully-tolerant/recoverable and triple-node-upset partially-tolerant self-recoverable latch design for aerospace applications,” submitted to Access. (under revision, major).
J. Jang†, B. Ishdorj†, U. Saha, and T. Na*, “Recovery-signal-based low-cost quadruple-node-upset-tolerant self-recoverable latch design for aerospace applications,” submitted to TAES. (under revision, major).
M. Han, J. Kim, B. Ishdorj, J. Jang, and T. Na*, “Reliability-enhanced offset-canceling current-sampling sense amplifier for 2T-2MTJ MRAM PUF,” IEEE Trans. Circuits Syst. I, Reg. Papers (TCAS-I), accepted. (SCIE) (Link)
J. Kim, M. Han, B. Ishdorj, and T. Na*, “Offset-tolerant body-biased sense amplifier with rise-time control technique for SRAM,” IEEE Trans. Circuits Syst. II, Exp. Briefs (TCAS-II), vol. 72, no. 5, pp. 773-777, May 2025. (SCIE) (Link)
B. Ishdorj, S. Sharif, and T. Na*, "Spin current enhancement using double-ferromagnetic-layer structure for magnetoelectric spin-orbit logic device," MDPI Electronics, vol. 13, no. 20, p. 4085, Oct. 2024. (SCIE) (Link)
B. Ishdorj and T. Na*, “Spin-transfer-torque magnetic-tunnel-junction-based low-power nonvolatile flip-flop designs in the subthreshold voltage region,” IEEE Trans. Very Large Scale Integr. Syst. (TVLSI), vol. 31, no. 10, pp. 1565-1577, Oct. 2023. (SCIE) (Link)
B. Ishdorj†, D. Kim†, S. Ahn, and T. Na*, “Offset-canceling current-latched sense amplifier with slow rise time control and reference voltage biasing techniques,” IEEE Trans. Circuits Syst. I, Reg. Papers (TCAS-I), vol. 70, no. 7, pp. 2689-2699, Jul. 2023. (SCIE) (Link)
나태희, 바야르툴가, "10-2464441: 자기 터널 접합을 이용한 저전력 기반의 비휘발성 플립플롭," Nov. 2. 2022. (국내 특허 등록)
B. Ishdorj†, J. Kim†, J. H. Kim, and T. Na*, “A timing-based split-path sensing circuit for STT-MRAM,” MDPI Micromachines, vol. 13, no. 7, p. 1004, Jun. 2022. (SCIE) (Link)
바야르툴가, 나태희*, "Sub-threshold 전압 영역 Magnetic-tunnel-junction 기반 Body-biasing을 이용한 비휘발성 Flip-Flop," in 대한전자공학회 하계종합학술대회, Jun. 2021. (Link)